LMH6601MG

LMH6601/LMH6601Q 250 MHz, 2.4V CMOS Operational Amplifier with Shutdown January 9, 2009 LMH6601/LMH6601Q 250 MHz, 2.4V CMOS Operational Amplifier with Shutdown General Description The LMH6601 is a low voltage (2.4V – 5.5V), high speed voltage feedback operational amplifier suitable for use in a variety of consumer and industrial applications. With a bandwidth of 125 MHz at a gain of +2 and guaranteed high output current of 100 mA, the LMH6601 is an ideal choice for video line driver applications including HDTV. Low input bias current (50 pA maximum), rail-to-rail output, and low current noise allow the LMH6601 to be used in various industrial applications such as transimpedance amplifiers, active filters, or highimpedance buffers. The LMH6601 is an attractive solution for systems which require high performance at low supply voltages. The LMH6601 is available in a 6-pin SC70 package, and includes a micropower shutdown feature. Features VS = 3.3V, TA = 25°C, AV = 2 V/V, RL = 150Ω to V−, unless specified. ■ 125 MHz −3 dB small signal bandwidth ■ 75 MHz −3 dB large signal bandwidth ■ 30 MHz large signal 0.1 dB gain flatness ■ 260 V/μs slew rate ■ 0.25%/0.25° differential gain/differential phase ■ Rail-to-rail output ■ 2.4V – 5.5V single supply operating range ■ 6-Pin SC70 Package ■ LMH6601Q is AEC-Q100 grade 3 qualified and is manufactured on an automotive grade flow Applications ■ ■ ■ ■ ■ ■ ■ ■ Video amplifier Charge amplifier Set-top box Sample & hold Transimpedance amplifier Line driver High impedance buffer Automotive Response at a Gain of +2 for Various Supply Voltages 20136441 © 2009 National Semiconductor Corporation 201364 www.national.com LMH6601/LMH6601Q Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 4) Human Body Model Machine Model VIN Differential Input Current Output Current Supply Voltage (V+ – V−) Voltage at Input/Output Pins 2 kV 200V ±2.5V ±10 mA 200 mA (Note 3) 6.0V V++0.5V, V−−0.5V Storage Temperature Range Junction Temperature Soldering Information Infrared or Convection (20 sec.) Wave Soldering (10 sec.) −65°C to +150°C +150°C 235°C 260°C Operating Ratings Supply Voltage (V+ – V−) Operating Temperature Range (Note 1) 2.4V to 5.5V −40°C to +85°C 414°C/W Package Thermal Resistance (θJA) 6-pin SC70 5V Electrical Characteristics Single Supply with VS= 5V, AV = +2, RF = 604Ω, SD tied to V+, VOUT = VS/2, RL = 150Ω to V− unless otherwise specified. Boldface limits apply at temperature extremes. (Note 2) Symbol Parameter Condition Min (Note 6) Typ (Note 6) 130 250 2.5 0 81 0 30 155 125 56 66 30 0.06 0.10 MHz dB MHz % deg Max (Note 6) Units Frequency Domain Response SSBW SSBW_1 Peak Peak_1 LSBW Peak_2 0.1 dB BW GBWP_1k GBWP_150 AVOL PBW DG DP Large Signal Open Loop Gain Full Power BW Differential Gain Differential Phase Peaking Peaking –3 dB Bandwidth Large Signal Peaking 0.1 dB Bandwidth Gain Bandwidth Product –3 dB Bandwidth Small Signal VOUT = 0.25 VPP VOUT = 0.25 VPP, AV = +1 VOUT = 0.25 VPP, AV = +1 VOUT = 0.25 VPP VOUT = 2 VPP VOUT = 2 VPP VOUT = 2 VPP Unity Gain, RL = 1 kΩ to VS/2 Unity Gain, RL = 150Ω to VS/2 0.5V < VOUT < 4.5V –1 dB, AV = +4, VOUT = 4.2 VPP, RL = 150Ω to VS/2 4.43 MHz, 1.7V ≤ VOUT ≤ 3.3V, RL = 150Ω to V− 4.43 MHz, 1.7V ≤ VOUT ≤ 3.3V RL = 150Ω to V− Time Domain Response TRS/TRL OS SR TS TS_1 PD CL HD2 HD2_1 HD3 HD3_1 THD VN1 VN2 Total Harmonic Distortion Input Voltage Noise Harmonic Distortion (3rd) Propagation Delay Cap Load Tolerance Harmonic Distortion (2nd) Rise & Fall Time Overshoot Slew Rate Settling Time 0.25V Step 0.25V Step 2V Step 1V Step, ±0.1% 1V Step, ±0.02% Input to Output, 250 mV Step, 50% AV = −1, 10% Overshoot, 75Ω in Series 2 VPP, 10 MHz 4 VPP, 10 MHz, RL = 1 kΩ to VS/2 2 VPP, 10 MHz 4 VPP, 10 MHz, RL = 1 kΩ to VS/2 4 VPP, 10 MHz, RL = 1 kΩ to VS/2 >10 MHz 1 MHz 2.6 10 275 50 220 2.4 50 −56 −61 −73 −64 −58 7 10 nV/ ns % V/μs ns ns pF MHz dB dB MHz dB MHz Distortion & Noise Performance dBc dBc www.national.com 2 LMH6601/LMH6601Q Symbol IN VIO DVIO IB IOS RIN CIN +PSRR −PSRR CMRR CMVR ICC Parameter Input Current Noise Input Offset Voltage Input Offset Voltage Average Drift (Note 8) Input Bias Current Input Offset Current Input Resistance Input Capacitance Positive Power Supply Rejection Ratio DC (Note 9) (Note 9) >1 MHz Condition Min (Note 6) Typ (Note 6) 50 ±1 −5 5 2 10 1.3 Max (Note 6) Units fA/ Static, DC Performance ±2.4 ±5.0 50 25 mV μV/°C pA pA TΩ pF dB dB dB V+ - 1.5 11.5 13.5 V mA nA 0V ≤ VIN ≤ 3.5V 55 51 53 50 56 53 V− -0.20 59 61 68 – 9.6 100 Negative Power Supply Rejection DC Ratio Common Mode Rejection Ratio Input Voltage Range Supply Current DC CMRR > 50 dB Normal Operation VOUT = VS/2 Shutdown SD tied to ≤ 0.5V (Note 5) VOH1 VOH2 VOH3 VOL1 VOL2 VOL3 IO IO_1 Load RO_Enabled Output High Voltage (Relative to V+) RL = 150Ω to V– RL = 75Ω to VS/2 RL = 10 kΩ to V– –210 –480 –60 –110 –190 –190 –12 +5 +120 +5 150 180 +45 +125 +45 +125 mV mV Output Low Voltage (Relative to V–) RL = 150Ω to V– RL = 75Ω to VS/2 RL = 10 kΩ to V– Output Current VOUT < 0.6V from Respective Source Supply Sink VOUT = VS/2, VID = ±18 mV (Note 10) ±100 mA Output Load Rating Output Resistance THD < −30 dBc, f = 200 kHz, RL tied to VS/2, VOUT = 4 VPP Enabled, AV = +1 Shutdown Shutdown (Note 5) (Note 5) SD = 5V (Note 5) 0 4.5 20 0.2 >100 5.0 0.5 5.0 10 2.2 1.4 520 Ω Ω MΩ pF V V pA V µs ns dB ns RO_Disabled Output Resistance CO_Disabled Output Capacitance Miscellaneous Performance VDMAX VDMIN Ii V_glitch Ton Toff IsolationOFF T_OL Voltage Limit for Disable (Pin 5) Voltage Limit for Enable (Pin 5) Logic Input Current (Pin 5) Turn-on Glitch Turn-on Time Turn-off Time Off Isolation Overload Recovery 1 MHz, RL = 1 kΩ 60 10 MHz 1 MHz >1 MHz nV/ fA/ mV μV/°C pA pA TΩ pF Static, DC Performance Input Offset Voltage Average Drift (Note 8) Input Bias Current Input Offset Current Input Resistance Input Capacitance (Note 9) (Note 9) 0V ≤ VIN ≤ 1.8V 4 LMH6601/LMH6601Q Symbol +PSRR −PSRR CMRR CMVR ICC Parameter Positive Power Supply Rejection Ratio DC Condition Min (Note 6) 61 51 57 52 58 55 V− -0.20 Typ (Note 6) 80 72 73 – 9.2 100 Max (Note 6) Units dB dB dB Negative Power Supply Rejection DC Ratio Common Mode Rejection Ratio Input Voltage Range Supply Current DC CMRR > 50 dB Normal Operation VOUT = VS/2 Shutdown SD tied to ≤ 0.33V (Note 5) V+ -1.5 11 13 V mA nA VOH1 VOH2 VOH3 VOL1 VOL2 VOL3 IO IO_1 Load RO_Enabled Output High Voltage (Relative to V+) RL = 150Ω to V– RL = 75Ω to VS/2 RL = 10 kΩ to V− –210 –360 –50 –100 –190 –190 –10 +4 +105 +4 50 75 +45 +125 +45 +125 mV mV Output Low Voltage (Relative to V–) RL = 150Ω to V– RL = 75Ω to VS/2 RL = 10 kΩ to V– Output Current VOUT < 0.6V from Respective Source Supply Sink VOUT = VS/2, VID = ±18 mV (Note 10) ±75 mA Output Load Rating Output Resistance THD < −30 dBc, f = 200 kHz, RL tied to VS/2, VOUT = 2.6 VPP Enabled, AV = +1 Shutdown Shutdown (Note 5) (Note 5) SD = 3.3V (Note 5) 0 2.97 25 0.2 >100 5.6 0.33 3.3 8 1.6 3.5 500 Ω Ω MΩ pF V V pA V µs ns dB RO_Disabled Output Resistance CO_Disabled Output Capacitance Miscellaneous Performance VDMAX VDMIN Ii V_glitch Ton Toff IsolationOFF Voltage Limit for Disable (Pin 5) Voltage Limit for Enable (Pin 5) Logic Input Current (Pin 5) Turn-on Glitch Turn-on Time Turn-off Time Off Isolation 1 MHz, RL = 1 kΩ 60 5 www.national.com LMH6601/LMH6601Q 2.7V Electrical Characteristics Single Supply with VS = 2.7V, AV = +2, RF = 604Ω, SD tied to V+, VOUT = VS/2, RL = 150Ω to V− unless otherwise specified. Boldface limits apply at temperature extremes. (Note 2) Symbol Parameter Condition Min (Note 6) Typ (Note 6) 120 250 3.1 0.1 73 0 30 110 81 56 65 13 0.12 0.62 MHz dB MHz % deg Max (Note 6) Units Frequency Domain Response SSBW SSBW_1 Peak Peak_1 LSBW Peak_2 0.1 dB BW GBWP_1k GBWP_150 AVOL PBW DG DP Large Signal Open Loop Gain Full Power BW Differential Gain Differential Phase Peaking Peaking –3 dB Bandwidth Large Signal Peaking 0.1 dB Bandwidth Gain Bandwidth Product –3 dB Bandwidth Small Signal VOUT = 0.25 VPP VOUT = 0.25 VPP, AV = +1 VOUT = 0.25 VPP, AV = +1 VOUT = 0.25 VPP VOUT = 2 V PP VOUT = 2 VPP VOUT = 2VPP Unity Gain, RL = 1 kΩ to VS/2 Unity Gain, RL = 150Ω to VS/2 0.25V < VOUT < 2.5V –1 dB, AV = +4, VOUT = 2 VPP, RL = 150Ω to VS/2 4.43 MHz, 0.45V ≤ VOUT ≤ 2.05V RL = 150Ω to V− 4.43 MHz, 0.45V ≤ VOUT ≤ 2.05V RL = 150Ω to V− Time Domain Response TRS/TRL OS SR TS TS_1 PD HD2 HD3 VN1 VN2 IN VIO DVIO IB IOS RIN CIN +PSRR −PSRR CMRR CMVR Input Current Noise Input Offset Voltage Input Offset Voltage Average Drift (Note 8) Input Bias Current Input Offset Current Input Resistance Input Capacitance Positive Power Supply Rejection Ratio DC 58 53 56 53 57 52 V− -0.20 (Note 9) (Note 9) 0V ≤ VIN ≤ 1.2V Static, DC Performance ±1 −6.5 5 2 20 1.6 68 69 77 – V+ -1.5 50 25 ±3.5 ±6.5 mV μV/°C pA pA TΩ pF dB dB dB V Propagation Delay Harmonic Distortion (2nd) Harmonic Distortion (3rd) Input Voltage Noise Distortion & Noise Performance 1 VPP, 10 MHz 1 VPP, 10 MHz >10 MHz 1 MHz >1 MHz −58 −60 8.4 12 50 nV/ fA/ dBc dBc Rise & Fall Time Overshoot Slew Rate Settling Time 0.25V Step 0.25V Step 2V Step 1V Step, ±0.1% 1V Step, ±0.02% Input to Output, 250 mV Step, 50% 2.7 10 260 147 410 3.4 ns % V/μs ns ns MHz dB dB MHz dB MHz Negative Power Supply Rejection DC Ratio Common Mode Rejection Ratio Input Voltage Range DC CMRR > 50 dB www.national.com 6 LMH6601/LMH6601Q Symbol ICC Parameter Supply Current Condition Normal Operation VOUT = VS/2 Shutdown SD tied to ≤ 0.27V (Note 5) Min (Note 6) Typ (Note 6) 9.0 100 Max (Note 6) 10.6 12.5 Units mA nA VOH1 VOH2 VOH3 VOL1 VOL2 VOL3 IO IO_1 Load RO_Enable Output High Voltage (Relative to V+) RL = 150Ω to V– RL = 75Ω to VS/2 RL = 10 kΩ to V– –260 –420 –50 100 –200 –200 –10 +4 +125 +4 25 62 +45 125 +45 +125 mV mV Output Low Voltage (Relative to V–) RL = 150Ω to V– RL = 75Ω to VS/2 RL = 10 kΩ to V– Output Current VOUT ≤ 0.6V from Respective Source Sink Supply VOUT = VS/2, VID = ±18 mV (Note 10) Source Sink 25 35 mA Output Load Rating Output Resistance THD < −30 dBc, f = 200 kHz, RL tied to VS/2, VOUT = 2.2 VPP Enabled, AV = +1 Shutdown Shutdown (Note 5) (Note 5) SD = 2.7V (Note 5) 0 2.43 40 0.2 >100 5.6 0.27 2.7 4 1.2 5.2 760 Ω Ω MΩ pF V V pA V µs ns dB RO_Disabled Output Resistance CO_Disabled Output Capacitance Miscellaneous Performance VDMAX VDMIN Ii V_glitch Ton Toff IsolationOFF Voltage Limit for Disable (Pin 5) Voltage Limit for Enable (Pin 5) Logic Input Current (Pin 5) Turn-on Glitch Turn-on Time Turn-off Time Off Isolation 1 MHz, RL = 1 kΩ 60 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Note 3: The maximum continuous output current (IOUT) is determined by device power dissipation limitations. Note 4: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). Note 5: SD logic is CMOS compatible. To ensure proper logic level and to minimize power supply current, SD should typically be less than 10% of total supply voltage away from either supply rail. Note 6: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Note 7: Negative input current implies current flowing out of the device. Note 8: Drift determined by dividing the change in parameter at temperature extremes by the total temperature change. Note 9: This parameter is guaranteed by design and/or characterization and is not tested in production. Note 10: “VID” is input differential voltage (input overdrive). 7 www.national.com LMH6601/LMH6601Q Connection Diagram 6-Pin SC70 20136401 Top View Ordering Information Package Part Number LMH6601MG A95 LMH6601MGX 6-Pin SC70 LMH6601QMG AKA LMH6601QMGX Package Marking Transport Media 1k Units Tape and Reel 3k Units Tape and Reel 1k Units Tape and Reel 3k Units Tape and Reel NSC Drawing Features MAA06A AEC-Q100 grade 3 qualified. Automotive Grade Production Flow** **Automotive Grade (Q) product incorporates enhanced manufacturing and support processes for the automotive market, including defect detection methodologies. Reliability qualification is compliant with the requirements and temperature grades defined in the AEC-Q100 standard. Automotive grade products are identified with the letter Q. For more information, go to http://www.national.com/automotive. www.national.com 8 LMH6601/LMH6601Q Typical Performance Characteristics Frequency Response for Various Output Amplitudes Unless otherwise noted, all data is with AV = +2, RF = RG = 604Ω, VS = 3.3V, VOUT = VS/2, SD tied to V+, RL = 150Ω to V−, T = 25°C. Frequency Response for Various Output Amplitudes 20136413 20136414 Frequency Response for Various Output Amplitudes −3 dB BW vs. Supply Voltage for Various Output Swings 20136415 20136420 Non-inverting Frequency Response for Various Gain Inverting Frequency Response for Various Gain 20136416 20136417 9 www.national.com LMH6601/LMH6601Q Frequency Response for Various Loads Frequency Response for Various Supply Voltages 20136419 20136421 −3 dB BW vs. Ambient Temperature Frequency Response for Various Cap Load 20136422 20136418 Frequency Response for Various Supply Voltage Max Output Swing vs. Frequency 20136441 20136426 www.national.com 10 LMH6601/LMH6601Q Peak Output Swing vs. RL Output Swing vs. Sink Current for Various Supply Voltages 20136427 20136464 Output Swing vs. Source Current for Various Supply Voltages HD2 vs. Frequency 20136404 20136465 HD3 vs. Frequency THD vs. Output Swing 20136405 20136402 11 www.national.com LMH6601/LMH6601Q THD vs. Output Swing Slew Rate vs. Ambient Temperature 20136423 20136403 Settling Time (±1%) vs. Output Swing Output Settling 20136412 20136411 Isolation Resistor & Settling Time vs. CL Isolation Resistor & Settling Time vs. CL 20136428 20136429 www.national.com 12 LMH6601/LMH6601Q Closed Loop Output Impedance vs. Frequency for Various Supply Voltages Off Isolation vs. Frequency 20136408 20136410 Noise Voltage vs. Frequency Open Loop Gain/ Phase 20136424 20136435 CMRR vs. Frequency +PSRR vs. Frequency 20136425 20136439 13 www.national.com LMH6601/LMH6601Q −PSRR vs. Frequency Supply Current vs. Ambient Temperature 20136440 20136433 Supply Current vs. VCM Supply Current vs. Supply Voltage 20136437 20136467 Offset Voltage vs. Ambient Temperature for 3 Representative Units Offset Voltage Distribution 20136434 20136436 www.national.com 14 LMH6601/LMH6601Q Offset Voltage vs. VCM (Typical Part) Input Bias Current vs. Common Mode Voltage 20136438 20136442 Small Signal Step Response Large Signal Step Response 20136431 20136430 Large Signal Step Response Turn On/Off Waveform 20136466 20136432 15 www.national.com LMH6601/LMH6601Q DG vs. VOUT for Various VS DP vs. VOUT for Various VS 20136471 20136472 DG vs. VOUT (DC and AC Coupled Load Compared) DP vs. VOUT (DC and AC Coupled Load Compared) 20136473 20136474 www.national.com 16 LMH6601/LMH6601Q Application Information OPTIMIZING PERFORMANCE With many op amps, additional device non-linearity and sometimes less loop stability arises when the output has to switch from current-source mode to current-sink mode or vice versa. When it comes to achieving the lowest distortion and the best Differential Gain/ Differential Phase (DG/ DP, broadcast video specs), the LMH6601 is optimized for single supply DC coupled output applications where the load current is returned to the negative rail (V−). That is where the output stage is most linear (lowest distortion) and which corresponds to unipolar current flowing out of this device. To that effect, it is easy to see that the distortion specifications improve when the output is only sourcing current which is the distortion-optimized mode of operation for the LMH6601. In application where the LMH6601 output is AC coupled or when it is powered by separate dual supplies for V+ and V−, the output stage supplies both source and sink current to the load and results in less than optimum distortion (and DG/DP). Figure 1 compares the distortion results between a DC and an AC coupled load to show the magnitude of this difference. See the DG/DP plots in the Typical Performance Characteristics section for a comparison between DC and AC coupling of the video load. 20136470 FIGURE 2. Output Pull-Down Value for Dual Supply & AC Coupling Furthermore, with a combination of low closed loop gain setting (i.e. AV = +1 for example where device bandwidth is the highest), light output loading (RL > 1 kΩ) , and with a significant capacitive load (CL > 10 pF) , the LMH6601 is most stable if output sink current is kept to less than about 5 mA. The pulldown method described in Figure 2 is applicable in these cases as well where the current that would normally be sunk by the op amp is diverted to the RP path instead. SHUTDOWN CAPABILITY AND TURN ON/ OFF BEHAVIOR With the device in shutdown mode, the output goes into high impedance (ROUT > 100 MΩ) mode. In this mode, the only path between the inputs and the output pin is through the external components around the device. So, for applications where there is active signal connection to the inverting input, with the LMH6601 in shutdown, the output could show signal swings due to current flow through these external components. For non-inverting amplifiers in shutdown, no output swings would occur, because of complete input-output isolation, with the exception of capacitive coupling. For maximum power saving, the LMH6601 supply current drops to around 0.1 μA in shutdown. All significant power consumption within the device is disabled for this purpose. Because of this, the LMH6601 turn on time is measured in micro-seconds whereas its turn off is fast (nano-seconds) as would be expected from a high speed device like this. The LMH6601 SD pin is a CMOS compatible input with a picoampere range input current drive requirement. This pin needs to be tied to a level or otherwise the device state would be indeterminate. The device shutdown threshold is half way between the V+ and V− pin potentials at any supply voltage. For example, with V+ tied to 10V and V− equal to 5V, you can expect the threshold to be at 7.5V. The state of the device (shutdown or normal operation) is guaranteed over temperature as longs as the SD pin is held to within 10% of the total supply voltage. For V+ = 10V, V− = 5V, as an example: • Shutdown Range 5V ≤ SD ≤ 5.5V • Normal Operation Range 9.5V ≤ SD ≤ 10V 20136406 FIGURE 1. Distortion Comparison between DC & AC Coupling of the Load In certain applications, it may be possible to optimize the LMH6601 for best distortion (and DG/DP) even though the load may require bipolar output current by adding a pull-down resistor to the output. Adding an output pull-down resistance of appropriate value could change the LMH6601 output loading into source-only. This comes at the price of higher total power dissipation and increased output current requirement. Figure 2 shows how to calculate the pull-down resistor value for both the dual supply and for the AC coupled load applications. 17 www.national.com LMH6601/LMH6601Q OVERLOAD RECOVERY AND SWING CLOSE TO RAILS The LMH6601 can recover from an output overload in less than 20 ns. See Figure 3 below for the input and output scope photos: With some op amps, when the output approaches either one or both rails and saturation starts to set in, there is significant increase in the transistor parasitic capacitances which leads to loss of Phase Margin. That is why with these devices, there are sometimes hints of instability with output close to the rails. With the LMH6601, as can be seen in Figure 4, the output waveform remains free of instability throughout its range of voltages. SINGLE SUPPLY VIDEO APPLICATION The LMH6601’s high speed and fast slew rate make it an ideal choice for video amplifier and buffering applications. There are cost benefits in having a single operating supply. Single supply video systems can take advantage of the LMH6601’s low supply voltage operation along with its ability to operate with input common mode voltages at or slightly below the V − rail. Additional cost savings can be achieved by eliminating or reducing the value of the input and output AC coupling capacitors commonly employed in single supply video applications. This Application section shows some circuit techniques used to help in doing just that. 20136407 FIGURE 3. LMH6601 Output Overload Recovery Waveform In Figure 3, the input step function is set so that the output is driven to one rail and then the other and then the output recovery is measured from the time the input crosses 0V to when the output reaches this point. Also, when the LMH6601 input voltage range is exceeded near the V+ rail, the output does not experience output phase reversal, as some op amps do. This is particularly advantageous in applications where output phase reversal has to be avoided at all costs, such as in servo loop control among others. This adds to the LMH6601’s set of features which make this device easy to use. In addition, the LMH6601’s output swing close to either rail is well-behaved as can be seen in the scope photo of Figure 4. DC COUPLED, SINGLE SUPPLY BASEBAND VIDEO AMPLIFIER/DRIVER The LMH6601 output can swing very close to either rail to maximize the output dynamic range which is of particular interest when operating in a low voltage single supply environment. Under light output load conditions, the output can swing as close as a few milli-volts of either rail. This also allows a video amplifier to preserve the video black level for excellent video integrity. In the example shown below in Figure 5, the baseband video output is amplified and buffered by the LMH6601 which then drives the 75Ω back terminated video cable for an overall gain of +1 delivered to the 75Ω load. The input video would normally have a level between 0V to approximately 0.75V. 20136444 FIGURE 5. Single Supply Video Driver Capable of Maintaining Accurate Video Black Level 20136443 FIGURE 4. LMH6601’s “Clean” Swing to Either Rail www.national.com 18 LMH6601/LMH6601Q With the LMH6601 input common mode range including the V− (ground) rail, there will be no need for AC coupling or level shifting and the input can directly drive the non-inverting input which has the additional advantage of high amplifier input impedance. With LMH6601’s wide rail-to-rail output swing, as stated earlier, the video black level of 0V is maintained at the load with minimal circuit complexity and using no AC coupling capacitors. Without true rail-to-rail output swing of the LMH6601, and more importantly without the LMH6601’s ability of exceedingly close swing to V−, the circuit would not operate properly as shown at the expense of more complexity. This circuit will also work for higher input voltages. The only significant requirement is that there is at least 1.8V from the maximum input voltage to the positive supply (V+). The Composite Video Output of some low cost consumer video equipment consists of a current source which develops the video waveform across a load resistor (usually 75Ω), as shown in Figure 6 below. With these applications, the same circuit configuration just described and shown in Figure 6 will be able to buffer and drive the Composite Video waveform which includes sync and video combined. However, with this arrangement, the LMH6601 supply voltage needs to be at least 3.3V or higher in order to allow proper input common mode voltage headroom because the input can be as high as 1V peak. 20136446 FIGURE 7. Single Supply DC Coupled Composite Video Driver for Negative Going Sync Tip In the circuit of Figure 7, the input is shifted positive by means of R1, R2, and RT in order to satisfy U1’s Common Mode input range. The signal will loose 20% of its amplitude in the process. The closed loop gain of U1 will need to be set to make up for this 20% loss in amplitude. This gives rise to the gain expression shown below which is based on a getting a 2 VPP output with a 0.8 VPP input: (1) R3 will produce a negative shift at the output due to VS (3.3V in this case). R3 will need to be set so that the “Video In” sync tip (−0.3V at RT or 0.61V at U1 non-inverting input) corresponds to near 0V at the output. (2) Equation 1 and Equation 2 need to be solved simultaneously to arrive at the values of R3, RF, and RG which will satisfy both. From the datasheet, one can set RF = 620Ω to be close to the recommended value for a gain of +2. It is easier to solve for RG and R3 by starting with a good estimate for one and iteratively solving Equation and Equation 2 to arrive at the results. Here is one possible iteration cycle for reference: RF = 620Ω 20136445 FIGURE 6. Single Supply Composite Video Driver for Consumer Video Outputs If the “Video In” signal is Composite Video with negative going Sync tip, a variation of the previous configurations should be used. This circuit produces a unipolar (above 0V) DC coupled single supply video signal as shown in Figure 7. 19 www.national.com LMH6601/LMH6601Q TABLE 1. Finding Figure 7 External Resistor Values by Iteration Estimate RG (Ω) 1k 820 620 390 560 Calculated (from Equation 2) R3 (Ω) 1.69k 1.56k 1.37k 239 1.30k Equation 1 LHS Calculated 0.988 1.15 1.45 4.18 1.59 Comment (Compare Equation 1 LHS Calculated to RHS) Increase Equation 1 LHS by reducing RG Increase Equation 1 LHS by reducing RG Increase Equation 1 LHS by reducing RG Reduce Equation 1 LHS by increasing RG Close to target value of 1.5V/V for Equation 1 of the DC bias at the output, the load needs to be AC coupled as well through CO. Some applications implement a small valued ceramic capacitor (not shown) in parallel with CO which is electrolytic. The reason for this is that the ceramic capacitor will tend to shunt the inductive behavior of the Electrolytic capacitor at higher frequencies for an improved overall low impedance output. CG2 is intended to boost the high frequency gain in order to improve the video frequency response. This value is to be set and trimmed on the board to meet the application’s specific system requirements. The final set of values for RG and R3 in Table 1 are values which will result in the proper gain and correct video levels (0V to 1V) at the output (VLOAD). AC COUPLED VIDEO Many monitors and displays accept AC coupled inputs. This simplifies the amplification and buffering task in some respects. As can be seen in Figure 8, R1 and R2 simply set the input to the center of the input linear range while CIN AC couples the video onto the op amp’s input. The op amp is set for a closed loop gain of 2 with RF and RG. CG is there to make sure the device output is also biased at mid-supply. Because 20136449 FIGURE 8. AC Coupled Video Amplifier/Driver SAG COMPENSATION The capacitors shown in Figure 8 (except CG2), and especially CO, are the large electrolytic type which are considerably costly and take up valuable real estate on the board. It is possible to reduce the value of the output coupling capacitor, CO, which is the largest of all, by using what is called SAG compensation. SAG refers to what the output video experiences due to the low frequency video content it contains which cannot adequately go through the output AC coupling scheme due to the low frequency limit of this circuit. The −3 dB low frequency limit of the output circuit is given by: f_low_frequency (−3 dB)= 1/ (2*pi* 75*2(Ω) * CO) = ∼ 4.82 Hz For CO = 220 μF (3) A possible implementation of the SAG compensation is shown in Figure 9. www.national.com 20 LMH6601/LMH6601Q 20136450 FIGURE 9. AC Coupled Video Amplifier/Driver with SAG Compensation In this circuit, the output coupling capacitor value and size is reduced at the expense of a slightly more complicated circuitry. Note that C1 is not only part of the SAG compensation, but it also sets the amplifier’s DC gain to 0 dB so that the output is set to mid-rail for linearity purposes. Also note that exceptionally high values are chosen for the R1 and R2 biasing resistors (510 kΩ). The LMH6601 has extremely low input bias current which allows this selection thereby reducing the CIN value in this circuit such that CIN can even be a nonpolar capacitors which will reduce cost. At high enough frequencies where both CO and C1 can be considered to be shorted out, R3 shunts R4 and the closed loop gain is determined by: Closed_loop_Gain (V/V)= VL/VIN = (1+ (R3||R4)/ R5)x [RL/(RL+RO)]= 0.99V/V (4) 11 ms, CO is discharging through the load with no video activity to replenish that charge. Figure 10 shows the output of the Figure 9 circuit highlighting the SAG. At intermediate frequencies, where the CO, RO, RL path experiences low frequency gain loss, the R3, R5, C1 path provides feedback from the load side of CO. With the load side gain reduced at these lower frequencies, the feedback to the op amp inverting node reduces, causing an increase at the op amp's output as a response. For NTSC video, low values of CO influence how much video black level shift occurs during the vertical blanking interval (∼1.5 ms) which has no video activity and thus is sensitive to CO's charge dissipation through the load which could cause output SAG. An especially tough pattern is the NTSC pattern called “Pulse & Bar.” With this pattern the entire top and bottom portion of the field is black level video where, for about 20136451 FIGURE 10. Figure 9 Scope Photo Showing Video SAG With the circuit of Figure 9 and any other AC coupled pulse amplifier, the waveform duty cycle variations exert additional restrictions on voltage swing at any node. This is illustrated in the waveforms shown in Figure 11. 21 www.national.com LMH6601/LMH6601Q 20136452 FIGURE 11. Headroom Considerations with AC Coupled Amplifiers If a stage has a 3 VPP unclipped swing capability available at a given node, as shown in Figure 11, the maximum allowable amplitude for an arbitrary waveform is ½ of 3V or 1.5 VPP. This is due to the shift in the average value of the waveform as the duty cycle varies. Figure 11 shows what would happen if a 2 VPP signal were applied. A low duty cycle waveform, such as the one in Figure 11B, would have high positive excursions. At low enough duty cycles, the waveform could get clipped on the top, as shown, or a more subtle loss of linearity could occur prior to full-blown clipping. The converse of this occurs with high duty cycle waveforms and negative clipping, as depicted in Figure 11C. HOW TO PICK THE RIGHT VIDEO AMPLIFIER Apart from output current drive and voltage swing, the op amp used for a video amplifier/cable driver should also possess the minimum requirement for speed and slew rate. For video type loads, it is best to consider Large Signal Bandwidth (or LSBW in the National Semiconductor data sheet tables) as video signals could be as large as 2 VPP when applied to the commonly used gain of +2 configuration. Because of this relatively large swing, the op amp Slew Rate (SR) limitation should also be considered. Table 2 shows these requirements for various video line rates calculated using a rudimentary technique and intended as a first order estimate only. TABLE 2. Rise Time, −3 dB BW, and Slew Rate Requirements for Various Video Line Rates Video Standard TV_NTSC VGA SVGA XGA SXGA UXGA Line Rate (HxV) 451x483 640x480 800x600 1024x768 1280x1024 1600x1200 Refresh Rate (Hz) 30 75 75 75 75 75 Horizontal Active (KH%) 84 80 76 77 75 74 Vertical Active (KV%) 92 95 96 95 96 96 Pixel Time (ns) 118.3 33.0 20.3 12.4 7.3 4.9 Rise Time (ns) 39.4 11.0 6.8 4.1 2.4 1.6 LSBW (MHz) 9 32 52 85 143 213 SR (V/μs) 41 146 237 387 655 973 www.national.com 22 LMH6601/LMH6601Q For any video line rate (HxV corresponding to the number of Active horizontal and vertical lines), the speed requirements can be estimated if the Horizontal Active (KH%) and Vertical Active (KV%) numbers are known. These percentages correspond to the percentages of the active number of lines (horizontal or vertical) to the total number of lines as set by VESA standards. Here are the general expressions and the specific calculations for the SVGA line rate shown in Table 2. 20136458 (5) Requiring that an “On” pixel is illuminated to at least 90% of its final value before changing state will result in the rise/fall time equal to, at most, ⅓ the pixel time as shown below: (6) Assuming a single pole frequency response roll-off characteristic for the closed loop amplifier used, we have: (7) Rise/Fall times are 10%-90% transition times, which for a 2 VPP video step would correspond to a total voltage shift of 1.6V (80% of 2V). So, the Slew Rate requirement can be calculated as follows: (8) The LMH6601 specifications show that it would be a suitable choice for video amplifiers up to and including the SVGA line rate as demonstrated above. For more information about this topic and others relating to video amplifiers, please see Application Note 1013: http://www.national.com/an/AN/AN-1013.pdf#page=1 CURRENT TO VOLTAGE CONVERSION (TRANSIMPEDANCE AMPLIFIER (TIA)) Being capable of high speed and having ultra low input bias current makes the LMH6601 a natural choice for Current to Voltage applications such as photodiode I-V conversion. In these type of applications, as shown in Figure 12 below, the photodiode is tied to the inverting input of the amplifier with RF set to the proper gain (gain is measured in Ohms). FIGURE 12. Typical Connection of a Photodiode Detector to an op amp With the LMH6601 input bias current in the femto-amperes range, even large values of gain (RF) do not increase the output error term appreciably. This allows circuit operation to a lower light intensity level which is always of special importance in these applications. Most photo-diodes have a relatively large capacitance (CD) which would be even larger for a photo-diode designed for higher sensitivity to light because of its larger area. Some applications may run the photodiode with a reverse bias in order to reduce its capacitance with the disadvantage of increased contributions from both dark current and noise current. Figure 13 shows a typical photodiode capacitance plot vs. reverse bias for reference. 20136459 FIGURE 13. Typical Capacitance vs. Reverse Bias (Source: OSI Optoelectronics) 23 www.national.com LMH6601/LMH6601Q The diode capacitance (CD) along with the input capacitance of the LMH6601 (CA) has a bearing on the stability of this circuit and how it is compensated. With large transimpedance gain values (RF), the total combined capacitance on the amplifier inverting input (CIN = CD + CA) will work against RF to create a zero in the Noise Gain (NG) function (see Figure 14). If left untreated, at higher frequencies where NG equals the open loop transfer function there will be excess phase shift around the loop (approaching 180°) and therefore, the circuit could be unstable. This is illustrated in Figure 14. Figure 14 shows that placing a capacitor, CF, with the proper value, across RF will create a pole in the NG function at fP. For optimum performance, this capacitor is usually picked so that NG is equal to the op amp's open loop gain at fP. This will cause a “flattening” of the NG slope beyond the point of intercept of the two plots (open loop gain and NG) and will results in a Phase Margin (PM) of 45° assuming fP and fZ are at least a decade apart. This is because at the point of intercept, the NG pole at fP will have a 45° phase lead contribution which leaves 45° of PM. For reference, Figure 14 also shows the transimpedance gain (I-V (Ω)) Here is the theoretical expression for the optimum CF value and the expected −3 dB bandwidth: (9) (10) Table 3, below, lists the results, along with the assumptions and conditions, of testing the LMH6601 with various photodiodes having different capacitances (CD) at a transimpedance gain (RF) of 10 kΩ. 20136460 FIGURE 14. Transimpedance Amplifier Graphical Stability Analysis and Compensation TABLE 3. Transimpedance Amplifier Figure 12 Compensation and Performance Results CD (pF) 10 50 500 CIN (pF) 12 52 502 CF_Calculated (pF) 1.1 2.3 7.2 CF used (pF) 1 3 8 −3 dB BW Calculated (MHz) 14 7 2 −3 dB BW Measured (MHz) 15 7.0 2.5 Step Response Overshoot (%) 6 4 9 CA = 2 pF GBWP = 155 MHz VS = 5V www.national.com 24 LMH6601/LMH6601Q TRANSIMPEDANCE AMPLIFIER NOISE CONSIDERATIONS When analyzing the noise at the output of the I-V converter, it is important to note that the various noise sources (i.e. op amp noise voltage, feedback resistor thermal noise, input noise current, photodiode noise current) do not all operate over the same frequency band. Therefore, when the noise at the output is calculated, this should be taken into account. The op amp noise voltage will be gained up in the region between the noise gain’s “zero” and its “pole” (fz and fp in Figure 14). The higher the values of RF and CIN, the sooner the noise gain peaking starts and therefore its contribution to the total output noise would be larger. It is obvious to note that it is advantageous to minimize CIN (e.g. by proper choice of op amp, by applying a reverse bias across the diode at the expense of excess dark current and noise). However, most low noise op amps have a higher input capacitance compared to ordinary op amps. This is due to the low noise op amp’s larger input stage. OTHER APPLICATIONS 20136468 FIGURE 16. In-Loop Compensation Circuit for Driving a Heavy Capacitive Load When driving a high capacitive load, an isolation resistor (RS) should be connected in series between the op amp output and the capacitive load to provide isolation and to avoid oscillations. A small value capacitor (CF) is inserted between the op amp output and the inverting input as shown such that this capacitor becomes the dominant feedback path at higher frequency. Together these components allow heavy capacitive loading while keeping the loop stable. There are few factors which affect the driving capability of the op amp: • Op amp internal architecture • Closed loop gain and output capacitor loading Table 4 shows the measured step response for various values of load capacitors (CL), series resistor (RS) and feedback resistor (CF) with gain of +2 (RF = RG = 604Ω) and RL = 2 kΩ: TABLE 4. LMH6601 Step Response Summary for the Circuit of Figure 16 CL (pF) 10 50 110 300 RS (Ω) 0 0 47 6 80 192 CF (pF) 1 1 1 10 10 10 trise/ tfall (ns) 6* 7* 10 12 33 65 Overshoot (%) 8 6 16 20 10 10 20136463 500 910 FIGURE 15. Charge Preamplifier Taking Advantage of LMH6601’s Femto-Ampere Range Input Bias Current CAPACITIVE LOAD The LMH6601 can drive a capacitive load of up to 1000 pF with correct isolation and compensation. Figure 16 illustrates the in-loop compensation technique to drive a large capacitive load. * Response limited by input step generator rise time of 5 ns Figure 17 shows the increase in rise/fall time (bandwidth decrease) at VOUT with larger capacitive loads, illustrating the trade-off between the two: 25 www.national.com LMH6601/LMH6601Q EVALUATION BOARD National Semiconductor provides the following evaluation board as a guide for high frequency layout and as an aid in device testing and characterization. Many of the datasheet plots were measured with this board: Device LMH6601MG Package SC70-6 Board Part # LMH730165 This evaluation board can be shipped when a device sample request is placed with National Semiconductor. 20136469 FIGURE 17. LMH6601 In-Loop Compensation Response www.national.com 26 LMH6601/LMH6601Q Physical Dimensions inches (millimeters) unless otherwise noted 6-Pin SC70 NS Package Number MA006A 27 www.national.com LMH6601/LMH6601Q 250 MHz, 2.4V CMOS Operational Amplifier with Shutdown Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers Audio Clock and Timing Data Converters Interface LVDS Power Management Switching Regulators LDOs LED Lighting Voltage Reference PowerWise® Solutions Serial Digital Interface (SDI) Temperature Sensors Wireless (PLL/VCO) www.national.com/amplifiers www.national.com/audio www.national.com/timing www.national.com/adc www.national.com/interface www.national.com/lvds www.national.com/power www.national.com/switchers www.national.com/ldo www.national.com/led www.national.com/vref www.national.com/powerwise www.national.com/sdi www.national.com/tempsensors www.national.com/wireless WEBENCH® Tools App Notes Reference Designs Samples Eval Boards Packaging Green Compliance Distributors Design Support www.national.com/webench www.national.com/appnotes www.national.com/refdesigns www.national.com/samples www.national.com/evalboards www.national.com/packaging www.national.com/quality/green www.national.com/contacts www.national.com/quality www.national.com/feedback www.national.com/easy www.national.com/solutions www.national.com/milaero www.national.com/solarmagic www.national.com/AU Quality and Reliability Feedback/Support Design Made Easy Solutions Mil/Aero Solar Magic® Analog University® THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS. EXCEPT AS PROVIDED IN NATIONAL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NATIONAL ASSUMES NO LIABILITY WHATSOEVER, AND NATIONAL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE AND/OR USE OF NATIONAL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. Copyright© 2009 National Semiconductor Corporation For the most current product information visit us at www.national.com National Semiconductor Americas Technical Support Center Email: support@nsc.com Tel: 1-800-272-9959 www.national.com National Semiconductor Europe Technical Support Center Email: europe.support@nsc.com German Tel: +49 (0) 180 5010 771 English Tel: +44 (0) 870 850 4288 National Semiconductor Asia Pacific Technical Support Center Email: ap.support@nsc.com National Semiconductor Japan Technical Support Center Email: jpn.feedback@nsc.com