LMH6618 130 MHz, 1.25 mA Rail-to-Rail Input and Output Operational Amplifier with Shutdown
August 2007
LMH6618 130 MHz, 1.25 mA Rail-to-Rail Input and Output Operational Amplifier with Shutdown
General Description
The LMH6618 is a 130 MHz rail-to-rail input and output amplifier designed for ease of use in a wide range of applications requiring high speed, low supply current, low noise, and the ability to drive complex ADC and video loads. The operating voltage range extends from 2.7V to 11V and the supply current is typically 1.25 mA at 5V. The amplifier’s voltage feedback design topology provides balanced inputs and high open loop gain for ease of use and accuracy in applications such as active filter design. Offset voltage is typically 0.1 mV and settling time to 0.01% is 120 ns which combined with an 80 dBc SFDR at 1 MHz makes the part suitable for use as an input buffer for popular 10-bit and 12-bit mega-sample ADCs. The input common mode range extends 200 mV beyond the supply rails. The output swings to within 270 mV of the supply rails for a 150Ω load and 83 mV of the supply rail for a 1 kΩ load providing true single supply operation and maximum signal dynamic range on low power rails. The amplifier output will source and sink 35 mA and drive up to 15 pF loads without the need for external compensation. The LMH6618 has an active low disable pin which reduces the supply current to 72 µA and is offered in the space saving 6-Pin TSOT23 package. The LMH6618 is available with a −40°C to +125°C extended industrial temperature grade.
Features
VS = 5V, RL = 1 kΩ, TA = 25°C and AV = +1, unless otherwise specified. 2.7V to 11V ■ Operating voltage range 1.25 mA ■ Supply current 130 MHz ■ Small signal bandwidth 55 V/µs ■ Slew rate 90 ns ■ Settling time to 0.1% 120 ns ■ Settling time to 0.01% 80 dBc ■ SFDR (f = 1 MHz, AV = +1, VOUT = 2 VPP) 15 MHz ■ 0.1 dB bandwidth (AV = +2) 10 nV/√Hz ■ Low voltage noise −40°C to +125°C ■ Industrial temperature grade ■ Rail-to-Rail input and output
Applications
■ ■ ■ ■ ■ ■ ■
ADC driver DAC buffer Active filters High speed sensor amplifier Current sense amplifier Portable video STB, TV video amplifier
Typical Application
20195829
WEBENCH® is a registered trademark of National Semiconductor Corporation.
© 2007 National Semiconductor Corporation
201958
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LMH6618
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Human Body Model For input pins only For all other pins Machine Model
Supply Voltage (VS = V+ – V−) Junction Temperature (Note 3)
12V 150°C max (Note 1) 2.7V to 11V −40°C to +125°C 231°C/W
Operating Ratings
V+ V−)
Supply Voltage (VS = – Ambient Temperature Range (Note 3) 2000V 2000V 200V Package Thermal Resistance (θJA) 6-Pin TSOT23
+3V Electrical Characteristics
Symbol Parameter
Unless otherwise specified, all limits are guaranteed for TJ = +25°C, V+ = 3V, V− = 0V, DISABLE = 3V, VCM = VO = V+/2, AV = +1 (RF = 0Ω), otherwise RF = 2 kΩ for AV ≠ +1, RL = 1 kΩ || 5 pF. Boldface Limits apply at temperature extremes. (Note 4) Condition Min (Note 8) Typ (Note 7) 120 56 55 71 13 13 1.5 15 0.1 0.1 MHz dB MHz % deg MHz MHz Max (Note 8) Units
Frequency Domain Response SSBW –3 dB Bandwidth Small Signal AV = 1, RL = 1 kΩ, VOUT = 0.2 VPP AV = 2, −1, RL = 1 kΩ, VOUT = 0.2 VPP GBW LSBW Gain Bandwidth −3 dB Bandwidth Large Signal AV = 10, RF = 2 kΩ, RG = 221Ω, RL = 1 kΩ, VOUT = 0.2 VPP AV = 1, RL = 1 kΩ, VOUT = 2 VPP AV = 2, RL = 150Ω, VOUT = 2 VPP Peak 0.1 dBBW DG DP Peaking 0.1 dB Bandwidth Differential Gain Differential Phase AV = 1, CL = 5 pF AV = 2, VOUT = 0.5 VPP , RF = RG = 825Ω AV = +2, 4.43 MHz, 0.6V < VOUT < 2V, RL = 150Ω to RL = 150Ω to Time Domain Response tr/tf SR ts_0.1 ts_0.01 SFDR Rise & Fall Time Slew Rate 0.1% Settling Time 0.01% Settling Time Spurious Free Dynamic Range 2V Step, AV = 1 2V Step, AV = 1 2V Step, AV = −1 2V Step, AV = −1 fC = 100 kHz, VOUT= 2 VPP, RL = 1 kΩ fC = 1 MHz, VOUT = 2 VPP, RL = 1 kΩ fC = 5 MHz, VOUT = 2 VPP, RL = 1 kΩ en in VOS TCVOS IB IO CIN RIN Input Voltage Noise Input Current Noise Input Offset Voltage Input Offset Voltage Average Drift Input Bias Current Input Offset Current Input Capacitance Input Resistance f = 100 kHz f = 100 kHz VCM = 0.5V (pnp active) VCM = 2.5V (npn active) (Note 5) VCM = 0.5V (pnp active) VCM = 2.5V (npn active) 36 36 46 90 120 100 80 58 10 1 0.1 0.8 −1.4 +1.0 0.01 1.5 8 −2.6 +1.8 ±0.27 ±0.6 ±1.0 nV/ pA/ dBc ns V/μs ns V+/2 V+/2 AV = +2, 4.43 MHz, 0.6V < VOUT < 2V,
Noise and Distortion Performance
Input, DC Performance mV μV/°C μA μA pF MΩ
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LMH6618
Symbol CMVR CMRR AOL
Parameter Input Voltage Range
Condition DC, CMRR ≥ 65 dB VCM Stepped from 2.0V to 3.1V
Min (Note 8) −0.2 78 81
Typ (Note 7) 96 107 98 82
Max (Note 8) 3.2
Units V dB dB
Common Mode Rejection Ratio VCM Stepped from −0.1V to 1.4V Open Loop Gain RL = 1 kΩ to V+/2 RL = 150Ω to V+/2
Output DC Characteristics VO Output Swing High (Voltage from V+ Supply Rail) RL = 1 kΩ to V+/2 RL =150Ω to V+/2 Output Swing Low (Voltage from V− Supply Rail) RL = 1 kΩ to V+/2 RL =150Ω to V+/2 RL = 150Ω to V− IOUT RO Linear Output Current Output Resistance VOUT = V+/2 (Note 6) f = 1 MHz 2.0 0.04 1.0 1 25 90 DC, VCM = 0.5V, VS = 2.7V to 11V RL = ∞ DISABLE = 0V 84 104 1.2 59 1.5 1.7 85 ±25 56 62 172 198 50 160 60 170 29 ±35 0.17 66 74 184 217 39 43 mA Ω V µA V µA ns ns dB mA μA
mV
Enable Pin Operation Enable High Voltage Threshold Enabled Enable Pin High Current Enable Low Voltage Threshold Enable Pin Low Current Ton Toff PSRR IS ISD Turn-On Time Turn-Off Time Power Supply Rejection Ratio Supply Current Disable Shutdown Current VDISABLE = 3V Disabled VDISABLE = 0V
Power Supply Performance
+5V Electrical Characteristics
Symbol Parameter
Unless otherwise specified, all limits are guaranteed for TJ = +25°C, V+ = 5V, V− = 0V, DISABLE = 5V, VCM = VO = V+/2, AV = +1 (RF = 0Ω), otherwise RF = 2 kΩ for AV ≠ +1, RL = 1 kΩ || 5 pF. Boldface Limits apply at temperature extremes. Condition Min (Note 8) Typ (Note 7) 130 53 54 64 15 15 0.5 15 0.1 MHz dB MHz % MHz MHz Max (Note 8) Units
Frequency Domain Response SSBW –3 dB Bandwidth Small Signal AV = 1, RL = 1 kΩ, VOUT = 0.2 VPP AV = 2, −1, RL = 1 kΩ, VOUT = 0.2 VPP GBW LSBW Gain Bandwidth −3 dB Bandwidth Large Signal AV = 10, RF = 2 kΩ, RG = 221Ω, RL = 1 kΩ, VOUT = 0.2 VPP AV = 1, RL = 1 kΩ, VOUT = 2 VPP AV = 2, RL = 150Ω, VOUT = 2 VPP Peak 0.1 dBBW DG Peaking 0.1 dB Bandwidth Differential Gain AV = 1, CL = 5 pF AV = 2, VOUT = 0.5 VPP, RF = RG = 1 kΩ AV = +2, 4.43 MHz, 0.6V < VOUT < 2V, RL = 150Ω to V+/2
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LMH6618
Symbol DP
Parameter Differential Phase
Condition AV = +2, 4.43 MHz, 0.6V < VOUT < 2V, RL = 150Ω to V+/2
Min (Note 8)
Typ (Note 7) 0.1
Max (Note 8)
Units deg
Time Domain Response tr/tf SR ts_0.1 ts_0.01 SFDR Rise & Fall Time Slew Rate 0.1% Settling Time 0.01% Settling Time Spurious Free Dynamic Range 2V Step, AV = 1 2V Step, AV = 1 2V Step, AV = −1 2V Step, AV = −1 fC = 100 kHz, VOUT = 2 VPP, RL = 1 kΩ fC = 1 MHz, VOUT = 2 VPP, RL = 1 kΩ fC = 5 MHz, VO = 2 VPP, RL = 1 kΩ en in VOS TCVOS IB IO CIN RIN CMVR CMRR AOL Input Voltage Noise Input Current Noise Input Offset Voltage Input Offset Voltage Average Drift Input Bias Current Input Offset Current Input Capacitance Input Resistance Input Voltage Range Common Mode Rejection Ratio Open Loop Gain DC, CMRR ≥ 65 dB VCM Stepped from −0.1V to 3.4V VCM Stepped from 4.0V to 5.1V RL = 1 kΩ to V+/2 RL = 150Ω to V+/2 Output DC Characteristics VO Output Swing High (Voltage from V+ Supply Rail) RL = 1 kΩ to V+/2 RL =150Ω to V+/2 Output Swing Low (Voltage from V− Supply Rail) RL = 1 kΩ to V+/2 RL =150Ω to V+/2 RL = 150Ω to V− IOUT RO Linear Output Current Output Resistance Enable High Voltage Threshold Enable Pin High Current Enable Low Voltage Threshold Enable Pin Low Current Ton Toff Turn-On Time Turn-Off Time
4
30 44 55 90 120 100 80 58 10 1 0.1 0.8 −1.5 +1.0 0.01 1.5 8 −0.2 81 84 98 108 100 83 73 82 255 295 60 230 75 250 32 ±25 ±35 0.17 3.0 1.2 2.0 2.5 25 90 83 96 270 321 43 45 5.2 −2.4 +1.9 ±0.26 ±0.6 ±1.0
ns V/μs ns
Distortion and Noise Performance dBc
f = 100 kHz f = 100 kHz VCM = 0.5V (pnp active) VCM = 4.5V (npn active) (Note 5) VCM = 0.5V (pnp active) VCM = 4.5V (npn active)
nV/ pA/
Input, DC Performance mV µV/°C
μA μA pF MΩ V dB dB
mV
VOUT = V+/2 (Note 6) f = 1 MHz Enabled VDISABLE = 5V Disabled VDISABLE = 0V
mA Ω V µA V µA ns ns
Enable Pin Operation
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LMH6618
Symbol
Parameter
Condition
Min (Note 8) 84
Typ (Note 7) 104 1.25 72
Max (Note 8)
Units
Power Supply Performance PSRR IS ISD Power Supply Rejection Ratio Supply Current Disable Shutdown Current DC, VCM = 0.5V, VS = 2.7V to 11V RL = ∞ DISABLE = 0V dB 1.5 1.7 105 mA μA
±5V Electrical Characteristics
Symbol Parameter
Unless otherwise specified, all limits are guaranteed for TJ = +25°C, V+ = 5V, V− = −5V, DISABLE = 5V, VCM = VO = 0V, AV = +1 (RF = 0Ω), otherwise RF = 2 kΩ for AV ≠ +1, RL = 1 kΩ || 5 pF. Boldface Limits apply at temperature extremes. Condition Min (Note 8) Typ (Note 7) 140 53 54 65 16 15 0.05 15 0.1 0.1 MHz dB MHz % deg MHz MHz Max (Note 8) Units
Frequency Domain Response SSBW –3 dB Bandwidth Small Signal AV = 1, RL = 1 kΩ, VOUT = 0.2 VPP AV = 2, −1, RL = 1 kΩ, VOUT = 0.2 VPP GBW LSBW Gain Bandwidth −3 dB Bandwidth Large Signal AV = 10, RF = 2 kΩ, RG = 221Ω, RL = 1 kΩ, VOUT = 0.2 VPP AV = 1, RL = 1 kΩ, VOUT = 2 VPP AV = 2, RL = 150Ω, VOUT = 2 VPP Peak 0.1 dBBW DG DP Peaking 0.1 dB Bandwidth Differential Gain Differential Phase AV = 1, CL = 5 pF AV = 2, VOUT = 0.5 VPP, RF = RG = 1.21 kΩ AV = +2, 4.43 MHz, 0.6V < VOUT < 2V, RL = 150Ω to V+/2 AV = +2, 4.43 MHz, 0.6V < VOUT < 2V, RL = 150Ω to V+/2 Time Domain Response tr/tf SR ts_0.1 ts_0.01 SFDR Rise & Fall Time Slew Rate 0.1% Settling Time 0.01% Settling Time Spurious Free Dynamic Range 2V Step, AV = 1 2V Step, AV = 1 2V Step, AV = −1 2V Step, AV = −1 fC = 100 kHz, VOUT = 2 VPP, RL = 1 kΩ fC = 1 MHz, VOUT = 2 VPP, RL = 1 kΩ fC = 5 MHz, VOUT = 2 VPP, RL = 1 kΩ en in VOS TCVOS IB IO CIN RIN CMVR Input Voltage Noise Input Current Noise Input Offset Voltage Input Offset Voltage Average Drift Input Bias Current Input Offset Current Input Capacitance Input Resistance Input Voltage Range DC, CMRR ≥ 65 dB −5.2 f = 100 kHz f = 100 kHz VCM = −4.5V (pnp active) VCM = 4.5V (npn active) (Note 5) VCM = −4.5V (pnp active) VCM = 4.5V (npn active) 45 30 57 90 120 100 80 58 10 1 0.1 0.9 −1.5 +1.0 0.01 1.5 8 5.2 −2.4 +1.9 ±0.26 ±0.6 ±1.0 nV/ pA/ dBc ns V/μs ns
Noise and Distortion Performance
Input DC Performance mV µV/°C
μA μA pF MΩ V
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LMH6618
Symbol CMRR AOL
Parameter Common Mode Rejection Ratio Open Loop Gain
Condition VCM Stepped from −5.1V to 3.4V VCM Stepped from 4.0V to 5.1V RL = 1 kΩ to V+/2 RL = 150Ω to V+/2
Min (Note 8) 84 83
Typ (Note 7) 100 108 95 84
Max (Note 8)
Units
dB dB
Output DC Characteristics VO Output Swing High (Voltage from V+ Supply Rail) RL = 1 kΩ to GND RL =150Ω to GND Output Swing Low (Voltage from V− Supply Rail) RL = 1 kΩ to GND RL =150Ω to GND RL = 150Ω to V− IOUT RO Linear Output Current Output Resistance Enable High Voltage Threshold Enable Pin High Current Enable Low Voltage Threshold Enable Pin Low Current Ton Toff PSRR IS ISD Turn-On Time Turn-Off Time Power Supply Rejection Ratio Supply Current Disable Shutdown Current DC, VCM = −4.5V, VS = 2.7V to 11V RL = ∞ DISABLE = −5V 84 VOUT = V+/2 (Note 6) f = 1 MHz Enabled VDISABLE = +5V Disabled VDISABLE = −5V 17 25 90 104 1.35 103 1.6 1.9 140 5.5 16 4.5 ±25 111 126 457 526 100 430 110 440 35 ±35 0.17 121 136 474 559 51 52 mA Ω V µA V µA ns ns dB mA μA
mV
Enable Pin Operation
Power Supply Performance
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). Note 3: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board. Note 4: Boldface limits apply to temperature range of −40°C to 125°C Note 5: Voltage average drift is determined by dividing the change in VOS by temperature change. Note 6: Do not short circuit the output. Continuous source or sink currents larger than the IOUT typical are not recommended as it may damage the part. Note 7: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Note 8: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using the Statistical Quality Control (SQC) method.
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LMH6618
Connection Diagram
6-Pin TSOT23
20195801
Top View
Ordering Information
Package 6-Pin TSOT23 Part Number LMH6618MK LMH6618MKX Package Marking AE4A Transport Media 1k Units Tape and Reel 3k Units Tape and Reel NSC Drawing MK06A
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LMH6618
Typical Performance Characteristics
unless otherwise specified. Closed Loop Frequency Response for Various Supplies
At TJ = 25°C, AV = +1 (RF = 0Ω), otherwise RF = 2 kΩ for AV ≠ +1,
Closed Loop Frequency Response for Various Supplies
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Closed Loop Frequency Response for Various Supplies
Closed Loop Frequency Response for Various Supplies
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Closed Loop Frequency Response for Various Temperatures
Closed Loop Frequency Response for Various Temperatures
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LMH6618
Closed Loop Gain vs. Frequency for Various Gains
Large Signal Frequency Response
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±0.1 dB Gain Flatness for Various Supplies
Small Signal Frequency Response with Various Capacitive Load
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20195826
Small Signal Frequency Response with Capacitive Load and Various RISO
HD2 vs. Frequency and Supply Voltage
20195835 20195827
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LMH6618
HD3 vs. Frequency and Supply Voltage
HD2 and HD3 vs. Frequency and Load
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20195871
HD2 and HD3 vs. Common Mode Voltage
HD2 and HD3 vs. Common Mode Voltage
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20195873
HD2 vs. Frequency and Gain
HD3 vs. Frequency and Gain
20195874
20195875
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LMH6618
Open Loop Gain/Phase
HD2 vs. Output Swing
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HD3 vs. Output Swing
HD2 vs. Output Swing
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HD2 vs. Output Swing
HD3 vs. Output Swing
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LMH6618
HD3 vs. Output Swing
THD vs. Output Swing
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20195847
Settling Time vs. Input Step Amplitude (Output Slew and Settle Time)
Input Noise vs. Frequency
20195876 20195821
VOS vs. VOUT
VOS vs. VOUT
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20195850
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LMH6618
VOS vs. VCM
VOS vs. VS (pnp)
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20195852
VOS vs. VS (npn)
VOS vs. IOUT
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20195854
VOS Distribution (pnp and npn)
IB vs. VS (pnp)
20195855 20195877
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LMH6618
IB vs. VS (npn)
IS vs. VS
20195856
20195857
VOUT vs. VS
VOUT vs. VS
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VOUT vs. VS
Closed Loop Output Impedance vs. Frequency AV = +1
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LMH6618
PSRR vs. Frequency
PSRR vs. Frequency
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20195838
CMRR vs. Frequency
Small Signal Step Response
20195805 20195823
Small Signal Step Response
Small Signal Step Response
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20195804
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LMH6618
Small Signal Step Response
Small Signal Step Response
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Small Signal Step Response
Small Signal Step Response
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Small Signal Step Response
Small Signal Step Response
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Large Signal Step Response
Large Signal Step Response
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20195814
Overload Recovery Waveform
IS vs. VDISABLE
20195824 20195861
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LMH6618
Application Information
The LMH6618 is based on National Semiconductor’s proprietary VIP10 dielectrically isolated bipolar process. This device family architecture features the following: • Complimentary bipolar devices with exceptionally high ft (∼8GHz) even under low supply voltage (2.7V) and low bias current. • Common emitter push-push output stage. This architecture allows the output to reach within millivolts of either supply rail. • Consistent performance from any supply voltage (2.7V 11V) with little variation with supply voltage for the most important specifications (e.g. BW, SR, IOUT.) • Significant power saving compared to competitive devices on the market with similar performance. With 3V supplies and a common mode input voltage range that extends beyond either supply rail, the LMH6618 is well suited to many low voltage/low power applications. Even with 3V supplies, the −3 dB BW (at AV = +1) is typically 120 MHz. The LMH6618 is designed to avoid output phase reversal. With input over-drive, the output is kept near the supply rail (or as close to it as mandated by the closed loop gain setting and the input voltage). Figure 1 shows the input and output voltage when the input voltage significantly exceeds the supply voltages.
which will reduce the supply current to typically less than 100 µA. The DISABLE pin is “active low” and should be connected through a resistor to V+ for normal operation. Shutdown is guaranteed when the DISABLE pin is 0.5V below the supply midpoint at any operating supply voltage and temperature. In the shutdown mode, essentially all internal device biasing is turned off in order to minimize supply current flow and the output goes into high impedance mode. During shutdown, the input stage has an equivalent circuit as shown in Figure 2.
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FIGURE 2. Input Equivalent Circuit During Shutdown When the LMH6618 is shutdown, there may be current flow through the internal diodes shown, caused by input potential, if present. This current may flow through the external feedback resistor and result in an apparent output signal. In most shutdown applications the presence of this output is inconsequential. However, if the output is “forced” by another device, the other device will need to conduct the current described in order to maintain the output potential. To keep the output at or near ground during shutdown when there is no other device to hold the output low, a switch using a transistor can be used to shunt the output to ground. SINGLE CHANNEL ADC DRIVER The low noise and wide bandwidth make the LMH6618 an excellent choice for driving a 12-bit ADC. Figure 3 shows the schematic of the LMH6618 driving an ADC121S101. The ADC121S101 is a single channel 12-bit ADC. The LMH6618 is set up in a 2nd order multiple-feedback configuration with a gain of −1. The −3 db point is at 500 kHz and the −0.01 dB point is at 100 kHz. Table 1 shows the performance data of the LMH6618 and the ADC121S101.
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FIGURE 1. Input and Output Shown with CMVR Exceeded If the input voltage range is exceeded by more than a diode drop beyond either rail, the internal ESD protection diodes will start to conduct. The current flow in these ESD diodes should be externally limited. The LMH6618 can be shutdown by connecting the DISABLE pin to a voltage 0.5V below the supply midpoint
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LMH6618
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FIGURE 3. LMH6618 Driving an ADC121S101
TABLE 1. Performance Data for the LMH6618 Driving an ADC121S101 Parameter Signal Frequency Signal Amplitude SINAD SNR THD SFDR ENOB When the op amp and the ADC are using the same supply, it is important that both devices are well bypassed. A 0.1 µF ceramic capacitor and a 10 µF tantalum capacitor should be located as close as possible to each supply pin. A sample Measured Value 100 kHz 4.5V 71.5 dB 71.87 dB −82.4 dB 90.97 dB 11.6 bits layout is shown in Figure 4. The 0.1 µF capacitors (C13 and C6) and the 10 µF capacitors (C11 and C5) are located very close to the supply pins of the LMH6618 and the ADC121S101.
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20195840
FIGURE 4. LMH6618 and ADC121S101 Layout DIFFERENTIAL ADC DRIVER The circuit in Figure 3 can be used to drive both inputs of a differential ADC. Figure 5 shows the LMH6618 driving an ADC121S705. The ADC121S705 is a fully differential 12-bit ADC. Performance with this circuit is similar to the circuit in Figure 3.
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FIGURE 5. LMH6618 Driving an ADC121S705
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LMH6618
DC LEVEL SHIFTING Often a signal must be both amplified and level shifted while using a single supply for the op amp. The circuit in Figure 6 can do both of these tasks. The procedure for specifying the resistor values is as follows. 1. Determine the input voltage. 2. Calculate the input voltage midpoint, VINMID = VINMIN + (VINMAX – VINMIN)/2. 3. Determine the output voltage needed. 4. Calculate the output voltage midpoint, VOUTMID = VOUTMIN + (VOUTMAX – VOUTMIN)/2. 5. Calculate the gain needed, gain = (VOUTMAX – VOUTMIN)/ (VINMAX – VINMIN) 6. Calculate the amount the voltage needs to be shifted from input to output, ΔVOUT = VOUTMID – gain x VINMID. 7. Set the supply voltage to be used. 8. Calculate the noise gain, noise gain = gain + ΔVOUT/VS. 9. Set RF. 10. Calculate R1, R1 = RF/gain. 11. Calculate R2, R2 = RF/(noise gain-gain). 12. Calculate RG, RG= RF/(noise gain – 1). Check that both the VIN and VOUT are within the voltage ranges of the LMH6618. The following example is for a VIN of 0V to 1V with a VOUT of 2V to 4V. 1. VIN = 0V to 1V. 2. VINMID = 0V + (1V – 0V)/2 = 0.5V. 3. VOUT = 2V to 4V. 4. VOUTMID = 2V + (4V – 2V)/2 = 3V. 5. Gain = (4V – 2V)/(1V – 0V) = 2 6. ΔVOUT = 3V – 2 x 0.5V = 2.
7. 8. 9. 10. 11. 12.
For the example the supply voltage will be +5V. Noise gain = 2 + 2/5V = 2.4. RF = 2 kΩ R1 = 2 kΩ/2 = 1 kΩ R2 = 2 kΩ/(2.4-2) = 5 kΩ. RG = 2 kΩ/(2.4 – 1) = 1.43 kΩ.
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FIGURE 6. DC Level Shifting 4th ORDER MULTIPLE FEEDBACK LOW-PASS FILTER Figure 7 shows the LMH6618 used as the amplifier in a multiple feedback low-pass filter. This filter is set up to have a gain of +1 and a −3 dB point of 1 MHz. Values can be determined by using the WEBENCH® Active Filter Designer found at amplifiers.national.com.
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FIGURE 7. 4th Order Multiple Feedback Low-Pass Filter
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LMH6618
CURRENT SENSE AMPLIFIER With it’s rail-to-rail input and output capability, low VOS, and low IB the LMH6618 is an ideal choice for a current sense amplifier application. Figure 8 shows the schematic of the LMH6618 set up in a low-side sense configuration which provides a conversion gain of 2V/A. Voltage error due to VOS can be calculated to be VOS x (1 + RF/RG) or 0.6 mV x 21 = 12.6 mV. Voltage error due to IO is IO x RF or 0.26 µA x 1 kΩ = 0.26 mV. Hence total voltage error is 12.6 mV + 0.26 mV or 12.86 mV which translates into a current error of 12.86 mV/(2 V/A) = 6.43 mA.
(1)
(2)
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FIGURE 8. Current Sense Amplifier
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TRANSIMPEDANCE AMPLIFIER By definition, a photodiode produces either a current or voltage output from exposure to a light source. A Transimpedance Amplifier (TIA) is utilized to convert this low-level current to a usable voltage signal. The TIA often will need to be compensated to insure proper operation.
FIGURE 10. Bode Plot of Noise Gain Intersecting with Op Amp Open-Loop Gain Figure 10 shows the bode plot of the noise gain intersecting the op amp open loop gain. With larger values of gain, CT and RF create a zero in the transfer function. At higher frequencies the circuit can become unstable due to excess phase shift around the loop. A pole at fP in the noise gain function is created by placing a feedback capacitor (CF) across RF. The noise gain slope is flattened by choosing an appropriate value of CF for optimum performance. Theoretical expressions for calculating the optimum value of CF and the expected −3 dB bandwidth are:
(3)
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(4) FIGURE 9. Photodiode Modeled with Capacitance Elements Figure 9 shows the LMH6618 modeled with photodiode and the internal op amp capacitances. The LMH6618 allows circuit operation of a low intensity light due to its low input bias current by using larger values of gain (RF). The total capacitance (CT) on the inverting terminal of the op amp includes the photodiode capacitance (C PD) and the input capacitance of the op amp (CIN). This total capacitance (CT) plays an important role in the stability of the circuit. The noise gain of this circuit determines the stability and is defined by: Equation 4 indicates that the −3 dB bandwidth of the TIA is inversely proportional to the feedback resistor. Therefore, if the bandwidth is important then the best approach would be to have a moderate transimpedance gain stage followed by a broadband voltage gain stage. Table 2 shows the measurement results of the LMH6618 with different photodiodes having various capacitances (CPD) and a feedback resistance (RF) of 1 kΩ.
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LMH6618
TABLE 2. TIA (Figure 1) Compensation and Performance Results CPD (pF) 22 47 100 222
Note: GBWP = 65 MHz CT = CPD + CIN CIN = 2 pF VS = ±2.5V
CT (pF) 24 49 102 224
CF CAL (pF) 7.7 10.9 15.8 23.4
CF USED (pF) 5.6 10 15 18
f −3 dB CAL (MHz) 23.7 16.6 11.5 7.81
f −3 dB MEAS (MHz) 20 15.2 10.8 8
Peaking (dB) 0.9 0.8 0.9 2.9
Figure 11 shows the frequency response for the various photodiodes in Table 2.
When analyzing the noise at the output of the TIA, it is important to note that the various noise sources (i.e. op amp noise voltage, feedback resistor thermal noise, input noise current, photodiode noise current) do not all operate over the same frequency band. Therefore, when the noise at the output is calculated, this should be taken into account. The op amp noise voltage will be gained up in the region between the noise gain’s zero and pole (fZ and fP in Figure 10). The higher the values of RF and CT, the sooner the noise gain peaking starts and therefore its contribution to the total output noise will be larger. It is obvious to note that it is advantageous to minimize CIN by proper choice of op amp or by applying a reverse bias across the diode at the expense of excess dark current and noise.
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FIGURE 11. Frequency Response for Various Photodiode and Feedback Capacitors
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LMH6618
Physical Dimensions inches (millimeters) unless otherwise noted
6-Pin TSOT23 NS Package Number MK06A
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LMH6618
Notes
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LMH6618 130 MHz, 1.25 mA Rail-to-Rail Input and Output Operational Amplifier with Shutdown
Notes
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