LMH6654/55 Single/Dual Low Power, 250 MHz, Low Noise Amplifiers
August 2001
LMH6654/55 Single/Dual Low Power, 250 MHz, Low Noise Amplifiers
General Description
The LMH6654/55 single and dual high speed, voltage feedback amplifiers are designed to have unity-gain stable operation with a bandwidth of 250MHz. They operate from ± 2.5V to ± 6V and each channel consumes only 4.5mA. The amplifiers feature very low voltage noise and wide output swing to maximize signal-to-noise ratio. The LMH6654/55 have a true single supply capability with input common mode voltage range extending 150 mV below negative rail and within 1.3V of the positive rail. LMH6654/55 high speed and low power combination make these products an ideal choice for many portable, high speed application where power is at a premium. The LMH6654 is packaged in SOT23-5 and SOIC-8. The LMH6655 is packaged in MSOP-8 and SOIC-8. The LMH6654/55 are built on National’s Advance VIP10™ (Vertically Integrated PNP) complementary bipolar process.
Features
(VS = ± 5V, TJ = 25˚C, Typical values unless specified). n Voltage feedback architecture n Unity gain bandwidth 250MHz ± 2.5V to ± 6V n Supply voltage range n Slew rate 200V/µsec n Supply current 4.5mA/channel n Input common mode voltage −5.15V to +3.7V n Output voltage swing (RL = 100Ω) −3.6V to 3.4V n Input voltage noise 4.5nV/ n Input current noise 1.7pA/ n Settling Time to 0.01% 25ns
Applications
n n n n n n ADC drivers Consumer video Active filters Pulse delay circuits xDSL receiver Pre-amps
Typical Performance Characteristics
Input Voltage Noise vs. Frequency Closed Loop Gain vs. Frequency
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© 2001 National Semiconductor Corporation
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LMH6654/55
Absolute Maximum Ratings
(Note 1)
Soldering Information Infrared or Convection (20 sec.) Wave Soldering (10 sec.) 235˚C 260˚C
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Human Body Model Machine Model VIN Differential Output Short Circuit Duration Supply Voltage (V+ − V−) Voltage at Input pins Storage Temperature Range Junction Temperature (Note 4) 2kV 200V
Operating Ratings
Supply Voltage (V+ - V−) Junction Temperature Range Thermal Resistance (θJA) 8-Pin SOIC 8-Pin MSOP 5-Pin SOT-23
(Note 1)
± 2.5V to ± 6.0V
−40˚C to +85˚C 172˚C/W 235˚C/W 265˚C/W
± 1.2V
(Note 3) 13.2V V+ +0.5V, V− −0.5V −65˚C to +150˚C +150˚C
± 5V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = +5V, V− = −5V, VCM = 0V, AV = +1, RF = 25Ω for gain = +1, RF = 402Ω for gain = ≥ +2, and RL = 100Ω. Boldface limits apply at the temperature extremes. Symbol Dynamic Performance fCL Close Loop Bandwidth AV = +1 AV = +2 AV = +5 AV = +10 GBWP φm SR TS Gain Bandwidth Product Bandwidth for 0.1dB Flatness Phase Margin Slew Rate (Note 8) Settling Time 0.01% 0.1% tr tf en in Rise Time Fall Time Input Referred Voltage Noise Input-Referred Current Noise Second Harmonic Distortion Third Harmonic Distortion Xt DG DP VOS TC VOS IB IOS RIN Crosstalk (for LMH6655 only) Differential Gain Differential Phase Input Offset Voltage Input Offset Average Drift Input Bias Current Input Offset Current Input Resistance AV = +1, 0.2V Step AV = +1, 0.2V Step f ≥ 0.1 MHz f ≥ 0.1 MHz AV = +1, f = 5MHz VO = 2VPP, RL = 100Ω Input Referred, 5MHz, Channel-to-Channel AV = +2, NTSC, RL = 150Ω AV = +2, NTSC, RL = 150Ω VCM = 0V VCM = 0V (Note 7) VCM = 0V VCM = 0V Common- Mode Differential Mode −1 −2 −3 −4 AV = +1, VIN = 2VPP AV = +1, 2V Step AV ≥ +5 AV +1 250 130 52 26 260 18 50 200 25 15 1.4 1.2 4.5 1.7 −80 −85 −80 0.01 0.025 MHz MHz deg V/µs ns ns ns ns nV/ pA/ dBc dB % deg 3 4 12 18 1 2 mV µV/˚C µA µA MΩ kΩ MHz Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units
Distortion and Noise Response
Input Characteristics
±1
6 5 0.3 4 20
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LMH6654/55
± 5V Electrical Characteristics
Symbol CIN CMRR CMVR Parameter Input Capacitance Common Mode Rejection Ration Input Common- Mode Voltage Range
(Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = +5V, V− = −5V, VCM = 0V, AV = +1, RF = 25Ω for gain = +1, RF = 402Ω for gain = ≥ +2, and RL = 100Ω. Boldface limits apply at the temperature extremes. Conditions Common- Mode Differential Mode Input Referred, VCM = 0V to −5V CMRR ≥ 50dB 3.5 Transfer Characteristics AVOL Large Signal Voltage Gain VO = 4VPP, RL = 100Ω 60 58 3.4 3.2 67 dB 70 68 Min (Note 6) Typ (Note 5) 1.8 1 90 −5.15 3.7 −5.0 dB Max (Note 6) Units pF
V
Output Characteristics VO Output Swing High Output Swing Low Output Swing High Output Swing Low ISC Short Circuit Current (Note 3) No Load No Load RL = 100Ω RL = 100Ω Sourcing, VO = 0V ∆VIN = 200mV Sinking, VO = 0V ∆VIN = 200mV IOUT RO PSRR IS Output Current Output Resistance Power Supply Rejection Ratio Supply Current (per channel) Sourcing, VO = +3V Sinking, VO = −3V AV = +1, f < 100kHz Input Referred , VS = ± 5V to ± 6V 60 Power Supply 76 4.5 6 7 dB mA 145 130 100 80 3.2 3.0 3.6 −3.9 3.4 −3.6 280 185 80 120 0.08 mA −3.4 −3.2 −3.7 −3.5
V
mA Ω
5V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = +5V, V− = −0V, VCM = 2.5V, AV = +1, RF = 25Ω for gain = +1, RF = 402Ω for gain = ≥ +2, and RL = 100Ω to V+/2. Boldface limits apply at the temperature extremes. Symbol Dynamic Performance fCL Close Loop Bandwidth AV = +1 AV = +2 AV = +5 AV = +10 GBWP φm SR TS Gain Bandwidth Product Bandwidth for 0.1dB Flatness Phase Margin Slew Rate (Note 8) Settling Time 0.01% 0.1%
3
Parameter
Conditions
Min (Note 6)
Typ (Note 5) 230 120 50 25 250 17 48 190 30 20
Max (Note 6)
Units
MHz
AV ≥ +5 AV = +1 AV = +1, VIN = 2VPP AV = +1, 2V Step
MHz MHz deg V/µs ns ns
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LMH6654/55
5V Electrical Characteristics
Symbol tr tf en in Rise Time Fall Time Input Referred Voltage Noise Input Referred Current Noise Second Harmonic Distortion Third Harmonic Distortion Xt VOS TC VOS IB IOS RIN CIN CMRR CMVR Crosstalk (for LMH6655 only) Input Offset Voltage Input Offset Average Drift Input Bias Current Input Offset Current Input Resistance Input Capacitance Common Mode Rejection Ration Input Common Mode Voltage Range Input Characteristics Parameter
(Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = +5V, V− = −0V, VCM = 2.5V, AV = +1, RF = 25Ω for gain = +1, RF = 402Ω for gain = ≥ +2, and RL = 100Ω to V+/2. Boldface limits apply at the temperature extremes. Conditions AV = +1, 0.2V Step AV = +1, 0.2V Step f ≥ 0.1MHz f ≥ 0.1 MHz AV = +1, f = 5MHz VO = 2VPP, RL = 100Ω Input Referred, 5MHz VCM = 2.5V VCM = 2.5V (Note 7) VCM = 2.5V VCM = 2.5V Common- Mode Differential Mode Common- Mode Differential Mode Input Referred, VCM = 0V to −2.5V CMRR ≥ 50dB 3.5 Transfer Characteristics AVOL Large Signal Voltage Gain VO = 1.6VPP, RL = 100Ω 58 55 3.6 3.4 64 dB 70 68 −2 −3 −5 −6.5 Min (Note 6) Typ (Note 5) 1.5 1.35 4.5 1.7 −65 −70 −78 Max (Note 6) Units ns ns nV/ pA/ dBc dB 5 6.5 12 18 2 3 mV µV/˚C µA µA MΩ kΩ pF dB 0
Distortion and Noise Response
±2
6 6 0.5 4 20 1.8 1 90 −0.15 3.7
V
Output Characteristics VO Output Swing High Output Swing Low Output Swing High Output Swing Low ISC Short Circuit Current (Note 3) No Load No Load RL = 100Ω RL = 100Ω Sourcing , VO = 2.5V ∆VIN = 200mV Sinking, VO = 2.5V ∆VIN = 200mV IOUT RO PSRR IS Output Current Output Resistance Power Supply Rejection Ratio Supply Current (per channel) Sourcing, VO = +3.5V Sinking, VO = 1.5V AV = +1, f < 100kHz Input Referred , VS = ± 2.5V to ± 3V 60 Power Supply 75 4.5 6 7 dB mA 90 80 70 60 3.5 3.35 3.75 0.9 3.70 1 170 140 30 60 .08 mA 1.3 1.45 1.1 1.3
V
mA Ω
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LMH6654/55
5V Electrical Characteristics
(Continued)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Table. Note 2: Human body model, 1.5kΩ in series with 100pF. Machine model: 0Ω in series with 100pF. Note 3: Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature at 150˚C. Note 4: The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) − TA)/θJA. All numbers apply for packages soldered directly onto a PC board. Note 5: Typical Values represent the most likely parametric norm. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: Offset voltage average drift is determined by dividing the change in VOS at temperature extremes into the total temperature change. Note 8: Slew rate is the slower of the rising and falling slew rates. Slew rate is rate of change from 10% to 90% of output voltage step.
Typical Performance Characteristics
Closed Loop Bandwidth (G = +1)
TJ = 25˚C, V+ = ± 5V, V− = −5, RF = 25Ω for gain = +1, RF = 402Ω and for gain ≥ +2, and RL = 100Ω, unless otherwise specified. Closed Loop Bandwidth (G = +2)
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Closed Loop Bandwidth (G = +5)
Closed Loop Bandwidth (G = +10)
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LMH6654/55
Typical Performance Characteristics
Supply Current per Channel vs. Supply Voltage
TJ = 25˚C, V+ = ± 5V, V− = −5, RF = 25Ω for gain = +1, RF = 402Ω and for gain ≥ +2, and RL = 100Ω, unless otherwise specified. (Continued) Supply Current per Channel vs. Temperature
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Offset Voltage vs. Supply Voltage (VCM = 0V)
Offset Voltage vs. Common Mode
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Offset Voltage vs. Common Mode
Bias Current and Offset Voltage vs. Temperature
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LMH6654/55
Typical Performance Characteristics
Bias Current vs. Common Mode Voltage
TJ = 25˚C, V+ = ± 5V, V− = −5, RF = 25Ω for gain = +1, RF = 402Ω and for gain ≥ +2, and RL = 100Ω, unless otherwise specified. (Continued) AOL, PSRR and CMRR vs. Temperature
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Inverting Large Signal Pulse Response (VS = 5V)
Inverting Large Signal Pulse Response (VS = ± 5V)
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Non-Inverting Large Signal Pulse Response (VS = 5V)
Non-Inverting Large Signal Pulse Response (VS = ± 5V)
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LMH6654/55
Typical Performance Characteristics
Non-Inverting Small Signal Pulse Response (VS = 5V)
TJ = 25˚C, V+ = ± 5V, V− = −5, RF = 25Ω for gain = +1, RF = 402Ω and for gain ≥ +2, and RL = 100Ω, unless otherwise specified. (Continued) Non-Inverting Small Signal Pulse Response (VS = ± 5V)
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Inverting Small Signal Pulse Response (VS = 5V)
Inverting Small Signal Pulse Response (VS = ± 5V)
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Input Voltage and Current Noise vs. Frequency (VS = 5V)
Input Voltage and Current Noise vs. Frequency (VS = ± 5V)
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Typical Performance Characteristics
Harmonic Distortion vs. Frequency G = +1, VO = 2VPP, VS = 5V
TJ = 25˚C, V+ = ± 5V, V− = −5, RF = 25Ω for gain = +1, RF = 402Ω and for gain ≥ +2, and RL = 100Ω, unless otherwise specified. (Continued) Harmonic Distortion vs. Frequency G = +1, VO = 2VPP, VS = ± 5V
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Harmonic Distortion vs. Temperature VS = 5V, f = 5MHz, VO = 2VPP
Harmonic Distortion vs. Temperature VS = ± 5V, f = 5MHz, VO = 2VPP
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Harmonic Distortion vs. Gain VS = 5V, f = 5MHz, VO = 2VPP
Harmonic Distortion vs. Gain VS = ± 5V, f = 5MHz, VO = 2VPP
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LMH6654/55
Typical Performance Characteristics
Harmonic Distortion vs. Output Swing (G = +2, VS = 5V, f = 5MHz)
TJ = 25˚C, V+ = ± 5V, V− = −5, RF = 25Ω for gain = +1, RF = 402Ω and for gain ≥ +2, and RL = 100Ω, unless otherwise specified. (Continued) Harmonic Distortion vs. Output Swing (G = +2, VS = ± 5V, f = 5MHz)
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PSRR vs. Frequency
CMRR vs. Frequency
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Output Sinking Current
Output Sourcing Current
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LMH6654/55
Typical Performance Characteristics
CrossTalk vs. Frequency (LMH6655 only)
TJ = 25˚C, V+ = ± 5V, V− = −5, RF = 25Ω for gain = +1, RF = 402Ω and for gain ≥ +2, and RL = 100Ω, unless otherwise specified. (Continued) CrossTalk vs. Frequency (LMH6655 only)
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Isolation Resistance vs. Capacitive Load
Open Loop Gain and Phase vs. Frequency
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LMH6654/55
Connection Diagrams
LMH6654 in SOIC LMH6654 in SOT23-5 LMH6655 in SOIC and MSOP
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Top View
Top View Top View
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Ordering Information
Package 8-Pin SOIC Part Number LMH6654MA LMH6654MAX LMH6655MA LMH6655MAX 5-Pin SOT23-5 8-Pin MSOP LMH6654MF LMH6654MFX LMH6655MM LMH6655MMX A67A A66A LMH6655MA Package Marking LMH6654MA Transport Media 95 Units Rails 2.5k Units Tape and Reel 95 Units Rails 2.5k Units Tape and Reel 1k Units Tape and Reel 3K Units Tape and Reel 1k Units Tape and Reel 3.5k Units Tape and Reel should be connected in parallel, to supply current for fast large signal changes at the output. MUA08A MF05A NSC Drawing M08A
Application Information
General Information The LMH6654 single and LMH6655 dual high speed, voltage feedback amplifiers are manufactured on National Semiconductor’s new VIP10 (Vertically Integrated PNP) complementary bipolar process. These amplifiers can operate from ± 2.5V to ± 6V power supply. They offer low supply current, wide bandwidth, very low voltage noise and large output swing. Many of the typical performance plots found in the datasheet can be reproduced if 50Ω coax and 50Ω RIN/ROUT resistors are used. Circuit Layout Consideration With all high frequency devices, board layouts with stray capacitance have a strong influence on the AC performance. The LMH6654/55 are not exception and the inverting input and output pins are particularly sensitive to the coupling of parasitic capacitance to AC ground. Parasitic capacitances on the inverting input and output nodes to ground could cause frequency response peaking and possible circuit oscillation. Therefore, the power supply, ground traces and ground plan should be placed away from the inverting input and output pins. Also, it is very important to keep the parasitic capacitance across the feedback to an absolute minimum. The PCB should have a ground plane covering all unused portion of the component side of the board to provide a low impedance path. All trace lengths should be minimized to reduce series inductance. Supply bypassing is required for the amplifiers performance. The bypass capacitors provide a low impedance return current path at the supply pins. They also provide high frequency filtering on the power supply traces. It is recommended that a ceramic decoupling capacitor 0.1µF chip should be placed with one end connected to the ground plane and the other side as close as possible to the power pins. An additional 10µF tantalum electrolytic capacitor
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FIGURE 1. Evaluation Boards National provides the following evaluation boards as a guide for high frequency layout and as an aid in device testing and characterization. Device LMH6654MF LMH6654MA LMH6655MA LMH6655MM Package SOT23-5 8-Pin SOIC 8-Pin SOIC 8-Pin MSOP Evalulation Board PN CLC730068 CLC730027 CLC730036 CLC730123
LMH6654/55
Application Information
(Continued)
The free evaluation board are shipped automatically when a device sample request is placed with National Semiconductor. The CLC730027 datasheet also contains tables of recommended components to evaluate several of National’s high speed amplifiers. This table for the LMH6654 is illustrated below. Refer to the evaluation board datasheet for schematics and further information. Components Needed to Evaluate the LMH6654 on the Evaluation Board:
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• • •
RfRg use the datasheet to select values. RIN, ROUT typically 50Ω (Refer to the Basic Operation section of the evaluation board datasheet for details) Rf is an optional resistor for inverting again configurations (select Rf to yield desired input impedance = Rg||Rf)
FIGURE 2. Components Selection and Feedback Resistor It is important in high-speed applications to keep all component leads short since wires are inductive at high frequency. For discrete components, choose carbon composition axially leaded resistors and micro type capacitors. Surface mount components are preferred over discrete components for minimum inductive effect. Never use wire wound type resistors in high frequency applications. Large values of feedback resistors can couple with parasitic capacitance and cause undesired effects such as ringing or oscillation in high-speed amplifiers. Keep resistors as low as possible consistent with output loading consideration. For a gain of 2 and higher, 402Ω feedback resistor used for the typical performance plots gives optimal performance. For unity gain follower, a 25Ω feedback resistor is recommended rather than a direct short. This effectively reduces the Q of what would otherwise be a parasitic inductance (the feedback wire) into the parasitic capacitance at the inverting input. Bias Current Cancellation In order to cancel the bias current errors of the non-inverting configuration, the parallel combination of the gain setting Rg and feedback Rf resistors should equal the equivalent source resistance Rseq as defined in Figure 3. Combining this constraint with the non-inverting gain equation, allows both Rf and Rg to be determined explicitly from the following equations: Rf = AVRseq and Rg = Rf/(AV−1) For inverting configuration, bias current cancellation is accomplished by placing a resistor Rb on the non-inverting input equal in value to the resistance seen by the inverting input (Rf//(Rg+Rs). The additional noise contribution of Rb can be minimized through the use of a shunt capacitor.
• C1, C2 use 0.1µF ceramic capacitors • C3, C4 use 10µF tantalum capacitors Components not used: 1. C5, C6, C7, C8 2. R1 thru R8 The evaluation boards are designed to accommodate dual supplies. The board can be modified to provide single operation. For best performance; 1) do not connect the unused supply. 2) ground the unused supply pin. power Dissipation The package power dissipation should be taken into account when operating at high ambient temperature and/or high power dissipative conditions. In determining maximum operable temperature of the device, make sure the total power dissipation of the device is considered; this power dissipated in the device with a load connected to the output as well as the nominal dissipation of the op amp. Driving Capacitive Loads Capacitive loads decrease the phase margin of all op amps. The output impedance of a feedback amplifier becomes inductive at high frequencies, creating a resonant circuit when the load is capacitive. This can lead to overshoot, ringing and oscillation. To eliminate oscillation or reduce ringing, an isolation resistor can be placed as shown in Figure 2 below. At frequencies above
the load impedance of the Amplifier approaches RISO. The desired performance depends on the value of the isolation resistor. The isolation resistance vs. capacitance load graph in the typical performance characteristics provides the means for selection of the value of RS that provides ≤ 3dB peaking in closed loop AV = 1 response. In general, the bigger the isolation resistor, the more damped the pulse response becomes. For initial evaluation, a 50Ω isolation resistor is recommended.
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Application Information
(Continued)
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FIGURE 5. Non-Inverting Amplifier Noise Model
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(1) Rf||Rg =Rseq for bias current cancellation. Figure 6 illustrates the equivalent noise model using this assumption. The total equivalent output voltage noise (eno) is eni * AV.
FIGURE 3. Non-Inverting Amplifier Configuration
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FIGURE 6. Noise Model with Rf||Rg = Rseq
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FIGURE 4. Inverting Amplifier Configuration Total Input Noise vs. Source Resistance The noise model for the non-inverting amplifier configuration showing all noise sources is described in Figure 5. In addition to the intrinsic input voltage noise (en) and current noise (in = in+ = in−) sources, there also exits thermal voltage noise associated with each of the external resistors. Equation 1 provides the general form for total equivalent input voltage noise density (eni). Equation 2 is a simplification of Equation 1 that assumes
(2) If bias current cancellation is not a requirement, then Rf||Rg does not need to equal Rseq. In this case, according to Equation 1, RfRg should be as low as possible in order to minimize noise. Results similar to Equation 1 are obtained for the inverting configuration on Figure 2 if Rseq is replaced by Rb and Rg is replaced by Rg + Rs. With these substitutions, Equation 1 will yield an eni referred to the non-inverting input. Referring to eni to the inverting input is easily accomplished by multiplying eni by the ration of non-inverting to inverting gains. Noise Figure Noise Figure (NF) is a measure of the noise degradation caused by an amplifier.
(3) The noise figure formula is shown is Equation 3. The addition of a terminating resistor RT, reduces the external thermal noise but increases the resulting NF.
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Application Information
(Continued)
The NF is increased because the RT reduces the input signal amplitude thus reducing the input SNR.
(4) The noise figure is related to the equivalent source resistance (Rseq) and the parallel combination of Rf and Rg. To minimize noise figure, the following steps are recommended: 1. Minimize Rf||Rg 2. Choose the Optimum Rs (ROPT) ROPT is the point at which the NF curve reaches a minimum and is approximated by: ROPT ≈ (en/in)
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LMH6654/55
Physical Dimensions
inches (millimeters) unless otherwise noted
8-Pin SOIC NS Package Number M08A
5-Pin SOT23 NS Package Number MF05A
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LMH6654/55 Single/Dual Low Power, 250 MHz, Low Noise Amplifiers
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
8-Pin MSOP NS Package Number MUA08A
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