LMS485CMX

LMS485 5V Low Power RS-485 / RS-422 Differential Bus Transceiver April 2003 LMS485 5V Low Power RS-485 / RS-422 Differential Bus Transceiver General Description The LMS485 is a low power differential bus/line transceiver designed for high speed bidirectional data communication on multipoint bus transmission lines. It is designed for balanced transmission lines. It meets ANSI Standards TIA/EIA RS422-B, TIA/EIA RS485-A and ITU recommendation and V.11 and X.27. The LMS485 combines a TRI-STATE™ differential line driver and differential input receiver, both of which operate from a single 5.0V power supply. The driver and receiver have an active high and active low, respectively, that can be externally connected to function as a direction control. The driver and receiver differential inputs are internally connected to form differential input/output (I/O) bus ports that are designed to offer minimum loading to bus whenever the driver is disabled or when VCC = 0V. These ports feature wide positive and negative common mode voltage ranges, making the device suitable for multipoint applications in noisy environments. The LMS485 is available in a 8-Pin SOIC and 8-Pin DIP packages. It is a drop-in socket replacement to Maxim’s MAX485 Features n n n n n n n n n n n Meet ANSI standard RS-485-A and RS-422-B Data rate 2.5 Mbps Single supply voltage operation, 5V Thermal shutdown protection Short circuit protection Low power BiCMOS Allows up to 32 transceivers on the bus Open circuit fail-safe for receiver Extended operating temperature range −40˚C to 85˚C Drop-in replacement to MAX485 Available in 8-pin SOIC and 8-Pin DIP package Applications n n n n n n n n Low power RS-485 systems Network hubs, bridges, and routers Point of sales equipment (ATM, barcode scanners,…) Local area networks (LAN) Integrated service digital network (ISDN) Industrial programmable logic controllers High speed parallel and serial applications Multipoint applications with noisy environment Typical Application 20062601 A Typical multipoint application is shown in the above figure. Terminating resistors, RT, are typically required but only located at the two ends of the cable. Pull up and pull down resistors maybe required at the end of the bus to provide failsafe biasing. The biasing resistors provide a bias to the cable when all drivers are in TRI-STATE, See National Application Note, AN-847 for further information. © 2003 National Semiconductor Corporation DS200626 www.national.com LMS485 Connection Diagram 8-Pin SOIC / DIP 20062602 Top View Truth Table DRIVER SECTION RE X X X RECEIVER SECTION RE L L H L Note: * = Non Terminated, Open Input only X = Irrelevant Z = TRI-STATE H = High level L = Low level DE H H L DE L L X L DI H L X A-B ≥ +0.2V ≤ −0.2V X OPEN * A H L Z B L H Z RO H L Z H Pin Descriptions Pin # I/O 1 2 3 4 5 6 7 8 O I I I N/A I/O I/O N/A Name RO RE DE DI GND A B VCC Function Receiver Output: If A > B by 200 mV, RO will be high; If A < B by 200mV, RO will be low. RO will be high also if the inputs (A and B) are open (non-terminated) Receiver Output Enable: RO is enabled when RE is low; RO is in TRI-STATE when RE is high Driver Output Enable: The driver outputs (A and B) are enabled when DE is high; they are in TRI-STATE when DE is low. Pins A and B also function as the receiver input pins (see below) Driver Input: A low on DI forces A low and B high while a high on DI forces A high and B low when the driver is enabled Ground Non-inverting Driver Output and Receiver Input pin. Driver Output levels conform to RS-485 signaling levels Inverting Driver Output and Receiver Input pin. Driver Output levels conform to RS-485 signaling levels Power Supply: 4.75V ≤ VCC ≤ 5.25V www.national.com 2 LMS485 Ordering Information Package Part Number LMS485CM 8-Pin SOIC LMS485CMX LMS485IM LMS485IMX 8-Pin DIP LMS485CNA LMS485INA Package Marking LMS485CM LMS485IM LMS485CNA LMS485INA Transport Media 95 Units/Rail 2.5k Units Tape and Reel 95 Units/Rail 2.5k Units Tape and Reel 40 Units/Rail 40 Units/Rail N08E M08A NSC Drawing 3 www.national.com LMS485 Absolute Maximum Ratings (Note 1) Operating Ratings Min Nom Max Supply Voltage, VCC Voltage at any Bus Terminal (Separately or Common Mode) VIN or VIC High-Level Input Voltage, VIH (Note 5) Low-Level Input Voltage, VIL (Note 5) Differential Input Voltage, VID (Note 6) High-Level Output Driver, IOH Receiver, IOH −150 mA −42 80 26 mA mA mA 2 0.8 V V V 4.75 −7 5.0 5.25 12 V V If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage, VCC (Note 2) Input Voltage, VIN (DI, DE, or RE) Voltage Range at Any Bus Terminal (AB) Receiver Outputs Package Thermal Impedance, θJA SOIC DIP Junction Temperature (Note 3) Operating Free-Air Temperature Range, TA Commercial Industrial Storage Temperature Range Soldering Information Infrared or Convection (20 sec.) Lead Temperature (4 sec.) ESD Rating (Note 4) 235˚C 260˚C 7kV 0˚C to 70˚C −40˚C to 85˚C −65˚C to 150˚C 125˚C/W 88˚C/W 150˚C 7V −0.3V to VCC + 0.3V −7V to 12V −0.3V to VCC + 0.3V ± 12 Low-Level Output Driver, IOL Receiver, IOL Electrical Characteristics Over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) Symbol Driver Section | VOD1 | | VOD2 | ∆VOD Differential Output Voltage Differential Output Voltage Change in Magnitude of Driver Differential Output Voltage for Complementary Output States Common-Mode Output Voltage R = ∞ (Figure 1) R = 50Ω (Figure 1) ,RS-422 R = 27Ω (Figure 1) ,RS-485 R = 27Ω or 50Ω (Figure 1 ), (Note 7) 2.0 1.5 5.0 0.2 V 5.25 V V Parameter Conditions Min Typ Max Units VOC ∆VOC R = 27Ω or 50Ω (Figure 1) 3.0 0.2 V V Change in Magnitude of R = 27Ω or 50Ω Driver Common-Mode Output (Figure 1), (Note 7) Voltage for Complementary Output States CMOS Inout Logic Threshold High CMOS Input Logic Threshold Low Logic Input Current Input Current (A, B) DE, DI, RE DE, DI, RE DE, DI, RE DE = 0V, VCC = 0V or 5.25V VIN = 12V VIN = − 7V −7V ≤ VCM ≤ + 12V VCM = 0 −0.2 95 2.0 VIH VIL IIN1 IIN2 V 0.8 V µA mA ±2 1.0 −0.8 +0.2 Receiver Section VTH ∆VTH Differential Input Threshold Voltage Input Hysteresis Voltage (VTH+ − VTH−) V mV www.national.com 4 LMS485 Electrical Characteristics Symbol VOH VOL IOZR RIN ICC IOSD1 IOSD2 IOSR Parameter CMOS High-level Output Voltage CMOS Low-level Tristate Output Leakage Current Input Resistance Supply Current Driver Short-circuit Output Current Driver Short-circuit Output Current Receiver Short-circuit Output Current (Continued) Over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) Conditions IOH = −4mA, VID = 200mV IOL = 4mA, VID = −200mV 0.4V ≤ VO ≤ + 2.4V − 7V ≤ VCM≤+12V DE = VCC, RE = GND or VCC DE = 0V, RE = GND or VCC VO = high, −7V ≤ VCM ≤ + 12V (Note 8) VO = low, − 7V ≤VCM ≤ + 12V (Note 8) 0 V ≤VO ≤ VCC 35 35 7 12 320 315 500 400 250 250 95 mA mA mA Min 3.5 0.40 Typ Max Units V V µA kΩ µA ±1 Power Supply Current Switching Characteristics Driver TPLH, TPHL TSKEW TR, TF TZH, TZL THZ, TLZ Receiver TPLH, TPHL TSKEW TZH, TZL FMAX Propagation Delay Input to Output Receiver Output Skew Receiver Enable Time Receiver Disable Time Maximum Data Rate 2.5 RL = 54Ω, CL = 100 pF (Figure 5, Figure 7) RL = 54Ω, CL = 100 pF (Figure 5, Figure 7) CL = 15 pF, RL = 1 kΩ (Figure 6, Figure 10) 20 50 5 20 20 50 50 200 nS nS nS nS Mbps Propagation Delay Input to Output Driver Output Skew Driver Rise and Fall Time Driver Enable to Ouput Valid Time Driver Output Disable Time RL = 54Ω, CL = 100pF (Figure 3, Figure 7) RL = 54Ω, CL = 100 pF (Figure 3, Figure 7) RL = 54Ω, CL = 100 pF (Figure 3, Figure 7) CL = 100 pF, RL = 500Ω (Figure 4, Figure 8) CL = 15 pF, RL = 500Ω (Figure 4, Figure 8) 3 10 35 5 8 25 30 60 10 40 70 70 nS nS nS nS nS Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Note 2: All voltage values, except differential I/O bus voltage, are with respect to network ground terminal. Note 3: The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly into a PC board. Note 4: ESD rating based upon human body model, 100pF discharged through 1.5kΩ. Note 5: Voltage limits apply to DI, DE, RE pins. Note 6: Differential input/output bus voltage is measured at the non-inverting terminal A with respect to the inverting terminal B. Note 7: |∆VOD| and |∆VOC| are changes in magnitude of VOD and VOC, respectively when the input changes from high to low levels. Note 8: Peak current 5 www.national.com LMS485 Typical Performance Characteristics Output Current vs. Receiver Output Low Voltage Output Current vs. Receiver Output High Voltage 20062613 20062614 Receiver Output High Voltage vs. Temperature Receiver Output Low-Voltage vs. Temperature 20062615 20062616 Driver Output Current vs. Differential Output Voltage Driver Differential Output Voltage vs. Temperature 20062617 20062618 www.national.com 6 LMS485 Typical Performance Characteristics Output Current vs. Driver Output Low Voltage (Continued) Output Current vs. Driver Output High Voltage 20062619 20062620 Supply Current vs. Temperature 20062621 7 www.national.com LMS485 Parameter Measuring Information 20062603 FIGURE 1. Test Circuit for VOD and VOC 20062604 FIGURE 2. Test Circuit for VOD3 20062605 FIGURE 3. Test Circuit for Driver Propagation Delay 20062606 FIGURE 4. Test Circuit for Driver Enable / Disable www.national.com 8 LMS485 Parameter Measuring Information (Continued) 20062607 FIGURE 5. Test Circuit for Receiver Propagation Delay 20062608 FIGURE 6. Test Circuit for Receiver Enable / Disable 9 www.national.com LMS485 Switching Characteristics 20062611 20062609 FIGURE 9. Receiver Propagation Delay FIGURE 7. Driver Propagation Delay, Rise / Fall Time 20062612 20062610 FIGURE 10. Receiver Enable / Disable Time FIGURE 8. Driver Enable / Disable Time www.national.com 10 LMS485 Application Information POWER LINE NOISE FILTERING A factor to consider in designing power and ground is noise filtering. A noise filtering circuit is designed to prevent noise generated by the integrated circuit (IC) as well as noise entering the IC from other devices. A common filtering method is to place by-pass capacitors (Cbp) between the power and ground lines. Placing a by-pass capacitor (Cbp) with the correct value at the proper location solves many power supply noise problems. Choosing the correct capacitor value is based upon the desired noise filtering range. Since capacitors are not ideal, they may act more like inductors or resistors over a specific frequency range. Thus, many times two by-pass capacitors may be used to filter a wider bandwidth of noise. It is highly recommended to place a larger capacitor, such as 10µF, between the power supply pin and ground to filter out low frequencies and a 0.1µF to filter out high frequencies. By-pass capacitors must be mounted as close as possible to the IC to be effective. Long leads produce higher impedance at higher frequencies due to stray inductance. Thus, this will reduce the by-pass capacitor’s effectiveness. Surface mounted chip capacitors are the best solution because they have lower inductance. 20062622 FIGURE 11. Placement of by-pass Capacitors, Cbp 11 www.national.com LMS485 Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin SOIC NS Package Number M08A 8-Pin DIP NS Package Number N08E www.national.com 12 LMS485 5V Low Power RS-485 / RS-422 Differential Bus Transceiver Notes LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 www.national.com National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Support Center Email: ap.support@nsc.com National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: jpn.feedback@nsc.com Tel: 81-3-5639-7560 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.