LMV1090

LMV1090 Dual Input, Far Field Noise Suppression Microphone Amplifier September 2, 2009 LMV1090 Dual Input, Far Field Noise Suppression Microphone Amplifier General Description The LMV1090 is a fully analog dual differential input, differential output, microphone array amplifier designed to reduce background acoustic noise, while delivering superb speech clarity in voice communication applications. The LMV1090 preserves near-field voice signals within 4cm of the microphones while rejecting far-field acoustic noise greater than 50cm from the microphones. Up to 20dB of farfield rejection is possible in a properly configured and using ±0.5dB matched microphones. Part of the Powerwise™ family of energy efficient solutions, the LMV1090 consumes only 600μA of supply current providing superior performance over DSP solutions consuming greater than ten times the power. The dual microphone inputs and the processed signal output are differential to provide excellent noise immunity. The microphones are biased with an internal low-noise bias supply. Key Specifications ■ ■ ■ ■ ■ ■ ■ Far Field Noise Suppression Electrical * SNRIE Supply current Standby current Signal-to-Noise Ratio (Voice band) Total Harmonic Distortion + Noise PSRR (217Hz) 34dB (typ) 26dB (typ) 600μA (typ) 0.1μA (typ) 65dB (typ) 0.1% (typ) 99dB (typ)   *FFNSE at f = 1kHz Features ■ ■ ■ ■ ■ ■ ■ ■ No loss of voice intelligibility No added processing delay Low power consumption Differential outputs Excellent RF immunity Adjustable 12 - 54dB gain Shutdown function Space-saving 16–bump micro SMD package Applications ■ ■ ■ ■ ■ Mobile headset Mobile and handheld two-way radios Bluetooth and other powered headsets Hand-held voice microphones Cell phones System Diagram 30083340 © 2009 National Semiconductor Corporation 300833 www.national.com LMV1090 Typical Application 30083309 FIGURE 1. Typical Dual Microphone Far Field noise Cancelling Application www.national.com 2 LMV1090 Connection Diagrams 16–Bump micro SMD package 30083306 Top View Order Number LMV1090TL See NS Package Number TLA1611A 16–Bump micro SMD Marking micro SMD Package View 30083331 Top View X = Plant Code YY = Date Code TT = Die Traceability ZA3 = LMV1090TL Ordering Information Order Number LMV1090TL LMV1090TLX Package 16 Bump µSMD 16 Bump µSMD Package Drawing Number TLA1611A TLA1611A Device Marking XYTTZA3 XYTTZA3 30083303 Bottom View Transport Media 250 units on tape and reel 1000 units on tape and reel 3 www.national.com LMV1090 Pin Descriptions TABLE 1. Pin Name and Function Bump Number Pin Name A1 A2 A3 A4 B1 B2 B3 B4 C1 C2 C3 C4 D1 D2 D3 D4 MIC1– MIC1+ MIC2– MIC2+ GND LPF+ OUT+ REF VDD LPFOUTMic Bias EN SDA SCL I2CV DD Pin Function Microphone 1 negative input Microphone 1 positive input Microphone 2 negative input Microphone 2 positive input Amplifier ground Low Pass Filter for positive output Positive optimized audio output Reference voltage de-coupling Power supply Low Pass Filter for negative output Negative optimized audio output Microphone Bias Chip enable I2C data I2C clock I2C power supply Pin Type Analog Input Analog Input Analog Input Analog Input Ground Analog Input Analog Output Analog Reference Supply Analog Input Analog Output Analog Output Digital input Digital Input/Output Digital Input Supply www.national.com 4 LMV1090 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Storage Temperature Power Dissipation (Note 3) ESD Rating (Note 4) ESD Rating (Note 5) CDM Junction Temperature (TJMAX) Mounting Temperature  Infrared or Convection (20 sec.) 6.0V -85°C to +150°C Internally Limited 2000V 200V 500V 150°C 235°C Thermal Resistance 70°C/W  θJA (microSMD) Soldering Information See AN-112 “microSMD Wafers Level Chip Scale Package.” Operating Ratings Supply Voltage I2CVDD Supply Voltage (Note 8) TMIN ≤ TA ≤ TMAX (Note 1) 2.7V ≤ VDD ≤ 5.5V 1.7V ≤ I2CVDD ≤ 5.5V −40°C ≤ TA ≤ +85°C Electrical Characteristics 3.3V (Note 1, Note 2) Unless otherwise specified, all limits guaranteed for TA = 25°C, VDD = 3.3V, VIN = 18mVP-P, f = 1kHz, EN = VDD, Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF, f = 1kHz pass through mode. LMV1090 Symbol Parameter Conditions VIN = 18mVP-P A-weighted, Audio band VOUT = 18VP-P, A-Weighted voice band (300–3400Hz) A-Weighted THD+N < 1%, Pre Amp Gain = 6dB Differential Out+, OutTHD+N < 1% Out+, OutDifferential Out+ and OutTypical Limit (Note 6) (Note 7) 63 65 5 880 1.2 820 0.1 142 220 RLOAD CLOAD minimum maximum 6 36 2 minimum maximum 6 18 3 f = 1kHz (See Test Method) f = 300Hz (See Test Method) f = 1kHz (See Test Method) f = 300Hz (See Test Method) Input Referred, Input AC grounded PSRR Power Supply Rejection Ratio CMRR Common Mode Rejection Ratio VBM eVBM Microphone Bias Supply Voltage Mic bias noise voltage on VREF pin fRIPPLE = 217Hz (VRIPPLE = 100mVP-P) fRIPPLE = 1kHz (VRIPPLE = 100mVP-P) input referred IBIAS = 1.2mA A-Weighted, CB = 10nF 99 95 60 2.0 7 1.85 2.15 85 80 dB (min) dB (min) dB V (min) V (max) μVRMS 34 42 26 33 2.6 3.4 26 18 1.7 2.3 10 100 0.2 820 1.1 Units (Limits) dB dB μVRMS mVP-P (min) VRMS (min) mV % (max) kΩ Ω kΩ (min) pF (max) dB dB dB (min) dB (max) dB dB dB (min) dB (max) dB dB dB dB SNR Signal-to-Noise Ratio eN VIN VOUT Input Referred Noise level Maximum Input Signal Maximum AC Output Voltage DC Level at Outputs THD+N Total Harmonic Distortion + Noise ZIN ZOUT ZLOAD AM AMR AP APR Input Impedance Output Impedance (Differential) Load Impedance (Out+, Out-) (Note 10) Microphone Preamplifier Gain Range Microphone Preamplifier Gain Adjustment Resolution Post Amplifier Gain Range Post Amplifier Gain Resolution FFNSE Far Field Noise Suppression Electrical SNRIE Signal-to-Noise Ratio Improvement Electrical 5 www.national.com LMV1090 LMV1090 Symbol IDDQ IDD ISD IDDI2C TON TOFF Parameter Supply Quiescent Current Supply Current Shut Down Current I2C supply current Turn-On Time Turn-Off Time VIN = 0V VIN = 25mVP-P both inputs Noise cancelling mode EN pin = GND I2C Idle Mode Conditions Typical Limit (Note 6) (Note 7) 0.60 0.60 0.1 25 0.7 100 40 60 0.80 Units (Limits) mA (max) mA μA (max) nA (max) ms (max) ms (max) www.national.com 6 LMV1090 (Note 1, Note 8) Unless otherwise specified, all limits guaranteed for TA = 25°C, VDD = 5V, VIN = 18mVP-P, EN = VDD, Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF, f = 1kHz pass through mode. Symbol Parameter Conditions LMV1090 Typical Limit (Note 6) (Note 7) VIN = 18mVP-P A-weighted, Audio band VOUT = 18mVP-P, A-weighted voice band (300–3400Hz) A-Weighted THD+N < 1% f = 1kHz, THD+N < 1% between differential output Differential Out+ and Out63 65 5 880 1.2 820 0.1 142 220 minimum maximum 6 36 2 minimum maximum 6 18 3 f = 1kHz (See Test Method) f = 300Hz (See Test Method) f = 1kHz (See Test Method) f = 300Hz (See Test Method) Input Referred, Input AC grounded PSRR Power Supply Rejection Ratio CMRR Common Mode Rejection Ratio VBM eVBM IDDQ IDD ISD IDD I2C TON TOFF Microphone Bias Supply Voltage Microphone bias noise voltage on VREF pin Supply Quiescent Current Supply Current Shut Down Current I2C supply current Turn On Time Turn Off Time fRIPPLE = 217Hz (VRIPPLE = 100mVP-P) fRIPPLE = 1kHz (VRIPPLE = 100mVP-P) input referred IBIAS = 1.2mA A-Weighted, CB = 10nF VIN = 0V VIN = 25mVP-P both inputs Noise cancelling mode EN pin = GND I2C Idle Mode 99 95 60 2.0 7 0.60 0.60 0.1 25 100 40 60 0.80 1.85 2.15 85 80 dB (min) dB (min) dB V ( min) V (max) μVRMS mA (max) mA μA nA (max) mA (max) ms (max) 34 42 26 33 2.6 3.4 26 18 1.7 2.3 0.2 820 1.1 dB dB μVRMS mVP-P (min) VRMS (min) mV % (max) kΩ Ω dB dB dB (min) dB (max) dB dB dB (min) dB (max) dB dB dB dB Units (Limits) Electrical Characteristics 5.0V SNR Signal-to-Noise Ratio eN VIN VOUT Input Referred Noise level Maximum Input Signal Maximum AC Output Voltage DC Output Voltage THD+N Total Harmonic Distortion + Noise ZIN ZOUT AM AMR AP APR Input Impedance Output Impedance Microphone Preamplifier Gain Range Microphone Preamplifier Gain Adjustment Resolution Post Amplifier Gain Range Post Amplifier Gain Adjustment Resolution FFNSE Far Field Noise Suppression Electrical SNRIE Signal-to-Noise Ratio Improvement Electrical 7 www.national.com LMV1090 Digital Interface Characteristics I2C_VDD = 2.2V to 5.5V Symbol t1 t2 t3 t4 t5 t6 VIH VIL Parameter I2C Clock Period I2C Data Setup Time I2C Data Stable Time Start Condition Time Stop Condition Time I2C I2C Data Hold Time EN, SCL, SDA EN, SCL, SDA Input Voltage Low I2C Input Voltage High Conditions (Note 2, Note 8) LMV1090 The following specifications apply for VDD = 5.0V and 3.3V, TA = 25°C, 2.2V ≤ I2C_VDD ≤ 5.5V, unless otherwise specified. Typical Limits (Note 4) (Note 5, Note 7) 2.5 100 0 100 100 100 0.7xI2CVDD 0.3xI2CV DD Units (Limits) µs (min) ns (min) ns (min) ns (min) ns (min) ns (min) V (min) V (max) Digital Interface Characteristics I2C_VDD = 1.7V to 2.2V Symbol t1 t2 t3 t4 t5 t6 VIH VIL Parameter I2C Clock Period I2C Data Setup Time I2C Data Stable Time Start Condition Time Stop Condition Time I2C I2C Data Hold Time EN, SCL, SDA EN, SCL, SDA Input Voltage Low I2C Input Voltage High Conditions The following specifications apply for VDD = 5.0V and 3.3V, TA = 25°C, 1.7V ≤ I2C_VDD ≤ 2.2V, unless otherwise specified. LMV1090 Typical (Note 6) Limits (Note 7) 2.5 250 0 250 250 250 0.7xI2CVDD 0.3xI2CV DD Units (Limits) µs (min) ns (min) ns (min) ns (min) ns (min) ns (min) V (min) V (max) Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified. Note 2: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed. Note 3: The maximum power dissipation must be de-rated at elevated temperatures and is dictated by TJMAX, θJC, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX – TA) / θJA or the number given in the Absolute Maximum Ratings, whichever is lower. For the LMV1090, TJMAX = 150°C and the typical θJA for this microSMD package is 70°C/W and for the LLP package θJA is 64°C/W Refer to the Thermal Considerations section for more information. Note 4: Human body model, applicable std. JESD22-A114C. Note 5: Machine model, applicable std. JESD22-A115-A. Note 6: Typical values represent most likely parametric norms at TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not guaranteed. Note 7: Datasheet min/max specification limits are guaranteed by test, or statistical analysis. Note 8: The voltage at I2CVDD must not exceed the voltage on VDD. Note 9: Default value used for performance measurements. Note 10: Guaranteed by design. www.national.com 8 LMV1090 Test Methods 30083312 FIGURE 2. FFNSE, NFSLE, SNRIE Test Circuit FAR FIELD NOISE SUPPRESSION (FFNSE) For optimum noise suppression the far field noise should be in a broadside array configuration from the two microphones (see Figure 8). Which means the far field sound source is equidistance from the two microphones. This configuration allows the amplitude of the far field signal to be equal at the two microphone inputs, however a slight phase difference may still exist. To simulate a real world application a slight phase delay was added to the FFNSE test. The block diagram from Figure 3 is used with the following procedure to measure the FFNSE. 1. A sine wave with equal frequency and amplitude (25mVP-P) is applied to Mic1 and Mic2. Using a signal generator, the phase of Mic 2 is delayed by 1.1° when compared with Mic1. 2. Measure the output level in dBV (X) 3. Mute the signal from Mic2 4. Measure the output level in dBV (Y) 5. FFNSE = Y - X dB NEAR FIELD SPEECH LOSS (NFSLE) For optimum near field speech preservation, the sound source should be in an endfire array configuration from the two microphones (see Figure 9). In this configuration the speech signal at the microphone closest to the sound source will have greater amplitude than the microphone further away. Additionally the signal at microphone further away will experience a phase lag when compared with the closer microphone. To simulate this, phase delay as well as amplitude shift was added to the NFSLE test. The schematic from Figure 3 is used with the following procedure to measure the NFSLE. 1. A 25mVP-P and 17.25mVP-P (0.69*25mVP-P) sine wave is applied to Mic1 and Mic2 respectively. Once again, a signal generator is used to delay the phase of Mic2 by 15.9° when compared with Mic1. 2. Measure the output level in dBV (X) 3. Mute the signal from Mic2 4. Measure the output level in dBV (Y) 5. NFSLE = Y - X dB SIGNAL TO NOISE RATIO IMPROVEMENT ELECTRICAL (SNRIE) The SNRIE is the ratio of FFNSE to NFSLE and is defined as: SNRIE = FFNSE - NFSLE 9 www.national.com LMV1090 Typical Performance Characteristics THD+N vs Frequency Mic1 = AC GND, Mic2 = 36mVP-P Noise Canceling Mode Unless otherwise specified, TJ = 25°C, VDD = 3.3V, Input Voltage = 18mVP-P, f =1 kHz, pass through mode (Note 8), Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF. THD+N vs Frequency Mic2 = AC GND, Mic1 = 36mVP-P Noise Canceling Mode 30083319 30083318 THD+N vs Frequency Mic1 = 36mVP-P Mic1 Pass Through Mode THD+N vs Frequency Mic2 = 36mVP-P Mic2 Pass Through Mode 30083317 30083320 THD+N vs Input Voltage Mic1 = AC GND, f = 1kHz Mic2 Noise Canceling Mode THD+N vs Input Voltage Mic2 = AC GND, f = 1kHz Mic1 Noise Canceling Mode 30083321 30083323 www.national.com 10 LMV1090 THD+N vs Input Voltage f = 1kHz Mic1 Pass Through Mode THD+N vs Input Voltage f = 1kHz Mic2 Pass Through Mode 30083322 30083325 PSRR vs Frequency Pre Amp Gain = 20dB, Post Amp Gain = 6dB VRIPPLE = 100mVP-P, Mic1 = Mic2 = AC GND Mic1 Pass Through Mode PSRR vs Frequency Pre Amp Gain = 20dB, Post Amp Gain = 6dB VRIPPLE = 100mVP-P, Mic1 = Mic2 = AC GND Mic2 Pass Through Mode 30083314 30083315 PSRR vs Frequency Pre Amp Gain = 20dB, Post Amp Gain = 6dB VRIPPLE = 100mVP-P, Mic1 = Mic2 = AC GND Noise Canceling Mode Far Field Noise Suppression Electrical vs Frequency 30083357 30083316 11 www.national.com LMV1090 Signal-to-Noise Ratio Electrical vs Frequency 30083358 www.national.com 12 LMV1090 Application Data INTRODUCTION The LMV1090 is a fully analog single chip solution to reduce the far field noise picked up by microphones in a communi- cation system. A simplified block diagram is provided in Figure 3. 30083324 FIGURE 3. Simplified Block Diagram of the LMV1090 The output signal of the microphones is amplified by a preamplifier with adjustable gain between 6dB and 36dB. After the signals are matched the analog noise cancelling suppresses the far field noise signal. The output of the analog noise cancelling processor is amplified in the post amplifier with adjustable gain between 6dB and 18dB. For optimum noise and EMI immunity, the microphones have a differential connection to the LMV1090 and the output of the LMV1090 is also differential. The adjustable gain functions can be controlled via I2C. Shutdown Function As part of the Powerwise™ family, the LMV1090 consumes only 0.50mA of current. In many applications the part does not need to be continuously operational. To further reduce the power consumption in the inactive period, the LMV1090 provides two individual microphone power down functions. When either one of the shutdown functions is activated the part will go into shutdown mode consuming only a few μA of supply current. SHUTDOWN VIA HARDWARE PIN The hardware shutdown function is operated via the EN pin. In normal operation the EN pin must be at a 'high' level (VDD). Whenever a 'low' level (GND) is applied to the EN pin the part will go into shutdown mode disabling all internal circuits. Power Supply Circuits A low drop-out (LDO) voltage regulator in the LMV1090 allows the device to be independent of supply voltage variations. The Power On Reset (POR) circuitry in the LMV1090 requires the supply voltage to rise from 0V to VDD in less than 100ms. The Mic Bias output is provided as a low noise supply source for the electret microphones. The noise voltage on the Mic Bias microphone supply output pin depends on the noise voltage on the internal the reference node. The de-coupling capacitor on the VREF pin determines the noise voltage on this internal reference. This capacitor should be larger than 1nF; having a larger capacitor value will result in a lower noise voltage on the Mic Bias output. Most of the logic levels for the digital control interface are relative to I2CVDD voltage. This eases interfacing to the micro controller of the application containing the LMV1090. The supply voltage on the I2CVDD pin must never exceed the voltage on the VDD pin. Only the four pins that determine the default power up gain have logic levels relative to VDD. Gain Balance and Gain Budget In systems where input signals have a high dynamic range, critical noise levels or where the dynamic range of the output voltage is also limited, careful gain balancing is essential for the best performance. Too low of a gain setting in the preamplifier can result in higher noise levels while too high of a gain setting in the preamplifier will result in clipping and saturation in the noise cancelling processor and output stages. The gain ranges and maximum signal levels for the different functional blocks are shown in Figure 4. Two examples are given as a guideline on how to select proper gain settings. 13 www.national.com LMV1090 30083341 FIGURE 4. Maximum Signal Levels Example 1 An application using microphones with 50mVP-P maximum output voltage, and a baseband chip after the LMV1090 with 1.5VP-P maximum input voltage. For optimum noise performance, the gain of the input stage should be set to the maximum. 1. 50mVP-P +36 dB = 3.1VP-P. 2. 3.1VP-P is higher than the maximum 1.4VP-P allowed for the Noise Cancelling Processor (NCP). This means a gain lower than 28.9dB should be selected. 3. Select the nearest lower gain from the gain settings shown in Table 2, 28dB is selected. This will prevent the NCP from being overloaded by the microphone. With this setting, the resulting output level of the Pre Amplifier will be 1.26VP-P. 4. The NCP can have a maximum processing gain of 9dB (depending on the calibration result) which will result in 3.5VP-P at the output of the LMV1090. This level is higher then maximum level that is allowed at the input of the post amp of the LMV1090. Therefore the preamp gain has to be reduced, to 1.4VP-P minus 9dB = 0.5VP-P. This limits the preamp gain to a maximum of 20dB. 5. The baseband chip limits the maximum output voltage to 1.5VP-P with the minimum of 6dB post amp gain, this results in requiring a lower level at the input of the post amp of 0.75VP-P. Now calculating this for a maximum NCP gain of 9dB the output of the preamp must be