LMV1091TM

LMV1091 Dual Input, Far Field Noise Suppression Microphone Amplifier October 28, 2009 LMV1091 Dual Input, Far Field Noise Suppression Microphone Amplifier General Description The LMV1091 is a fully analog dual differential input, differential output, microphone array amplifier designed to reduce background acoustic noise, while delivering superb speech clarity in voice communication applications. The LMV1091 preserves near-field voice signals within 4cm of the microphones while rejecting far-field acoustic noise greater than 50cm from the microphones. Up to 20dB of farfield rejection is possible in a properly configured and using ±0.5dB matched micropohones. Part of the Powerwise™ family of energy efficient solutions, the LMV1091 consumes only 600μA of supply current providing superior performance over DSP solutions consuming greater than ten times the power. The dual microphone inputs and the processed signal output are differential to provide excellent noise immunity. The microphones are biased with an internal low-noise bias supply. Key Specifications ■ ■ ■ ■ ■ ■ ■ ■ Far Field Noise Suppression Electrical * SNRIE Supply voltage Supply current Standby current Signal-to-Noise Ratio (Voice band) Total Harmonic Distortion + Noise PSRR (217Hz) 34dB (typ) 26dB (typ) 2.7V to 5.5V 600μA (typ) 0.1μA (typ) 65dB (typ) 0.1% (typ) 99dB (typ)   *FFNSE at f = 1kHz Features ■ ■ ■ ■ ■ ■ ■ ■ No loss of voice intelligibility Low power consumption Shutdown function No added processing delay Differential outputs Adjustable 12 - 54dB gain Excellent RF immunity Available in a 25–bump micro SMD package Applications ■ ■ ■ ■ Mobile headset Mobile and handheld two-way radios Bluetooth and other powered headsets Hand-held voice microphones System Diagram 30092240 © 2009 National Semiconductor Corporation 300922 www.national.com LMV1091 Typical Application 30092215 FIGURE 1. Typical Dual Microphone Far Field noise Cancelling Application www.national.com 2 LMV1091 Connection Diagrams 25ump micro SMD package 30092214 Top View Order Number LMV1091TM See NS Package Number TMD25AAA 25–Bump micro SMD Marking micro SMD Package View 30092216 Bottom View 30092231 Top View X = Plant Code YY = Date Code TT = Die Traceability ZA4 = LMV1091TM Ordering Information Order Number LMV1091TM LMV1091TMX Package 25 Bump µSMD 25 Bump µSMD Package Drawing Number TMD25AAA TMD25AAA Device Marking ZA4 ZA4 Transport Media 250 units on tape and reel 3000 units on tape and reel 3 www.national.com LMV1091 TABLE 1. Pin Name and Function Bump Number A1 A2 A3 A4 A5 B1 B2 B3 B4 B5 C1 C2 C3 C4 C5 D1 D2 D3 D4 D5 E1 E2 E3 E4 E5 Pin Name MIC BIAS MIC2+ MIC2– MIC1+ MIC1– MODE0 MODE1 GA0 GA1 GND MUTE2 GB0 NC GA2 REF MUTE1 GB1 GB2 GA3 VDD LPF+ OUT+ OUTLPFSD Pin Function Microphone Bias Microphone 2 positive input Microphone 2 negative input Microphone 1 positive input Microphone 1 negative input Mic mode select pin Mic mode select pin Pre-Amplifier Gain select pin Pre-Amplifier Gain select pin Ground Mute select pin Post-Amplifier Gain select pin No Connect Pre-Amplifier Gain select pin Reference voltage de-coupling Mute select pin Post-Amp Gain select pin Post-Amp Gain select pin Pre-Amp Gain select pin Power Supply Low pass Filter for positive output Positive optimized audio output Negative optimized audio output Low pass Filter for negative output Chip enable Digital Input Analog Ref Digital Input Digital Input Digital Input Digital Input Supply Analog Input Analog Output Analog Output Analog Input Digital Input Pin Type Analog Output Analog Input Analog Input Analog Input Analog Input Digital Input Digital Input Digital Input Digital Input Ground Digital Input Digital Input www.national.com 4 LMV1091 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Storage Temperature Power Dissipation (Note 3) ESD Rating (Note 4) ESD Rating (Note 5) CDM Junction Temperature (TJMAX) 6.0V -85°C to +150°C Internally Limited 2000V 200V 500V 150°C Mounting Temperature  Infrared or Convection (20 sec.) Thermal Resistance 235°C 70°C/W  θJA (microSMD) Soldering Information See AN-1112 “microSMD Wafer Level Chip Scale Package.” Operating Ratings Supply Voltage TMIN ≤ TA ≤ TMAX (Note 1) 2.7V ≤ VDD ≤ 5.5V −40°C ≤ TA ≤ +85°C Electrical Characteristics 3.3V (Note 1, Note 2) Unless otherwise specified, all limits guaranteed for TA = 25°C, VDD = 3.3V, VIN = 18mVP-P, f = 1kHz, SD = VDD, Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF, f = 1kHz pass through mode. LMV1091 Symbol Parameter Conditions VIN = 18mVP-P, A-weighted, Audio band SNR eN VIN VOUT Signal-to-Noise Ratio Input Referred Noise level Maximum Input Signal Maximum AC Output Voltage DC Level at Outputs THD+N Total Harmonic Distortion + Noise ZIN ZOUT ZLOAD AM AMR AP APR Input Impedance Output Impedance Load Impedance (Out+, Out-) (Note 9) Microphone Preamplifier Gain Range Microphone Preamplifier Gain Adjustment Resolution Post Amplifier Gain Range Post Amplifier Gain Resolution f = 1kHz (See Test Method) f = 300Hz (See Test Method) f = 1kHz (See Test Method) f = 300Hz (See Test Method) Input Referred, Input AC grounded PSRR Power Supply Rejection Ratio CMRR Common Mode Rejection Ratio VBM eVBM IDDQ IDD Microphone Bias Supply Voltage Mic bias noise voltage on VREF pin Supply Quiescent Current Supply Current fRIPPLE = 217Hz (VRIPPLE = 100mVP-P) fRIPPLE = 1kHz (VRIPPLE = 100mVP-P) Input referred IBIAS = 1.2mA A-Weighted, CB = 10nF VIN = 0V VIN = 25mVP-P both inputs Noise cancelling mode 5 Typical Limits (Note 6) (Note 7) 63 65 5 880 1.2 820 0.1 142 220 0.2 820 1.1 Units (Limits) dB dB μVRMS mVP-P (min) VRMS (min) mV % (max) kΩ Ω VOUT = 18VP-P, voice band (300–3400Hz) A-Weighted THD+N < 1%, Pre Amp Gain = 6dB Differential Out+, OutTHD+N < 1% Out+, OutDifferential Out+ and Out- RLOAD CLOAD Minimum Maximum 6 36 2 Minimum Maximum 6 18 3 34 42 26 33 99 95 60 2.0 7 0.60 0.60 10 100 kΩ (min) pF (max) dB dB 1.7 2.3 dB (min) dB (max) dB dB 2.6 3.4 26 18 dB (min) dB (max) dB dB FFNSE Far Field Noise Suppression Electrical SNRIE Signal-to-Noise Ratio Improvement Electrical 85 80 1.85 2.15 0.8 dB (min) dB (min) dB V (min) V (max) μVRMS mA (max) mA www.national.com LMV1091 ISD TON TOFF VIH Shut Down Current Turn-On Time (Note 9) Turn-Off Time (Note 9) Logic High Input Threshold SD pin = GND 0.1 0.7 40 60 μA (max) ms (max) ms (max) V (min) GA0, GA1, GA2, GA3, GB0, GB1, GB2, Mute1, Mute2, Mode 0, Mode 1, SD GA0, GA1, GA2, GA3, GB0, GB1, GB2, Mute1, Mute2, Mode 0, Mode 1, SD 1.4 VIL Logic Low Input Threshold 0.4 V (max) Electrical Characteristics 5.0V (Note 1) Unless otherwise specified, all limits guaranteed for TA = 25°C, VDD = 5V, VIN = 18mVP-P, SD = VDD, Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF, f = 1kHz pass through mode. Symbol Parameter Conditions LMV1091 Typical 63 65 5 880 1.2 820 Differential Out+ and Out0.1 142 220 Minimum Maximum 6 36 2 Minimum Maximum 6 18 3 f = 1kHz (See Test Method) f = 300Hz (See Test Method) f = 1kHz (See Test Method) f = 300Hz (See Test Method) Input Referred, Input AC grounded PSRR Power Supply Rejection Ratio CMRR Common Mode Rejection Ratio VBM eVBM IDDQ IDD ISD TON TOFF Microphone Bias Supply Voltage Microphone bias noise voltage on VREF pin Supply Quiescent Current Supply Current Shut Down Current Turn On Time Turn Off Time 6 Limit Units (Limits) dB dB μVRMS (Note 6) (Note 7) VIN = 18mVP-P, A-weighted, Audio band SNR eN VIN VOUT Signal-to-Noise Ratio Input Referred Noise level Maximum Input Signal Maximum AC Output Voltage DC Output Voltage THD+N Total Harmonic Distortion + Noise ZIN ZOUT AM AMR AP APR Input Impedance Output Impedance Microphone Preamplifier Gain Range Microphone Preamplifier Gain Adjustment Resolution Post Amplifier Gain Range Post Amplifier Gain Adjustment Resolution VOUT = 18mVP-P, voice band (300–3400Hz) A-Weighted THD+N < 1% f = 1kHz, THD+N < 1% between differential output 820 1.1 mVP-P (min) VRMS (min) mV 0.2 % (max) kΩ Ω dB dB 1.7 2.3 dB (min) dB (max) dB dB 2.6 3.4 26 18 dB (min) dB (max) dB dB FFNSE Far Field Noise Suppression Electrical SNRIE Signal-to-Noise Ratio Improvement Electrical 34 42 26 33 99 95 60 2.0 7 0.60 0.60 0.1 fRIPPLE = 217Hz (VRIPPLE = 100mVP-P) fRIPPLE = 1kHz (VRIPPLE = 100mVP-P) Input referred IBIAS = 1.2mA A-Weighted, CB = 10nF VIN = 0V VIN = 25mVP-P both inputs Noise cancelling mode SD pin = GND 85 80 1.85 2.15 0.8 dB (min) dB (min) dB V ( min) V (max) μVRMS mA (max) mA μA 40 60 ms (max) ms (max) www.national.com LMV1091 Symbol Parameter Conditions LMV1091 Typical Limit Units (Limits) VIH Logic High Input Threshold GA0, GA1, GA2, GA3, GB0, GB1, GB2, Mute1, Mute2, Mode 0, Mode 1, SD GA0, GA1, GA2, GA3, GB0, GB1, GB2, Mute1, Mute2, Mode 0, Mode 1, SD 1.4 V (min) VIL Logic Low Input Threshold 0.4 V (max) Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified. Note 2: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed. Note 3: The maximum power dissipation must be de-rated at elevated temperatures and is dictated by TJMAX, θJC, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX – TA) / θJA or the number given in the Absolute Maximum Ratings, whichever is lower. For the LMV1091, TJMAX = 150°C and the typical θJA for this microSMD package is 70°C/W and for the LLP package θJA is 64°C/W. Refer to the Thermal Considerations section for more information. Note 4: Human body model, applicable std. JESD22-A114C. Note 5: Machine model, applicable std. JESD22-A115-A. Note 6: Typical values represent most likely parametric norms at TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not guaranteed. Note 7: Datasheet min/max specification limits are guaranteed by test, or statistical analysis. Note 8: Default value used for performance measurements. Note 9: Guaranteed by design. 7 www.national.com LMV1091 Test Methods 30092212 FIGURE 2. FFNSE, NFSLE, SNRIE Test Circuit FAR FIELD NOISE SUPPRESSION (FFNSE) For optimum noise suppression the far field noise should be in a broadside array configuration from the two microphones (see Figure 8). Which means the far field sound source is equidistance from the two microphones. This configuration allows the amplitude of the far field signal to be equal at the two microphone inputs, however a slight phase difference may still exist. To simulate a real world application a slight phase delay was added to the FFNSE test. The block diagram from Figure 3 is used with the following procedure to measure the FFNSE. 1. A sine wave with equal frequency and amplitude (25mVP-P) is applied to Mic1 and Mic2. Using a signal generator, the phase of Mic 2 is delayed by 1.1° when compared with Mic1. 2. Measure the output level in dBV (X) 3. Mute the signal from Mic2 4. Measure the output level in dBV (Y) 5. FFNSE = Y - X dB NEAR FIELD SPEECH LOSS (NFSLE) For optimum near field speech preservation, the sound source should be in an endfire array configuration from the two microphones (see Figure 9). In this configuration the speech signal at the microphone closest to the sound source will have greater amplitude than the microphone further away. Additionally the signal at microphone further away will experience a phase lag when compared with the closer microphone. To simulate this, phase delay as well as amplitude shift was added to the NFSLE test. The schematic from Figure 3 is used with the following procedure to measure the NFSLE. 1. A 25mVP-P and 17.25mVP-P (0.69*25mVP-P) sine wave is applied to Mic1 and Mic2 respectively. Once again, a signal generator is used to delay the phase of Mic2 by 15.9° when compared with Mic1. 2. Measure the output level in dBV (X) 3. Mute the signal from Mic2 4. Measure the output level in dBV (Y) 5. NFSLE = Y - X dB SIGNAL TO NOISE RATIO IMPROVEMENT ELECTRICAL (SNRIE) The SNRIE is the ratio of FFNSE to NFSLE and is defined as: SNRIE = FFNSE - NFSLE www.national.com 8 LMV1091 Measuring Noise and SNR The overall noise of the LMV1091 is measured within the frequency band from 10Hz to 22kHz using an A-weighted filter. The Mic+ and Mic- inputs of the LMV1091 are AC shorted between the input capacitors, see Figure 11. 30092211 FIGURE 11: Noise Measurement Setup For the signal to noise ratio (SNR) the signal level at the outtal gain (20dB preamplifier and 6dB postamplifier) with only put is measured with a 1kHz input signal of 18mVP-P using an Mic1 or Mic2 used. A-weighted filter. This voltage represents the output voltage The input signal is applied differentially between the Mic+ and of a typical electret condenser microphone at a sound presMic-. Because the part is in Pass Through mode the low-pass sure level of 94dB SPL, which is the standard level for these filter at the output of the LMV1091 is disabled. measurements. The LMV1091 is programmed for 26dB of to- 9 www.national.com LMV1091 Typical Performance Characteristics THD+N vs Frequency Mic1 = AC GND, Mic2 = 36mVP-P Noise Canceling Mode Unless otherwise specified, TJ = 25°C, VDD = 3.3V, Input Voltage = 18mVP-P, f = 1kHz, pass through mode, Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF. THD+N vs Frequency Mic2 = AC GND, Mic1 = 36mVP-P Noise Canceling Mode 30092257 30092258 THD+N vs Frequency Mic1 = 36mVP-P Mic1 Pass Through Mode THD+N vs Frequency Mic2 = 36mVP-P Mic2 Pass Through Mode 30092259 30092260 THD+N vs Input Voltage Mic1 = AC GND, f = 1kHz Mic2 Noise Canceling Mode THD+N vs Input Voltage Mic2 = AC GND, f = 1kHz Mic1 Noise Canceling Mode 30092261 30092262 www.national.com 10 LMV1091 THD+N vs Input Voltage f = 1kHz Mic1 Pass Through Mode THD+N vs Input Voltage f = 1kHz Mic2 Pass Through Mode 30092263 30092264 PSRR vs Frequency Pre Amp Gain = 20dB, Post Amp Gain = 6dB VRIPPLE = 100mVP-P, Mic1 = Mic2 = AC GND Mic1 Pass Through Mode PSRR vs Frequency Pre Amp Gain = 20dB, Post Amp Gain = 6dB VRIPPLE = 100mVP-P, Mic1 = Mic2 = AC GND Mic2 Pass Through Mode 30092265 30092266 PSRR vs Frequency Pre Amp Gain = 20dB, Post Amp Gain = 6dB VRIPPLE = 100mVP-P, Mic1 = Mic2 = AC GND Noise Canceling Mode Far Field Noise Suppression Electrical vs Frequency 30092268 30092267 11 www.national.com LMV1091 Signal-to-Noise Ratio Electrical vs Frequency 30092269 www.national.com 12 LMV1091 Application Data INTRODUCTION The LMV1091 is a fully analog single chip solution to reduce the far field noise picked up by microphones in a communi- cation system. A simplified block diagram is provided in Figure 3. 30092224 FIGURE 3. Simplified Block Diagram of the LMV1091 The output signal of the microphones is amplified by a preamplifier with adjustable gain between 6dB and 36dB. After the signals are matched the analog noise cancelling suppresses the far field noise signal. The output of the analog noise cancelling processor is amplified in the post amplifier with adjustable gain between 6dB and 18dB. For optimum noise and EMI immunity, the microphones have a differential connection to the LMV1091 and the output of the LMV1091 is also differential. The adjustable gain functions can be controlled via GA0–GA3 and GB0–GB2 pins. Bias microphone supply output pin depends on the noise voltage on the internal the reference node. The de-coupling capacitor on the VREF pin determines the noise voltage on this internal reference. This capacitor should be larger than 1nF; having a larger capacitor value will result in a lower noise voltage on the Mic Bias output. Gain Balance and Gain Budget In systems where input signals have a high dynamic range, critical noise levels or where the dynamic range of the output voltage is also limited, careful gain balancing is essential for the best performance. Too low of a gain setting in the preamplifier can result in higher noise levels while too high of a gain setting in the preamplifier will result in clipping and saturation in the noise cancelling processor and output stages. The gain ranges and maximum signal levels for the different functional blocks are shown in Figure 4. Two examples are given as a guideline on how to select proper gain settings. Power Supply Circuits A low drop-out (LDO) voltage regulator in the LMV1091 allows the device to be independent of supply voltage variations. The Power On Reset (POR) circuitry in the LMV1091 requires the supply voltage to rise from 0V to VDD in less than 100ms. The Mic Bias output is provided as a low noise supply source for the electret microphones. The noise voltage on the Mic 30092241 FIGURE 4. Maximum Signal Levels 13 www.national.com LMV1091 Example 1 An application using microphones with 50mVP-P maximum output voltage, and a baseband chip after the LMV1091 with 1.5VP-P maximum input voltage. For optimum noise performance, the gain of the input stage should be set to the maximum. 1. 50mVP-P +36dB = 3.1VP-P. 2. 3.1VP-P is higher than the maximum 1.5VP-P allowed for the Noise Cancelling Block (NCB). This means a gain lower than 29.5dB should be selected. 3. Select the nearest lower gain from the gain settings shown in Table 2,28dB is selected. This will prevent the NCB from being overloaded by the microphone. With this setting, the resulting output level of the Pre Amplifier will be 1.26VP-P. 4. The NCB has a gain of 0dB which will result in 1.26VP-P at the output of the LMV1091. This level is less than maximum level that is allowed at the input of the post amp of the LMV1091. 5. The baseband chip limits the maximum output voltage to 1.5VP-P with the minimum of 6dB post amp gain, this results in requiring a lower level at the input of the post amp of 0.75VP-P. Now calculating this for a maximum preamp gain, the output of the preamp must be no more than 0.75mVP-P. 6. Calculating the new gain for the preamp will result in