LMV248LQ

LMV248 Dual Band GSM Power Controller September 2001 LMV248 Dual Band GSM Power Controller General Description The LMV248 RF power amplifier controller allows simple implementation of transmit power control loops in GSM and DCS/PCS and mobile phones. The LMV248 supports, GaAs HBT and bipolar RF power amplifiers. The device operates from a single supply of 2.5V to 5V. The LMV248 includes an error amplifier with an input summing network, input and output band switches, input filters, and output drivers. Analog input signals processed are: – Coupler/detector voltages from GSM and PCN band power amplifier outputs. – Base band DAC ramp signal. – Temperature compensation diode voltages. – Pre-bias voltage for faster PA control. Selection of the GSM or PCN output driver is made using the GSM/PCN band select pin. The On/OFF pin allows rapid power up or shutdown of the device during Tx or Rx slots. In the off mode, both output drivers are set low for PA shutdown. In the on mode, the non-active driver will remain low for continued PA shutdown. A single external capacitor/resistor combination is used to adjust the closed loop frequency response. The LMV248 replaces multiple discrete parts, reducing board area and cost. The LLP leadless package minimizes board footprint and permits flexible optimized PCB placement. Features n n n n n n n n n n Multi-band cellular operation (example: GSM, PCN) Support of GaAs HBT and bipolar technology Shutdown mode for power save in Rx slot (0.15µA) Integrated ramp filter Built-in current source for biasing Schottky diodes Pre-biasing of PA control gate voltage (VHOME) GPRS compliant External loop compensation Detector diode temperature compensation Miniature packaging: LLP-16: 4mm x 4mm x 0.8mm Applications n n n n n GSM mobile phone TDMA RF control Wireless LAN PC and PDA modules GPS navigation modules Connection Diagram 16-Pin LLP Typical Application Circuit 10137201 Top View 10137202 FIGURE 1. © 2001 National Semiconductor Corporation DS101372 www.national.com LMV248 Absolute Maximum Ratings (Note 1) Operating Temperature Storage Temperature Range Lead Temperature (solder, 4 sec) −40˚C < TJ < 85˚C −65˚C to 150˚C 260˚C If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance Human Body Model (Note 1) Machine Model Supply Voltage VDD to GND Input Voltage Range VfA, VfB, or TC to GND Ramp VHOME Junction Temperature 10V 0 to VDD 0 to VDD 150˚C max 5.5V 1500V 100V Operating Ratings (Note 1) Supply Voltage VDD to GND Input Voltage VfA, VfB, or TC to VDD Ramp VHOME Temperature Range 0V to 5V 0.2V to 1.8V 0V to 2V −20˚C ≤ TJ ≤ 85˚C 2.5V to 5V DC and AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for VDD = 2.8V, GND = 0V, TJ = 25˚C. Boldface limits apply at temperature range extremes of operating conditions. Symbol VOUT A, B VOUT A, B VOUT A, B VOS BW SR IVHOME IBS ITx_En IVfA IVfB ITC IVf-TC Match Parameter Positive Output Voltage Swing A, B Negative Output Voltage Swing A, B Negative Output Voltage Swing A,B Input Offset Voltage Bandwidth (−3dB) Output Slew Rate Current into VHOME Pin Current into BS Pin Current into En Pin Forward Bias Current Sources Temperature Compensation Current Source Current Source Matching Condition Sourcing 6mA, Tx_En = High (Note 3) Sinking 2mA, Tx_En = High (Note 3,4,5) VHOME = 0V Min (Note 7) 2.6 Typ (Note 8) 2.7 0.075 Max (Note 7) Units V 0.15 V Sinking 2mA, TX_EN = Low (Note 3,4,5) (Note 6) Rf = 50k, No External Frequency Compensation No External Frequency Compensation, VHOME = 0V (Note 7) (Note 7) (Note 7) (Note 7) (Note 7) ITC/IVfA ITC/IVfB (Note 7) (Note 7) (Note 7) Tx_En = 0V (Note 7) 160 1.8 7 7 3 60 0.06 80 0.15 100 V mV MHz V/µs >1 5.5