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LMV822MMX

LMV822MMX

  • 厂商:

    NSC

  • 封装:

  • 描述:

    LMV822MMX - Low Voltage, Low Power, R-to-R Output, 5 MHz Op Amps - National Semiconductor

  • 数据手册
  • 价格&库存
LMV822MMX 数据手册
LMV821 Single/ LMV822 Dual/ LMV824 Quad Low Voltage, Low Power, RRO, 5 MHz Op Amps August 1999 LMV821 Single/ LMV822 Dual/ LMV824 Quad Low Voltage, Low Power, R-to-R Output, 5 MHz Op Amps General Description The LMV821/LMV822/LMV824 bring performance and economy to low voltage / low power systems. With a 5 MHz unity-gain frequency and a guaranteed 1.4 V/µs slew rate, the quiescent current is only 220 µA/amplifier (2.7 V). They provide rail-to-rail (R-to-R) output swing into heavy loads (600 Ω Guarantees). The input common-mode voltage range includes ground, and the maximum input offset voltage is 3.5mV (Guaranteed). They are also capable of comfortably driving large capacitive loads (refer to the application notes section). The LMV821 (single) is available in the ultra tiny SC70-5 package, which is about half the size of the previous title holder, the SOT23-5. Overall, the LMV821/LMV822/LMV824 (Single/Dual/Quad) are low voltage, low power, performance op amps, that can be designed into a wide range of applications, at an economical price. n n n n n n n n n Guaranteed 2.5 V, 2.7 V and 5 V Performance Maximum VOS 3.5 mV (Guaranteed) VOS Temp. Drift 1 uV/˚ C GBW product @ 2.7 V 5 MHz ISupply @ 2.7 V 220 µA/Amplifier Minimum SR 1.4 V/us (Guaranteed) CMRR 90 dB PSRR 85 dB Rail-to-Rail (R-to-R) Output Swing — @600 Ω Load 160 mV from rail — @10 kΩ Load 55 mV from rail n VCM @ 5 V -0.3 V to 4.3 V n Stable with High Capacitive Loads (Refer to Application Section) Applications n n n n n Cordless Phones Cellular Phones Laptops PDAs PCMCIA Features (For Typical, 5 V Supply Values; Unless Otherwise Noted) n Ultra Tiny, SC70-5 Package 2.0 x 2.0 x 1.0 mm Connection Diagrams 5-Pin SC70-5/SOT23-5 14-Pin SO/TSSOP DS100128-84 Top View 8-Pin SO/MSOP Top View DS100128-85 DS100128-63 Top View © 1999 National Semiconductor Corporation DS100128 www.national.com Ordering Information Temperature Range Package 5-Pin SC-70-5 5-Pin SOT23-5 8-Pin SO Industrial −40˚C to +85˚C LMV821M7 LMV821M7X LMV821M5 LMV821M5X LMV822M LMV822MX 8-Pin MSOP LMV822MM LMV822MMX 14-Pin SO LMV824M LMV824MX 14-Pin TSSOP LMV824MT LMV824MTX A15 A15 A14 A14 LMV822M LMV822M LMV822 LMV822 LMV824M LMV824M LMV824MT LMV824MT 1k Units Tape and Reel 3k Units Tape and Reel 1k UnitsTape and Reel 3k Units Tape and Reel Rails 2.5k Units Tape and Reel 1k Units Tape and Reel 3.5k Units Tape and Reel Rails 2.5k Units Tape and Reel Rails 2.5k Units Tape and Reel MTC14 M14A MUA08A M08A MA05B MAA05 Packaging Marking Transport Media NSC Drawing www.national.com 2 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Machine Model Human Body Model LMV822/824 LMV821 Differential Input Voltage Supply Voltage (V+–V −) Output Short Circuit to V+ (Note 3) Output Short Circuit to V− (Note 3) Soldering Information Infrared or Convection (20 sec) Storage Temperature Range Junction Temperature (Note 4) 235˚C −65˚C to 150˚C 150˚C 2000V 1500V 100V Operating Ratings (Note 1) Supply Voltage Temperature Range LMV821, LMV822, LMV824 Thermal Resistance (θ JA) 2.5V to 5.5V −40˚C ≤T ≤85˚C J Ultra Tiny SC70-5 Package 5-Pin Surface Mount Tiny SOT23-5 Package Surface Mount 5-Pin 440 ˚C/W 265 ˚C/W ± Supply Voltage 5.5V SO Package, 8-Pin Surface Mount MSOP Package, 8-Pin Mini Surface Mount SO Package, 14-Pin Surface Mount TSSOP Package, 14-Pin 190 ˚C/W 235 ˚C/W 145 ˚C/W 155 ˚C/W 2.7V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 2.7V, V Boldface limits apply at the temperature extremes. Symbol VOS TCVOS IB IOS CMRR +PSRR −PSRR VCM Parameter Input Offset Voltage Input Offset Voltage Average Drift Input Bias Current Input Offset Current Common Mode Rejection Ratio Positive Power Supply Rejection Ratio Negative Power Supply Rejection Ratio Input Common-Mode Voltage Range 0V ≤ VCM ≤ 1.7V 1.7V ≤ V+ ≤ 4V, V- = 1V, VO = 0V, VCM = 0V -1.0V ≤ V- ≤ -3.3V, V+ =1.7V, VO= 0V, VCM = 0V For CMRR ≥ 50dB Condition − = 0V, VCM = 1.0V, VO = 1.35V and R Typ (Note 5) 1 1 30 0.5 85 85 85 -0.3 2.0 90 140 30 50 70 68 75 70 73 70 -0.2 1.9 90 85 90 100 95 85 80 95 90 90 85 LMV821/822/824 Limit (Note 6) 3.5 4 L > 1 MΩ. Units mV max µV/˚C nA max nA max dB min dB min dB min V max V min dB min dB min dB min dB min AV Large Signal Voltage Gain Sourcing, RL=600Ω to 1.35V, VO=1.35V to 2.2V Sinking, RL=600Ω to 1.35V, VO=1.35V to 0.5V Sourcing, RL=2kΩ to 1.35V, VO=1.35V to 2.2V Sinking, RL=2kΩ to 1.35, VO=1.35 to 0.5V 100 3 www.national.com 2.7V DC Electrical Characteristics (Continued) − Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 2.7V, V Boldface limits apply at the temperature extremes. Symbol VO Parameter Output Swing + = 0V, VCM = 1.0V, VO = 1.35V and R Typ (Note 5) 2.58 0.13 LMV821/822/824 Limit (Note 6) 2.50 2.40 0.20 0.30 2.60 2.50 0.08 0.120 0.200 12 12 0.3 0.5 0.6 0.8 1.0 1.2 L > 1 MΩ. Units V min V max V min V max mA min mA min mA max mA max mA max Condition V =2.7V, RL= 600Ω to 1.35V V+=2.7V, RL= 2kΩ to 1.35V 2.66 IO Output Current Sourcing, VO=0V Sinking, VO=2.7V 16 26 0.22 0.45 0.72 IS Supply Current LMV821 (Single) LMV822 (Dual) LMV824 (Quad) 2.5V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 2.5V, V Boldface limits apply at the temperature extremes. Symbol VOS VO Parameter Input Offset Voltage Output Swing V+=2.5V, RL= 600Ω to 1.25V Condition − = 0V, VCM = 1.0V, VO = 1.25V and R Typ (Note 5) 1 2.37 0.13 LMV821/822/824 Limit (Note 6) 3.5 4 2.30 2.20 0.20 0.30 2.40 2.30 0.08 0.12 0.20 L > 1 MΩ. Units mV max V min V max V min V max V+=2.5V, RL= 2kΩ to 1.25V 2.46 2.7V AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 2.7V, V Boldface limits apply at the temperature extremes. Symbol SR GBW Φm Gm en Slew Rate Gain-Bandwdth Product Phase Margin Gain Margin Amp-to-Amp Isolation Input-Related Voltage Noise (Note 8) f = 1 kHz, VCM = 1V Parameter (Note 7) Conditions − = 0V, VCM = 1.0V, VO = 1.35V and R Typ (Note 5) 1.5 5 61 10 135 28 L > 1 MΩ. Units V/µs MHz Deg. dB dB LMV821/822/824 Limit (Note 6) www.national.com 4 2.7V AC Electrical Characteristics (Continued) − Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 2.7V, V Boldface limits apply at the temperature extremes. Symbol in THD Parameter Input-Referred Current Noise Total Harmonic Distortion f = 1 kHz f = 1 kHz, AV = −2, RL = 10 kΩ, VO = 4.1 VPP Conditions = 0V, VCM = 1.0V, VO = 1.35V and R Typ (Note 5) 0.1 L > 1 MΩ. Units LMV821/822/824 Limit (Note 6) 0.01 % 5V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 5V, V Boldface limits apply at the temperature extremes. Symbol VOS TCVOS IB IOS CMRR +PSRR −PSRR VCM Parameter Input Offset Voltage Input Offset Voltage Average Drift Input Bias Current Input Offset Current Common Mode Rejection Ratio Positive Power Supply Rejection Ratio Negative Power Supply Rejection Ratio Input Common-Mode Voltage Range 0V ≤ VCM ≤ 4.0V 1.7V ≤ V+ ≤ 4V, V- = 1V, VO = 0V, VCM = 0V -1.0V ≤ V- ≤ -3.3V, V+ =1.7V, VO = 0V, VCM = 0V For CMRR ≥ 50dB Condition − = 0V, VCM = 2.0V, VO = 2.5V and R Typ (Note 5) 1 1 40 0.5 90 85 85 -0.3 4.3 100 150 30 50 72 70 75 70 73 70 -0.2 4.2 95 90 105 105 105 4.84 0.17 95 90 95 90 95 90 4.75 4.70 0.250 .30 4.85 4.80 0.10 0.15 0.20 L > 1 MΩ. Units mV max µV/˚C nA max nA max dB min dB min dB min V max V min dB min dB min dB min dB min V min V max V min V max LMV821/822/824 Limit (Note 6) 3.5 4.0 AV Large Signal Voltage Gain Sourcing, RL=600Ω to 2.5V, VO=2.5 to 4.5V Sinking, RL=600Ω to 2.5V, VO=2.5 to 0.5V Sourcing, RL=2kΩ to 2.5V, VO=2.5 to 4.5V Sinking, RL=2kΩ to 2.5, VO=2.5 to 0.5V 105 VO Output Swing V+=5V,RL= 600Ω to 2.5V V+=5V, RL=2kΩ to 2.5V 4.90 5 www.national.com 5V DC Electrical Characteristics (Continued) − Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 5V, V Boldface limits apply at the temperature extremes. Symbol IO Parameter Output Current Condition Sourcing, VO=0V Sinking, VO=5V IS Supply Current LMV821 (Single) LMV822 (Dual) LMV824 (Quad) = 0V, VCM = 2.0V, VO = 2.5V and R Typ (Note 5) 45 40 0.30 0.5 1.0 L > 1 MΩ. Units mA min mA min mA max mA max mA max LMV821/822/824 Limit (Note 6) 20 15 20 15 0.4 0.6 0.7 0.9 1.3 1.5 5V AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 5V, V Boldface limits apply at the temperature extremes. Symbol SR GBW Φm Gm en in THD Slew Rate Gain-Bandwdth Product Phase Margin Gain Margin Amp-to-Amp Isolation Input-Related Voltage Noise Input-Referred Current Noise Total Harmonic Distortion (Note 8) f = 1 kHz, VCM = 1V f = 1 kHz f = 1 kHz, AV = −2, RL = 10 kΩ, VO = 4.1 VPP Parameter (Note 7) Conditions − = 0V, VCM = 2V, VO = 2.5V and R Typ (Note 5) 2.0 5.6 67 15 135 24 0.25 L > 1 MΩ. Units V/µs min MHz Deg. dB dB LMV821/822/824 Limit (Note 6) 1.4 0.01 % Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: Human body model, 1.5 kΩ in series wth 100 pF. Machine model, 200Ω in series with 100 pF. Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150˚C. Output currents in excess of 45 mA over long term may adversely affect reliability. (max)–T A)/θJA. Note 4: The maximum power dissipation is a function of TJ(max) , θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJAll numbers apply for packages soldered directly into a PC board. Note 5: Typical Values represent the most likely parametric norm. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: V+ = 5V. Connected as voltage follower with 3V step input. Number specified is the slower of the positive and negative slew rates. Note 8: Input referred, V+ = 5V and RL = 100 kΩ connected to 2.5V. Each amp excited in turn with 1 kHz to produce V O = 3 VPP. www.national.com 6 5V AC Electrical Characteristics (Continued) Unless otherwise specified, VS = +5V, single supply, TA = 25˚C. Sourcing Current vs Output Voltage (VS=2.7V) Typical Performance Characteristics Supply Current vs Supply Voltage (LMV821) Input Current vs Temperature DS100128-2 DS100128-1 DS100128-3 Sourcing Current vs Output Voltage (VS=5V) Sinking Current vs Output Voltage (VS=2.7V) Sinking Current vs Output Voltage (VS=5V) DS100128-4 DS100128-5 DS100128-6 Output Voltage Swing vs Supply Voltage (RL=10kΩ) Output Voltage Swing vs Supply Voltage (RL=2kΩ) Output Voltage Swing vs Supply Voltage (RL=600Ω) DS100128-7 DS100128-86 DS100128-8 7 www.national.com Typical Performance Characteristics TA = 25˚C. (Continued) Output Voltage Swing vs Load Resistance Unless otherwise specified, VS = +5V, single supply, Input Voltage Noise vs Frequency Input Current Noise vs Frequency DS100128-18 DS100128-87 DS100128-17 Crosstalk Rejection vs Frequency +PSRR vs Frequency -PSRR vs Frequency DS100128-93 DS100128-9 DS100128-10 CMRR vs Frequency Input Voltage vs Output Voltage Gain and Phase Margin vs Frequency (RL=100kΩ, 2kΩ, 600Ω) 2.7V DS100128-47 DS100128-88 DS100128-11 www.national.com 8 Typical Performance Characteristics TA = 25˚C. (Continued) Gain and Phase Margin vs Frequency (RL=100kΩ, 2kΩ, 600Ω) 5V Unless otherwise specified, VS = +5V, single supply, Gain and Phase Margin vs Frequency (Temp.=25, -40, 85˚C, RL= 10kΩ) 2.7V Gain and Phase Margin vs Frequency (Temp.=25, -40, 85 ˚C, RL=10kΩ) 5V DS100128-12 DS100128-13 DS100128-14 Gain and Phase Margin vs Frequency (CL=100pF, 200pF, 0pF, RL=10kΩ)2.7V Gain and Phase Margin vs Frequency (CL=100pF,200pF,0pF RL=10kΩ)5V Gain and Phase Margin vs Frequency (CL=100pF,200pF,0pF RL=600Ω)2.7V DS100128-15 DS100128-16 DS100128-19 Gain and Phase Margin vs Frequency (CL=100pF,200pF,0pF RL=600Ω)5V Slew Rate vs Supply Voltage Non-Inverting Large Signal Pulse Response DS100128-62 DS100128-20 DS100128-21 9 www.national.com Typical Performance Characteristics TA = 25˚C. (Continued) Non-Inverting Small Signal Pulse Response Unless otherwise specified, VS = +5V, single supply, Inverting Large Signal Pulse Response Inverting Small Signal Pulse Response DS100128-24 DS100128-27 DS100128-30 THD vs Frequency DS100128-82 www.national.com 10 APPLICATION NOTE This application note is divided into two sections: design considerations and Application Circuits. 1.0 Design Considerations This section covers the following design considerations: 1. Frequency and Phase Response Considerations 2. Unity-Gain Pulse Response Considerations 3. Input Bias Current Considerations 1.1 Frequency and Phase Response Considerations The relationship between open-loop frequency response and open-loop phase response determines the closed-loop stability performance (negative feedback). The open-loop phase response causes the feedback signal to shift towards becoming positive feedback, thus becoming unstable. The further the output phase angle is from the input phase angle, the more stable the negative feedback will operate. Phase Margin (φm) specifies this output-to-input phase relationship at the unity-gain crossover point. Zero degrees of phasemargin means that the input and output are completely in phase with each other and will sustain oscillation at the unitygain frequency. The AC tables show φm for a no load condition. But φm changes with load. The Gain and Phase margin vs Frequency plots in the curve section can be used to graphically determine the φm for various loaded conditions. To do this, examine the phase angle portion of the plot, find the phase margin point at the unity-gain frequency, and determine how far this point is from zero degree of phase-margin. The larger the phase-margin, the more stable the circuit operation. The bandwidth is also affected by load. The graphs of Figure 1 and Figure 2 provide a quick look at how various loads affect the φm and the bandwidth of the LMV821/822/824 family. These graphs show capacitive loads reducing both φm and bandwidth, while resistive loads reduce the bandwidth but increase the φm. Notice how a 600Ω resistor can be added in parallel with 220 picofarads capacitance, to increase the φm 20˚(approx.), but at the price of about a 100 kHz of bandwidth. Overall, the LMV821/822/824 family provides good stability for loaded condition. DS100128-61 FIGURE 2. Unity-Gain Frequency vs Common Mode Voltage for Various Loads 1.2 Unity Gain Pulse Response Considerations A pull-up resistor is well suited for increasing unity-gain, pulse response stability. For example, a 600 Ω pull-up resistor reduces the overshoot voltage by about 50%, when driving a 220 pF load. Figure 3 shows how to implement the pull-up resistor for more pulse response stability. DS100128-41 FIGURE 3. Using a Pull-up Resistor at the Output for Stabilizing Capacitive Loads Higher capacitances can be driven by decreasing the value of the pull-up resistor, but its value shouldn’t be reduced beyond the sinking capability of the part. An alternate approach is to use an isolation resistor as illustrated in Figure 4 . Figure 5 shows the resulting pulse response from a LMV824, while driving a 10,000pF load through a 20 Ω isolation resistor. DS100128-43 FIGURE 4. Using an Isolation Resistor to Drive Heavy Capacitive Loads DS100128-60 FIGURE 1. Phase Margin vs Common Mode Voltage for Various Loads 11 www.national.com 2.1 Telephone-Line Transceiver The telephone-line transceiver of Figure 7 provides a fullduplexed connection through a PCMCIA, miniature transformer. The differential configuration of receiver portion (UR), cancels reception from the transmitter portion (UT). Note that the input signals for the differential configuration of UR, are the transmit voltage (Vt) and Vt/2. This is because Rmatch is chosen to match the coupled telephone-line impedance; therefore dividing Vt by two (assuming R1 >> Rmatch). The differential configuration of UR has its resistors chosen to cancel the Vt and Vt/2 inputs according to the following equation: DS100128-54 FIGURE 5. Pulse Response per Figure 4 1.3 Input Bias Current Consideration Input bias current (IB) can develop a somewhat significant offset voltage. This offset is primarily due to IB flowing through the negative feedback resistor, RF. For example, if IB is 90nA (max room) and RF is 100 kΩ, then an offset of 9 mV will be developed (VOS=IBx RF).Using a compensation resistor (RC), as shown in Figure 6, cancels out this affect. But the input offset current (IOS) will still contribute to an offset voltage in the same manner - typically 0.05 mV at room temp. DS100128-33 FIGURE 7. Telephone-line Transceiver for a PCMCIA Modem Card Note that Cr is included for canceling out the inadequacies of the lossy, miniature transformer. Refer to application note AN-397 for detailed explanation. 2.2“Simple” Mixer (Amplitude Modulator) The mixer of Figure 8 is simple and provides a unique form of amplitude modulation. Vi is the modulation frequency (FM), while a +3V square-wave at the gate of Q1, induces a carrier frequency (FC). Q1 switches (toggles) U1 between inverting and non-inverting unity gain configurations. Offsetting a sine wave above ground at Vi results in the oscilloscope photo of Figure 9. The simple mixer can be applied to applications that utilize the Doppler Effect to measure the velocity of an object. The difference frequency is one of its output frequency components. This difference frequency magnitude (/FM-FC/) is the key factor for determining an object’s velocity per the Doppler Effect. If a signal is transmitted to a moving object, the reflected frequency will be a different frequency. This difference in transmit and receive frequency is directly proportional to an object’s velocity. DS100128-59 FIGURE 6. Canceling the Voltage Offset Effect of Input Bias Current 2.0 APPLICATION CIRCUITS This section covers the following application circuits: 1. Telephone-Line Transceiver 2. “Simple” Mixer (Amplitude Modulator) 3. Dual Amplifier Active Filters (DAAFs) a. Low-Pass Filter (LPF) • b. High-Pass Filter (HPF) • 5. Tri-level Voltage Detector www.national.com 12 DS100128-39 FIGURE 8. Amplitude Modulator Circuit DS100128-36 FIGURE 10. Dual Amplifier, 3 kHz Low-Pass Active Filter with a Butterworth Response and a Pass Band Gain of Times Two f mod f carrier DS100128-40 FIGURE 9. Output signal per the Circuit of Figure 8 2.4 Dual Amplifier Active Filters (DAAFs) The LMV822/24 bring economy and performance to DAAFs. The low-pass and the high-pass filters of Figure 10 and Figure 11 (respectively), offer one key feature: excellent sensitivity performance. Good sensitivity is when deviations in component values cause relatively small deviations in a filter’s parameter such as cutoff frequency (Fc). Single amplifier active filters like the Sallen-Key provide relatively poor sensitivity performance that sometimes cause problems for high production runs; their parameters are much more likely to deviate out of specification than a DAAF would. The DAAFs of Figure 10 and Figure 11 are well suited for high volume production. DS100128-37 FIGURE 11. Dual Amplifier, 300 Hz High-Pass Active Filter with a Butterworth Response and a Pass Band Gain of Times Two Table 1 provides sensitivity measurements for a 10 MΩ load condition. The left column shows the passive components for the 3 kHz low-pass DAAF. The third column shows the components for the 300 Hz high-pass DAAF. Their respective sensitivity measurements are shown to the right of each component column. Their values consists of the percent change in cutoff frequency (Fc) divided by the percent change in component value. The lower the sensitivity value, the better the performance. Each resistor value was changed by about 10 percent, and this measured change was divided into the measured change in Fc. A positive or negative sign in front of the measured value, represents the direction Fc changes relative to components’ direction of change. For example, a sensitivity value of negative 1.2, means that for a 1 percent increase in component value, Fc decreases by 1.2 percent. Note that this information provides insight on how to fine tune the cutoff frequency, if necessary. It should be also noted that R4 and R5 of each circuit also caused variations in 13 www.national.com the pass band gain. Increasing R4 by ten percent, increased the gain by 0.4 dB, while increasing R5 by ten percent, decreased the gain by 0.4 dB. TABLE 1. Component (LPF) Ra C1 R2 R3 C3 R4 R5 Sensitivity (LPF) -1.2 -0.1 -1.1 +0.7 -1.5 -0.6 +0.6 Component (HPF) Ca Rb R1 C2 R3 R4 R5 Sensitivity (HPF) -0.7 -1.0 +0.1 -0.1 +0.1 -0.1 +0.1 To simplify the design process, certain components are set equal to each other. Refer to Figure 10 and Figure 11. These equal component values help to simplify the design equations as follows: Active filters are also sensitive to an op amp’s parameters -Gain and Bandwidth, in particular. The LMV822/24 provide a large gain and wide bandwidth. And DAAFs make excellent use of these feature specifications. Single Amplifier versions require a large open-loop to closed-loop gain ratio - approximately 50 to 1, at the Fc of the filter response. Figure 12 shows an impressive photograph of a network analyzer measurement (hp3577A). The measurement was taken from a 300kHz version of Figure 10. At 300 kHz, the open-loop to closed-loop gain ratio @ Fc is about 5 to 1. This is 10 times lower than the 50 to 1 “rule of thumb” for Single Amplifier Active Filters. To illustrate the design process/implementation, a 3 kHz, Butterworth response, low-pass filter DAAF (Figure 10) is designed as follows: 1. Choose C1 = C3 = C = 1 nF 2. Choose R4 = R5 = 1 kΩ 3. Calculate Ra and R2 for the desired Fc as follows: DS100128-92 FIGURE 12. 300 kHz, Low-Pass Filter, Butterworth Response as Measured by the HP3577A Network Analyzer In addition to performance, DAAFs are relatively easy to design and implement. The design equations for the low-pass and high-pass DAAFs are shown below. The first two equation calculate the Fc and the circuit Quality Factor (Q) for the LPF (Figure 10). The second two equations calculate the Fc and Q for the HPF (Figure 11). 4. Calculate R3 for the desired Q. The desired Q for a Butterworth (Maximally Flat) response is 0.707 (45 degrees into the s-plane). R3 calculates as follows: Notice that R3 could also be calculated as 0.707 of Ra or R2. The circuit was implemented and its cutoff frequency measured. The cutoff frequency measured at 2.92 kHz. The circuit also showed good repeatability. Ten different LMV822 samples were placed in the circuit. The corresponding change in the cutoff frequency was less than a percent. www.national.com 14 2.5 Tri-level Voltage Detector The tri-level voltage detector of Figure 13 provides a type of window comparator function. It detects three different input voltage ranges: Min-range, Mid-range, and Max-range. The output voltage (VO) is at VCC for the Min-range. VO is clamped at GND for the Mid-range. For the Max-range, VO is at Vee. Figure 14 shows a VO vs. VI oscilloscope photo per the circuit of Figure 13. Its operation is as follows: VI deviating from GND, causes the diode bridge to absorb IIN to maintain a clamped condition (VO= 0V). Eventually, IIN reaches the bias limit of the diode bridge. When this limit is reached, the clamping effect stops and the op amp responds open loop. The design equation directly preceding Figure 14, shows how to determine the clamping range. The equation solves for the input voltage band on each side GND. The mid-range is twice this voltage band. DS100128-89 | ∆v | ∆v | OV -Vo +Vo -VIN OV +VIN DS100128-35 DS100128-34 FIGURE 14. X, Y Oscilloscope Trace showing VOUT vs VIN per the Circuit of Figure 13 FIGURE 13. Tri-level Voltage Detector 15 www.national.com SC70-5 Tape and Reel Specification DS100128-96 SOT-23-5 Tape and Reel Specification Tape Format Tape Section Leader (Start End) Carrier Trailer (Hub End) # Cavities 0 (min) 75 (min) 3000 250 125 (min) 0 (min) Cavity Status Empty Empty Filled Filled Empty Empty Cover Tape Status Sealed Sealed Sealed Sealed Sealed Sealed www.national.com 16 Tape Dimensions DS100128-97 8 mm Tape Size 0.130 (3.3) DIM A 0.124 (3.15) DIM Ao 0.130 (3.3) DIM B 0.126 (3.2) DIM Bo 0.138 ± 0.002 (3.5 ± 0.05) DIM F 0.055 ± 0.004 (1.4 ± 0.11) DIM Ko 0.157 (4) DIM P1 0.315 ± 0.012 (8 ± 0.3) DIM W 17 www.national.com Reel Dimensions DS100128-98 8 mm Tape Size 7.00 330.00 A 0.059 0.512 0.795 2.165 1.50 B 13.00 20.20 55.00 C D N 0.331 + 0.059/−0.000 8.40 + 1.50/−0.00 W1 0.567 14.40 W2 W1+ 0.078/−0.039 W1 + 2.00/−1.00 W3 www.national.com 18 Physical Dimensions inches (millimeters) unless otherwise noted SC70-5 Order Number LMV821M7 or LMV821M7X NS Package Number MAA05 19 www.national.com Physical Dimensions inches (millimeters) unless otherwise noted (Continued) SOT 23-5 Order Number LMV821M5 or LMV821M5X NS Package Number MA05B www.national.com 20 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Pin Small Outline Order Number LMV822M or LMV822MX NS Package Number M08A 21 www.national.com Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Pin MSOP Order Number LMV822MM or LMV822MMX NS Package Number MUA08A www.national.com 22 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Pin Small Outline Order Number LMV824M or LMV824MX NS Package Number M14A 23 www.national.com LMV821 Single/ LMV822 Dual/ LMV824 Quad Low Voltage, Low Power, RRO, 5 MHz Op Amps Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Pin TSSOP Order Number LMV824MTC or LMV824MTCX NS Package Number MTC14 LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com www.national.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: sea.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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LMV822MMX/NOPB

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