LMV831MG

LMV831 Single/ LMV832 Dual/ LMV834 Quad 3.3 MHz Low Power CMOS, EMI Hardened Operational Amplifiers PRELIMINARY August 5, 2008 LMV831/LMV832/LMV834 3 MHz Low Power CMOS, EMI Hardened Operational Amplifiers General Description National’s LMV831, LMV832, and LMV834 are CMOS input, low power op amp IC's, providing a low input bias current, a wide temperature range of −40°C to 125°C and exceptional performance making them robust general purpose parts. Additionally, the LMV831/LMV832/LMV834 are EMI hardened to minimize any interference so they are ideal for EMI sensitive applications. The unity gain stable LMV831/LMV832/LMV834 feature 3.3 MHz of bandwidth while consuming only 0.24 mA of current per channel. These parts also maintain stability for capacitive loads as large as 200 pF. The LMV831/LMV832/ LMV834 provide superior performance and economy in terms of power and space usage. This family of parts has a maximum input offset voltage of 1 mV, a rail-to-rail output stage and an input common-mode voltage range that includes ground. Over an operating range from 2.7V to 5.5V the LMV831/LMV832/LMV834 provide a PSRR of 93 dB, and a CMRR of 91 dB. The LMV831 is offered in the space saving 5-Pin SC70 package, the LMV832 in the 8-Pin MSOP and the LMV834 is offered in the 14-Pin TSSOP package. Features Unless otherwise noted, typical values at TA= 25°C, V+= 3.3V 2.7V to 5.5V ■ Supply voltage 240 µA ■ Supply current (per channel) 1 mV max ■ Input offset voltage 0.1 pA ■ Input bias current 3.3 MHz ■ GBW 120 dB ■ EMIRR at 1.8 GHz 12 nV/√Hz ■ Input noise voltage at 1 kHz 2 V/µs ■ Slew rate Rail-to-Rail ■ Output voltage swing 30 mA ■ Output current drive ■ Operating ambient temperature range −40°C to 125°C Applications ■ ■ ■ ■ ■ Photodiode preamp Piezoelectric sensors Portable/battery-powered electronic equipment Filters/buffers PDAs/phone accessories Typical Application EMI Hardened Sensor Application 30024101 © 2008 National Semiconductor Corporation 300241 www.national.com LMV831 Single/ LMV832 Dual/ LMV834 Quad Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Human Body Model Charge-Device Model Machine Model VIN Differential Supply Voltage (VS = V+ – V−) Voltage at Input/Output Pins 2 kV 1 kV 200V ± Supply Voltage 6V V++0.4V, V− −0.4V (Note 4) Storage Temperature Range Junction Temperature (Note 3) Soldering Information Infrared or Convection (20 sec) −65°C to 150°C 150°C 260°C Operating Ratings Temperature Range (Note 3) Supply Voltage (VS = V+ – V−) (Note 1) −40°C to 125°C 2.7V to 5.5V 302°C/W 217°C/W 135°C/W Package Thermal Resistance (θJA (Note 3)) 5-Pin SC-70 8-Pin MSOP 14-Pin TSSOP 3.3V Electrical Characteristics Symbol VOS TCVOS IB IOS CMRR PSRR EMIRR Parameter Input Offset Voltage (Note 9) Input Offset Voltage Temperature Drift (Notes 9, 10) Input Bias Current (Note 10) Input Offset Current Common-Mode Rejection Ratio (Note 9) Power Supply Rejection Ratio (Note 9) EMI Rejection Ratio, IN+ and IN(Note 8) Unless otherwise specified, all limits are guaranteed for at TA = 25°C, V+ = 3.3V, V− = 0V, VCM = V+/2, and RL =10 kΩ to V+/2. Boldface limits apply at the temperature extremes. Conditions Min (Note 6) Typ (Note 5) ±0.25 ±0.5 0.1 1 0.2V ≤ VCM ≤ V+ - 1.2V 2.7V ≤ V+ ≤ 5.5V, VOUT = 1V VRF_PEAK=100 mVP (−20 dBP), f = 400 MHz VRF_PEAK=100 mVP (−20 dBP), f = 900 MHz VRF_PEAK=100 mVP (−20 dBP), f = 1800 MHz VRF_PEAK=100 mVP (−20 dBP), f = 2400 MHz CMVR AVOL Input Common-Mode Voltage Range CMRR ≥ 65 dB Large Signal Voltage Gain (Note 11) RL = 2 kΩ, VOUT = 0.15V to 1.65V, VOUT = 3.15V to 1.65V RL = 10 kΩ, VOUT = 0.1V to 1.65V, VOUT = 3.2V to 1.65V VOUT Output Voltage Swing High RL = 2 kΩ to V+/2 RL = 10 kΩ to V+/2 Output Voltage Swing Low RL = 2 kΩ to V+/2 RL = 10 kΩ to V+/2 −0.1 102 102 104 104 121 76 75 76 75 91 93 80 90 110 120 2.1 V dB Max (Note 6) ±1.00 ±1.23 ±1.5 10 500 Units mV μV/°C pA pA dB dB 126 dB 29 6 23 5 36 43 8 9 34 43 8 10 mV from either rail www.national.com 2 LMV831 Single/ LMV832 Dual/ LMV834 Quad Symbol IOUT Parameter Output Short Circuit Current Conditions Sourcing, VOUT = VCM, VIN = 100 mV Sinking, VOUT = VCM, VIN = −100 mV Min (Note 6) 27 22 27 21 Typ (Note 5) 28 32 0.24 0.46 0.96 2 3.3 65 12 10 0.005 500 15 20 Max (Note 6) Units mA IS Supply Current LMV831 LMV832 LMV834 0.27 0.30 0.51 0.58 mA SR GBW Φm en in ROUT CIN THD+N Slew Rate (Note 7) Gain Bandwidth Product Phase Margin AV = +1, VOUT = 1 VPP, 10% to 90% V/μs MHz deg nV/ pA/ Ω pF % Input Referred Voltage Noise Density f = 1 kHz f = 10 kHz Input Referred Current Noise Density f = 1 kHz Closed Loop Output Impedance Common-mode Input Capacitance Differential-mode Input Capacitance Total Harmonic Distortion + Noise f = 1 kHz, AV = 1, BW ≥ 500 kHz (Note 4) f = 2 MHz 0.02 5V Electrical Characteristics Symbol VOS TCVOS IB IOS CMRR PSRR EMIRR Parameter Input Offset Voltage (Note 9) Input Offset Voltage Temperature Drift (Notes 9, 10) Input Bias Current (Note 10) Input Offset Current Common-Mode Rejection Ratio (Note 9) Power Supply Rejection Ratio (Note 9) EMI Rejection Ratio, IN+ and IN(Note 8) Unless otherwise specified, all limits are guaranteed for at TA = 25°C, V+ = 5V, V− = 0V, VCM = V+/2, and RL = 10 kΩ to V+/2. Boldface limits apply at the temperature extremes. Conditions Min (Note 6) Typ (Note 5) ±0.25 ±0.5 0.1 1 0V ≤ VCM ≤ V+ −1.2V 77 77 76 75 93 93 80 90 110 120 –0.1 3.8 V dB Max (Note 6) ±1.00 ±1.23 ±1.5 10 500 Units mV μV/°C pA pA dB dB 2.7V ≤ V+ ≤ 5.5V, VOUT = 1V VRF_PEAK=100 mVP (−20 dBP), f = 400 MHz VRF_PEAK=100 mVP (−20 dBP), f = 900 MHz VRF_PEAK=100 mVP (−20 dBP), f = 1800 MHz VRF_PEAK=100 mVP (−20 dBP), f = 2400 MHz CMVR Input Common-Mode Voltage Range CMRR ≥ 65 dB 3 www.national.com LMV831 Single/ LMV832 Dual/ LMV834 Quad Symbol AVOL Parameter Large Signal Voltage Gain (Note 11) Conditions RL = 2 kΩ, VOUT = 0.15V to 2.5V, VOUT = 4.85V to 2.5V RL = 10 kΩ, VOUT = 0.1V to 2.5V, VOUT = 4.9V to 2.5V Min (Note 6) 107 106 107 107 Typ (Note 5) 127 Max (Note 6) Units 130 dB VOUT Output Voltage Swing High RL = 2 kΩ to V+/2 RL = 10 kΩ to V+/2 32 6 27 6 59 49 50 41 66 64 0.25 0.47 1.00 2 3.3 65 42 49 9 10 43 52 10 12 mV from either rail Output Voltage Swing Low RL = 2 kΩ to V+/2 RL = 10 kΩ to V+/2 IOUT Output Short Circuit Current Sourcing VOUT = VCM VIN = 100 mV Sinking VOUT = VCM VIN = −100 mV mA IS Supply Current LMV831 LMV832 LMV834 0.27 0.31 0.52 0.60 mA SR GBW Φm en in ROUT CIN THD+N Slew Rate (Note 7) Gain Bandwidth Product Phase Margin Input Referred Voltage Noise Input Referred Current Noise Closed Loop Output Impedance Common-mode Input Capacitance Differential-mode Input Capacitance Total Harmonic Distortion + Noise AV = +1, VOUT = 2VPP, 10% to 90% V/μs MHz deg nV/ pA/ Ω pF % f = 1 kHz f = 10 kHz f = 1 kHz f = 2 MHz 12 10 0.005 500 14 20 f = 1 kHz, AV = 1, BW ≥ 500 kHz 0.02 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables. Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) FieldInduced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). Note 3: The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board. Note 4: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using statistical quality control (SQC) method. Note 7: Number specified is the slower of positive and negative slew rates. Note 8: The EMI Rejection Ratio is defined as EMIRR = 20log ( VRF_PEAK/ΔVOS). Note 9: The typical value is calculated by applying absolute value transform to the distribution, then taking the statistical average of the resulting distribution. Note 10: This parameter is guaranteed by design and/or characterization and is not tested in production. Note 11: The specified limits represent the lower of the measured values for each output range condition. www.national.com 4 LMV831 Single/ LMV832 Dual/ LMV834 Quad Connection Diagrams 5-Pin SC-70 8-Pin MSOP 14-Pin TSSOP 30024102 Top View Top View 30024103 30024104 Top View Ordering Information Package 5-Pin SC-70 8-Pin MSOP 14-Pin TSSOP Part Number LMV831MG LMV831MGX LMV832MM LMV832MMX LMV834MT LMV834MTX Package Marking AFA AU5A LMV834MT Transport Media 1k Units Tape and Reel 3k Units Tape and Reel 1k Units Tape and Reel 3.5k Units Tape and Reel 94 Units/Rail 2.5k Units Tape and Reel NSC Drawing MAA05A MUA08A MTC14 Status Preliminary Release Preliminary 5 www.national.com LMV831 Single/ LMV832 Dual/ LMV834 Quad Typical Performance Characteristics specified. VOS vs. VCM at V+ = 3.3V At TA = 25°C, RL = 10 kΩ, V+ = 3.3V, V− = 0V, Unless otherwise VOS vs. VCM at V+ = 5.0V 30024110 30024111 VOS vs. Supply Voltage VOS vs. Temperature 30024112 30024113 VOS vs. VOUT Input Bias Current vs. VCM at 25°C 30024114 30024115 www.national.com 6 LMV831 Single/ LMV832 Dual/ LMV834 Quad Input Bias Current vs. VCM at 85°C Input Bias Current vs. VCM at 125°C 30024116 30024117 Supply Current vs. Supply Voltage Single LMV831 Supply Current vs. Supply Voltage Dual LMV832 30024118 30024119 Supply Current vs. Supply Voltage Quad LMV834 Supply Current vs. Temperature Single LMV831 30024120 30024121 7 www.national.com LMV831 Single/ LMV832 Dual/ LMV834 Quad Supply Current vs. Temperature Dual LMV832 Supply Current vs. Temperature Quad LMV834 30024122 30024123 Sinking Current vs. Supply Voltage Sourcing Current vs. Supply Voltage 30024124 30024125 Output Swing High vs. Supply Voltage RL = 2 kΩ Output Swing High vs. Supply Voltage RL = 10 kΩ 30024126 30024127 www.national.com 8 LMV831 Single/ LMV832 Dual/ LMV834 Quad Output Swing Low vs. Supply Voltage RL = 2 kΩ Output Swing Low vs. Supply Voltage RL = 10 kΩ 30024128 30024129 Output Voltage Swing vs. Load Current at V+ = 3.3V Output Voltage Swing vs. Load Current at V+ = 5.0V 30024130 30024131 Open Loop Frequency Response vs. Temperature Open Loop Frequency Response vs. Load Conditions 30024132 30024133 9 www.national.com LMV831 Single/ LMV832 Dual/ LMV834 Quad Phase Margin vs. Capacitive Load PSRR vs. Frequency 30024134 30024135 CMRR vs. Frequency Channel Separation vs. Frequency 30024136 30024137 Large Signal Step Response with Gain = 1 Large Signal Step Response with Gain = 10 30024138 30024139 www.national.com 10 LMV831 Single/ LMV832 Dual/ LMV834 Quad Small Signal Step Response with Gain = 1 Small Signal Step Response with Gain = 10 30024140 30024141 Slew Rate vs. Supply Voltage Input Voltage Noise vs. Frequency 30024142 30024144 THD+N vs. Frequency THD+N vs. Amplitude 30024145 30024146 11 www.national.com LMV831 Single/ LMV832 Dual/ LMV834 Quad ROUT vs. Frequency EMIRR IN+ vs. Power at 400 MHz 30024147 30024148 EMIRR IN+ vs. Power at 900 MHz EMIRR IN+ vs. Power at 1800 MHz 30024149 30024150 EMIRR IN+ vs. Power at 2400 MHz EMIRR IN+ vs. Frequency 30024151 30024152 www.national.com 12 LMV831 Single/ LMV832 Dual/ LMV834 Quad Application Information INTRODUCTION The LMV831, LMV832 and LMV834 are operational amplifiers with excellent specifications, such as low offset, low noise and a rail-to-rail output. These specifications make the LMV831, LMV832 and LMV834 great choices for medical and instrumentation applications such as diagnosis equipment. The low supply current is perfectly suited for battery powered equipment. The small packages, SC-70 package for the LMV831, the MSOP package for the dual LMV832 and the TSSOP package for the quad LMV834, make these parts a perfect choice for portable electronics. Additionally, the EMI hardening makes the LMV831, LMV832 or LMV834 a must for almost all op amp applications. Most applications are exposed to Radio Frequency (RF) signals such as the signals transmitted by mobile phones or wireless computer peripherals. The LMV831, LMV832 and LMV834 will effectively reduce disturbances caused by RF signals to a level that will be hardly noticeable. This again reduces the need for additional filtering and shielding. Using this EMI resistant series of op amps will thus reduce the number of components and space needed for applications that are affected by EMI, and will help applications, not yet identified as possible EMI sensitive, to be more robust for EMI. INPUT CHARACTERISTICS The input common mode voltage range of the LMV831, LMV832 and LMV834 includes ground, and can even sense well below ground. The CMRR level does not degrade for input levels up to 1.2V below the supply voltage. For a supply voltage of 5V, the maximum voltage that should be applied to the input for best CMRR performance is thus 3.8V. When not configured as unity gain, this input limitation will usually not degrade the effective signal range. The output is rail-to-rail and therefore will introduce no limitations to the signal range. The typical offset is only 0.25 mV, and the TCVOS is 0.5 μV/°C, specifications close to precision op amps. CMRR MEASUREMENT The CMRR measurement results may need some clarification. This is because different setups are used to measure the AC CMRR and the DC CMRR. The DC CMRR is derived from ΔVOS versus ΔVCM. This value is stated in the tables, and is tested during production testing. The AC CMRR is measured with the test circuit shown in Figure 1. 30024164 FIGURE 1. AC CMRR Measurement Setup The configuration is largely the usually applied balanced configuration. With potentiometer P1, the balance can be tuned to compensate for the DC offset in the DUT. The main difference is the addition of the buffer. This buffer prevents the open-loop output impedance of the DUT from affecting the balance of the feedback network. Now the closed-loop output impedance of the buffer is a part of the balance. As the closedloop output impedance is much lower, and by careful selection of the buffer also has a larger bandwidth, the total effect is that the CMRR of the DUT can be measured much more accurately. The differences are apparent in the larger measured bandwidth of the AC CMRR. One artifact from this test circuit is that the low frequency CMRR results appear higher than expected. This is because in the AC CMRR test circuit the potentiometer is used to compensate for the DC mismatches. So, mainly AC mismatch is all that remains. Therefore, the obtained DC CMRR from this AC CMRR test circuit tends to be higher than the actual DC CMRR based on DC measurements. The CMRR curve in Figure 2 shows a combination of the AC CMRR and the DC CMRR. 30024136 FIGURE 2. CMRR Curve 13 www.national.com LMV831 Single/ LMV832 Dual/ LMV834 Quad OUTPUT CHARACTERISTICS As already mentioned the output is rail-to-rail. When loading the output with a 10 kΩ resistor the maximum swing of the output is typically 6 mV from the positive and negative rail. The output of the LMV831/LMV832/LMV834 can drive currents up to 30 mA at 3.3V and even up to 65 mA at 5V The LMV831/LMV832/LMV834 can be connected as non-inverting unity-gain amplifiers. This configuration is the most sensitive to capacitive loading. The combination of a capacitive load placed at the output of an amplifier along with the amplifier’s output impedance creates a phase lag, which reduces the phase margin of the amplifier. If the phase margin is significantly reduced, the response will be under damped which causes peaking in the transfer and, when there is too much peaking, the op amp might start oscillating. The LMV831/LMV832/LMV834 can directly drive capacitive loads up to 200 pF without any stability issues. In order to drive heavier capacitive loads, an isolation resistor, RISO, should be used, as shown in Figure 3. By using this isolation resistor, the capacitive load is isolated from the amplifier’s output, and hence, the pole caused by CL is no longer in the feedback loop. The larger the value of RISO, the more stable the amplifier will be. If the value of RISO is sufficiently large, the feedback loop will be stable, independent of the value of CL. However, larger values of RISO result in reduced output swing and reduced output current drive. nificantly simplifies the unambiguous measurement and specification of the EMI performance of an op amp. RF signals interfere with op amps via the non-linearity of the op amp circuitry. This non-linearity results in the detection of the so called out-of-band signals. The obtained effect is that the amplitude modulation of the out-of-band signal is downconverted into the base band. This base band can easily overlap with the band of the op amp circuit. As an example Figure 4 depicts a typical output signal of a unity-gain connected op amp in the presence of an interfering RF signal. Clearly the output voltage varies in the rhythm of the on-off keying of the RF carrier. 30024165 FIGURE 4. Offset voltage variation due to an interfering RF signal EMIRR DEFINITION To identify EMI hardened op amps, a parameter is needed that quantitatively describes the EMI performance of op amps. A quantitative measure enables the comparison and the ranking of op amps on their EMI robustness. Therefore the EMI Rejection Ratio (EMIRR) is introduced. This parameter describes the resulting input-referred offset voltage shift of an op amp as a result of an applied RF carrier (interference) with a certain frequency and level. The definition of EMIRR is given by: 30024163 FIGURE 3. Isolating Capacitive Load A resistor value of around 150Ω would be sufficient. As an example some values are given in the following table, for 5V. CLOAD 300 pF 400 pF 500 pF RISO 165Ω 175Ω 185Ω EMIRR With the increase of RF transmitting devices in the world, the electromagnetic interference (EMI) between those devices and other equipment becomes a bigger challenge. The LMV831, LMV832 and LMV834 are EMI hardened op amps which are specifically designed to overcome electromagnetic interference. Along with EMI hardened op amps, the EMIRR parameter is introduced to unambiguously specify the EMI performance of an op amp. This section presents an overview of EMIRR. A detailed description on this specification for EMI hardened op amps can be found in Application Note AN-1698. The dimensions of an op amp IC are relatively small compared to the wavelength of the disturbing RF signals. As a result the op amp itself will hardly receive any disturbances. The RF signals interfering with the op amp are dominantly received by the PCB and wiring connected to the op amp. As a result the RF signals on the pins of the op amp can be represented by voltages and currents. This representation sig- In which VRF_PEAK is the amplitude of the applied un-modulated RF signal (V) and ΔVOS is the resulting input-referred offset voltage shift (V). The offset voltage depends quadratically on the applied RF level, and therefore, the RF level at which the EMIRR is determined should be specified. The standard level for the RF signal is 100 mVP. Application Note AN-1698 addresses the conversion of an EMIRR measured for an other signal level than 100 mVP. The interpretation of the EMIRR parameter is straightforward. When two op amps have an EMIRR which differ by 20 dB, the resulting error signals when used in identical configurations, differ by 20 dB as well. So, the higher the EMIRR, the more robust the op amp. Coupling an RF Signal to the IN+ Pin Each of the op amp pins can be tested separately on EMIRR. In this section the measurements on the IN+ pin (which, based on symmetry considerations, also apply to the IN- pin) are discussed. In Application Note AN-1698 the other pins of the op amp are treated as well. For testing the IN+ pin the op amp is connected in the unity gain configuration. Applying the RF signal is straightforward as it can be connected directly to the IN+ pin. As a result the RF signal path has a minimum of components that might affect the RF signal level at the pin. www.national.com 14 LMV831 Single/ LMV832 Dual/ LMV834 Quad The circuit diagram is shown in Figure 5. The PCB trace from RFIN to the IN+ pin should be a 50Ω stripline in order to match the RF impedance of the cabling and the RF generator. On the PCB a 50Ω termination is used. This 50Ω resistor is also used to set the bias level of the IN+ pin to ground level. For determining the EMIRR, two measurements are needed: one is measuring the DC output level when the RF signal is off; and the other is measuring the DC output level when the RF signal is switched on. The difference of the two DC levels is the output voltage shift as a result of the RF signal. As the op amp is in the unity gain configuration, the input referred offset voltage shift corresponds one-to-one to the measured output voltage shift. nected at the negative output of the pressure sensor prevents the loading of the bridge by resistor R2. The buffer also prevents the resistors of the sensor from affecting the gain of the following gain stage. The op amps are placed in a single supply configuration. The experiment is performed on two different dual op amps: a typical standard op amp and the LMV832, EMI hardened dual op amp. A cell phone is placed on a fixed position a couple of centimeters from the op amps in the sensor circuit. When the cell phone is called, the PCB and wiring connected to the op amps receive the RF signal. Subsequently, the op amps detect the RF voltages and currents that end up at their pins. The resulting effect on the output of the second op amp is shown in Figure 6. 30024168 30024167 FIGURE 5. Circuit for coupling the RF signal to IN+ Cell Phone Call The effect of electromagnetic interference is demonstrated in a setup where a cell phone interferes with a pressure sensor application. The application is shown in Figure 7. This application needs two op amps and therefore a dual op amp is used. The op amp configured as a buffer and con- FIGURE 6. Comparing EMI Robustness The difference between the two types of dual op amps is clearly visible. The typical standard dual op amp has an output shift (disturbed signal) larger than 1V as a result of the RF signal transmitted by the cell phone. The LMV832, EMI hardened op amp does not show any significant disturbances. This means that the RF signal will not disturb the signal entering the ADC when using the LMV832. 30024169 FIGURE 7. Pressure Sensor Application DECOUPLING AND LAYOUT Care must be given when creating a board layout for the op amp. For decoupling the supply lines it is suggested that 10 nF capacitors be placed as close as possible to the op amp. For single supply, place a capacitor between V+ and V−. For dual supplies, place one capacitor between V+ and the board ground, and a second capacitor between ground and V−. 15 Even with the LMV831/LMV832/LMV834 inherent hardening against EMI, it is still recommended to keep the input traces short and as far as possible from RF sources. Then the RF signals entering the chip are as low as possible, and the remaining EMI can be, almost, completely eliminated in the chip by the EMI reducing features of the LMV831/LMV832/ LMV834. www.national.com LMV831 Single/ LMV832 Dual/ LMV834 Quad PRESSURE SENSOR APPLICATION The LMV831/LMV832/LMV834 can be used for pressure sensor applications. Because of their low power the LMV831/ LMV832/LMV834 are ideal for portable applications, such as blood pressure measurement devices, or portable barometers. This example describes a universal pressure sensor that can be used as a starting point for different types of sensors and applications. Pressure Sensor Characteristics The pressure sensor used in this example functions as a Wheatstone bridge. The value of the resistors in the bridge change when pressure is applied to the sensor. This change of the resistor values will result in a differential output voltage, depending on the sensitivity of the sensor and the applied pressure. The difference between the output at full scale pressure and the output at zero pressure is defined as the span of the pressure sensor. A typical value for the span is 100 mV. A typical value for the resistors in the bridge is 5 kΩ. Loading of the resistor bridge could result in incorrect output voltages of the sensor. Therefore the selection of the circuit configuration, which connects to the sensor, should take into account a minimum loading of the sensor. Pressure Sensor Example The configuration shown in Figure 7 is simple, and is very useful for the read out of pressure sensors. With two op amps in this application, the dual LMV832 fits very well. The op amp configured as a buffer and connected at the negative output of the pressure sensor prevents the loading of the bridge by resistor R2. The buffer also prevents the resistors of the sensor from affecting the gain of the following gain stage. Given the differential output voltage VS of the pressure sensor, the output signal of this op amp configuration, VOUT, equals: To align the pressure range with the full range of an ADC, the power supply voltage and the span of the pressure sensor are needed. For this example a power supply of 5V is used and the span of the sensor is 100 mV. When a 100Ω resistor is used for R2, and a 2.4 kΩ resistor is used for R1, the maximum voltage at the output is 4.95V and the minimum voltage is 0.05V. This signal is covering almost the full input range of the ADC. Further processing can take place in the microprocessor following the ADC. www.national.com 16 LMV831 Single/ LMV832 Dual/ LMV834 Quad Physical Dimensions inches (millimeters) unless otherwise noted 5-Pin SC-70 NS Package Number MAA05A 8-Pin MSOP NS Package Number MUA08A 17 www.national.com LMV831 Single/ LMV832 Dual/ LMV834 Quad 14-Pin TSSOP NS Package Number MTC14 www.national.com 18 LMV831 Single/ LMV832 Dual/ LMV834 Quad Notes 19 www.national.com LMV831 Single/ LMV832 Dual/ LMV834 Quad 3.3 MHz Low Power CMOS, EMI Hardened Operational Amplifiers Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers Audio Clock Conditioners Data Converters Displays Ethernet Interface LVDS Power Management Switching Regulators LDOs LED Lighting PowerWise Serial Digital Interface (SDI) Temperature Sensors Wireless (PLL/VCO) www.national.com/amplifiers www.national.com/audio www.national.com/timing www.national.com/adc www.national.com/displays www.national.com/ethernet www.national.com/interface www.national.com/lvds www.national.com/power www.national.com/switchers www.national.com/ldo www.national.com/led www.national.com/powerwise www.national.com/sdi www.national.com/tempsensors www.national.com/wireless WEBENCH Analog University App Notes Distributors Green Compliance Packaging Design Support www.national.com/webench www.national.com/AU www.national.com/appnotes www.national.com/contacts www.national.com/quality/green www.national.com/packaging www.national.com/quality www.national.com/refdesigns www.national.com/feedback Quality and Reliability Reference Designs Feedback THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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