LMV862MMX

LMV861 Single/ LMV862 Dual 30 MHz Low Power CMOS, EMI Hardened Operational Amplifiers February 22, 2008 LMV861/LMV862 30 MHz Low Power CMOS, EMI Hardened Operational Amplifiers General Description National’s LMV861 and LMV862 are CMOS input, low power op amp IC's, providing a low input bias current, a wide temperature range of −40°C to +125°C and exceptional performance making them robust general purpose parts. Additionally, the LMV861 and LMV862 are EMI hardened to minimize any interference so they are ideal for EMI sensitive applications. The unity gain stable LMV861 and LMV862 feature 30 MHz of bandwidth while consuming only 2.25 mA of current per channel. These parts also maintain stability for capacitive loads as large as 200 pF. The LMV861 and LMV862 provide superior performance and economy in terms of power and space usage. This family of parts has a maximum input offset voltage of 1 mV, a rail-to-rail output stage and an input common-mode voltage range that includes ground. Over an operating range from 2.7V to 5.5V the LMV861 and LMV862 provide a PSRR of 93 dB, and a CMRR of 93 dB. The LMV861 is offered in the space saving 5-Pin SC70 package, and the LMV862 in the 8-Pin MSOP. Features Unless otherwise noted, typical values at TA = 25°C, V+ = 3.3V 2.7V to 5.5V ■ Supply voltage 2.25 mA ■ Supply current (per channel) 1 mV max ■ Input offset voltage 0.1 pA ■ Input bias current 30 MHz ■ GBW 105 dB ■ EMIRR at 1.8 GHz 8 nV/√Hz ■ Input noise voltage at 1 kHz 18 V/µs ■ Slew rate Rail-to-Rail ■ Output voltage swing 67 mA ■ Output current drive ■ Operating ambient temperature range −40°C to 125°C Applications ■ ■ ■ ■ Photodiode preamp Weight scale systems Filters/buffers Medical diagnosis equipment Typical Application EMI Hardened Sensor Application 30024001 © 2008 National Semiconductor Corporation 300240 www.national.com LMV861 Single/ LMV862 Dual Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Human Body Model Charge-Device Model Machine Model VIN Differential Supply Voltage (V+ – V−) Voltage at Input/Output Pins 2 kV 1 kV 200V ± Supply Voltage 6V V+ +0.4V V− −0.4V (Note 4) Storage Temperature Range Junction Temperature (Note 3) Soldering Information Infrared or Convection (20 sec) −65°C to +150°C +150°C 260°C Operating Ratings Temperature Range (Note 3) Supply Voltage (V+ – V−) (Note 1) −40°C to +125°C 2.7V to 5.5V 302°C/W 217°C/W Package Thermal Resistance (θJA (Note 3)) 5-Pin SC70 8-Pin MSOP 3.3V Electrical Characteristics Symbol VOS TCVOS IB IOS CMRR PSRR EMIRR Parameter Input Offset Voltage (Note 9) Input Offset Voltage Drift (Notes 9, 10) Input Bias Current (Note 10) Input Offset Current Common Mode Rejection Ratio (Note 9) Power Supply Rejection Ratio (Note 9) EMI Rejection Ratio, IN+ and IN− (Note 8) Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 3.3V, V− = 0V, VCM = V+/2, and RL =10 kΩ to V+/2. Boldface limits apply at the temperature extremes. Conditions Min (Note 6) Typ (Note 5) ±273 ±0.7 0.1 1 0.2V ≤ VCM ≤ V+ - 1.2V 2.7V ≤ V+ ≤ 5.5V, VOUT = 1V VRF_PEAK = 100 mVP (−20 dBVP), f = 400 MHz VRF_PEAK = 100 mVP (−20 dBVP), f = 900 MHz VRF_PEAK = 100 mVP (−20 dBVP), f = 1800 MHz VRF_PEAK = 100 mVP (−20 dBVP), f = 2400 MHz CMVR AVOL Input Common-Mode Voltage Range CMRR ≥ 65 dB Large Signal Voltage Gain (Note 11) RL = 2 kΩ VOUT = 0.15V to 1.65V, VOUT = 3.15V to 1.65V RL = 10 kΩ VOUT = 0.1V to 1.65V, VOUT = 3.2V to 1.65V VO Output Swing High, (measured from V+) RL = 2 kΩ to V+/2 RL = 10 kΩ to V+/2 Output Swing Low, (measured from V−) RL = 2 kΩ to V+/2 RL = 10 kΩ to V+/2 −0.1 100 97 100 98 110 77 75 77 76 93 93 70 80 105 110 2.1 V dB Max (Note 6) ±1000 1260 ±2.6 10 500 Units μV μV/°C pA pA dB dB 113 dB 12 3 8 2 14 18 4 5 12 16 4 5 mV mV www.national.com 2 LMV861 Single/ LMV862 Dual Symbol IO Parameter Output Short Circuit Current Conditions Sourcing, VOUT = VCM, VIN = 100 mV Sinking, VOUT = VCM, VIN = −100 mV Min (Note 6) 61 52 72 58 Typ (Note 5) 70 86 2.25 4.4 18 30 70 Max (Note 6) Units mA IS Supply Current LMV861 LMV862 2.59 3.00 mA V/μs MHz deg nV/ pA/ Ω pF % SR GBW Φm en in ROUT CIN THD Slew Rate (Note 7) Gain Bandwidth Product Phase Margin Input-Referred Voltage Noise Input-Referred Current Noise Closed Loop Output Impedance Common-Mode Input Capacitance Differential-Mode Input Capacitance Total Harmonic Distortion AV = +1, VOUT = 1 VPP, 10% to 90% f = 1 kHz f = 100 kHz f = 1 kHz f = 20 MHz 8 5 0.015 80 21 15 f = 1 kHz, AV = 1, BW ≥ 500 kHz (Note 4) 0.02 5V Electrical Characteristics Symbol VOS TCVOS IB IOS CMRR PSRR EMIRR Parameter Input Offset Voltage (Note 9) Input Offset Voltage Drift (Notes 9, 10) Input Bias Current (Note 10) Input Offset Current Common-Mode Rejection Ratio (Note 9) Power Supply Rejection Ratio (Note 9) EMI Rejection Ratio, IN+ and IN− (Note 8) Unless otherwise specified, all limits are guaranteed for T = 25°C, V+ = 5V, V− = 0V, VCM = V+/2, and RL =10 kΩ to V+/2. Boldface limits apply at the temperature extremes. Conditions Min (Note 6) Typ (Note 5) ±273 ±0.7 0.1 1 0V ≤ VCM ≤ V+ –1.2V 78 77 77 76 94 93 70 80 105 110 −0.1 103 100 103 100 111 3.9 V dB Max (Note 6) ±1000 1260 ±2.6 10 500 Units μV μV/°C pA pA dB dB 2.7V ≤ V+ ≤ 5.5V, VOUT = 1V VRF_PEAK = 100 mVP (−20 dBVP), f = 400 MHz VRF_PEAK = 100 mVP (−20 dBVP), f = 900 MHz VRF_PEAK = 100 mVP (−20 dBVP), f = 1800 MHz VRF_PEAK = 100 mVP (−20 dBVP), f = 2400 MHz CMVR AVOL Input Common-Mode Voltage Range CMRR ≥ 65 dB Large Signal Voltage Gain (Note 11) RL = 2 kΩ VOUT = 0.15V to 2.5V, VOUT = 4.85V to 2.5V RL = 10 kΩ VOUT = 0.1V to 2.5V, VOUT = 4.9V to 2.5V 3 113 dB www.national.com LMV861 Single/ LMV862 Dual Symbol VO Parameter Output Swing High, (measured from V+) Conditions RL = 2 kΩ to V+/2 RL = 10 kΩ to V+/2 Min (Note 6) Typ (Note 5) 13 3 10 3 Max (Note 6) 15 19 4 5 14 18 4 5 Units mV Output Swing Low, (measured from V−) RL = 2 kΩ to V+/2 RL = 10 kΩ to V+/2 mV IO Output Short Circuit Current Sourcing, VOUT = VCM, VIN = 100 mV Sinking, VOUT = VCM, VIN = −100 mV 90 86 90 86 150 150 2.47 4.9 20 31 71 V/μs MHz deg nV/ pA/ Ω pF % 2.84 3.27 mA IS Supply Current LMV861 LMV862 mA SR GBW Φm en in ROUT CIN THD Slew Rate (Note 7) Gain Bandwidth Product Phase Margin Input-Referred Voltage Noise Input-Referred Current Noise Closed Loop Output Impedance Common-Mode Input Capacitance Differential-Mode Input Capacitance Total Harmonic Distortion AV = +1, VOUT = 2VPP, 10% to 90% f = 1 kHz f = 100 kHz f = 1 kHz f = 20 MHz 8 5 0.015 60 20 15 f = 1 kHz, AV= 1, BW ≥ 500 kHz 0.02 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables. Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) FieldInduced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). Note 3: The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board. Note 4: Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device. Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using statistical quality control (SQC) method. Note 7: Number specified is the slower of positive and negative slew rates. Note 8: The EMI Rejection Ratio is defined as EMIRR = 20log ( VRF_PEAK/ΔVOS). Note 9: The typical value is calculated by applying absolute value transform to the distribution, then taking the statistical average of the resulting distribution Note 10: This parameter is guaranteed by design and/or characterization and is not tested in production. Note 11: The specified limits represent the lower of the measured values for each output range condition. www.national.com 4 LMV861 Single/ LMV862 Dual Connection Diagrams 5-Pin SC70 8-Pin MSOP 30024002 Top View 30024003 Top View Ordering Information Package 5-Pin SC70 8-Pin MSOP Part Number LMV861MG LMV861MGX LMV862MM LMV862MMX Package Marking AEA AJ5A Transport Media 1k units Tape and Reel 3k units Tape and Reel 1k units Tape and Reel 3.5k units Tape and Reel NSC Drawing MAA05A MUA08A Status Release Preliminary 5 www.national.com LMV861 Single/ LMV862 Dual Typical Performance Characteristics specified. VOS vs. VCM at V+ = 3.3V At TA = 25°C. RL = 10 kΩ, V+ = 3.3V, V− = 0V, unless otherwise VOS vs. VCM at V+ = 5.0V 30024010 30024011 VOS vs. Supply Voltage VOS vs. Temperature 30024012 30024013 VOS vs. VOUT Input Bias Current vs. VCM at 25°C 30024014 30024015 www.national.com 6 LMV861 Single/ LMV862 Dual Input Bias Current vs. VCM at 85°C Input Bias Current vs. VCM at 125°C 30024016 30024017 Supply Current vs. Supply Voltage Single LMV861 Supply Current vs. Supply Voltage Dual LMV862 30024018 30024019 Supply Current vs. Temperature Single LMV861 Supply Current vs. Temperature Dual LMV862 30024021 30024022 7 www.national.com LMV861 Single/ LMV862 Dual Sinking Current vs. Supply Voltage Sourcing Current vs. Supply Voltage 30024024 30024025 Output Swing High vs. Supply Voltage RL = 2 kΩ Output Swing High vs. Supply Voltage RL = 10 kΩ 30024026 30024027 Output Swing Low vs. Supply Voltage RL = 2 kΩ Output Swing Low vs. Supply Voltage RL = 10 kΩ 30024028 30024029 www.national.com 8 LMV861 Single/ LMV862 Dual Output Voltage Swing vs. Load Current at V+ = 3.3V Output Voltage Swing vs. Load Current at V+ = 5.0V 30024030 30024031 Open Loop Frequency Response vs. Temperature Open Loop Frequency Response vs. Load Conditions 30024032 30024033 Phase Margin vs. Capacitive Load PSRR vs. Frequency 30024034 30024035 9 www.national.com LMV861 Single/ LMV862 Dual CMRR vs. Frequency Channel Separation vs. Frequency 30024036 30024037 Large Signal Step Response with Gain = 1 Large Signal Step Response with Gain = 10 30024038 30024039 Small Signal Step Response with Gain = 1 Small Signal Step Response with Gain = 10 30024040 30024041 www.national.com 10 LMV861 Single/ LMV862 Dual Slew Rate vs. Supply Voltage Input Voltage Noise vs. Frequency 30024042 30024044 THD+N vs. Frequency THD+N vs. Amplitude 30024045 30024046 ROUT vs. Frequency EMIRR IN+ vs. Power at 400 MHz 30024047 30024048 11 www.national.com LMV861 Single/ LMV862 Dual EMIRR IN+ vs. Power at 900 MHz EMIRR IN+ vs. Power at 1800 MHz 30024049 30024050 EMIRR IN+ vs. Power at 2400 MHz EMIRR IN+ vs. Frequency 30024051 30024052 www.national.com 12 LMV861 Single/ LMV862 Dual Application Information INTRODUCTION The LMV861 and LMV862 are operational amplifiers with excellent specifications, such as low offset, low noise and a railto-rail output. These specifications make the LMV861 and LMV862 great choices for medical and instrumentation applications such as diagnosis equipment and power line monitors. The low supply current is perfect for battery powered equipment. The small packages, SC70 package for the LMV861, and the MSOP package for the dual LMV862, make these parts a perfect choice for portable electronics. Additionally, the EMI hardening makes the LMV861 and LMV862 a must for almost all op amp applications. Most applications are exposed to Radio Frequency (RF) signals such as the signals transmitted by mobile phones or wireless computer peripherals. The LMV861 and LMV862 will effectively reduce disturbances caused by RF signals to a level that will be hardly noticeable. This again reduces the need for additional filtering and shielding. Using this EMI resistant series of op amps will thus reduce the number of components and space needed for applications that are affected by EMI, and will help applications, not yet identified as possible EMI sensitive, to be more robust for EMI. INPUT CHARACTERISTICS The input common mode voltage range of the LMV861 and LMV862 includes ground, and can even sense well below ground. The CMRR level does not degrade for input levels up to 1.2V below the supply voltage. For a supply voltage of 5V, the maximum voltage that should be applied to the input for best CMRR performance is thus 3.8V. When not configured as unity gain, this input limitation will usually not degrade the effective signal range. The output is rail-to-rail and therefore will introduce no limitations to the signal range. The typical offset is only 0.273 mV, and the TCVOS is 0.7 μV/°C, specifications close to precision op amps. CMRR MEASUREMENT The CMRR measurement results may need some clarification. This is because different setups are used to measure the AC CMRR and the DC CMRR. The DC CMRR is derived from ΔVOS versus ΔVCM. This value is stated in the tables, and is tested during production testing. The AC CMRR is measured with the test circuit shown in Figure 1. 30024064 FIGURE 1. AC CMRR Measurement Setup The configuration is largely the usually applied balanced configuration. With potentiometer P1, the balance can be tuned to compensate for the DC offset in the DUT. The main difference is the addition of the buffer. This buffer prevents the open-loop output impedance of the DUT from affecting the balance of the feedback network. Now the closed-loop output impedance of the buffer is a part of the balance. But as the closed-loop output impedance is much lower, and by careful selection of the buffer also has a larger bandwidth, the total effect is that the CMRR of the DUT can be measured much more accurately. The differences are apparent in the larger measured bandwidth of the AC CMRR. One artifact from this test circuit is that the low frequency CMRR results appear higher than expected. This is because in the AC CMRR test circuit the potentiometer is used to compensate for the DC mismatches. So, mainly AC mismatch is all that remains. Therefore, the obtained DC CMRR from this AC CMRR test circuit tends to be higher than the actual DC CMRR based on DC measurements. The CMRR curve in Figure 2 shows a combination of the AC CMRR and the DC CMRR. 30024036 FIGURE 2. CMRR Curve 13 www.national.com LMV861 Single/ LMV862 Dual OUTPUT CHARACTERISTICS As already mentioned the output is rail-to-rail. When loading the output with a 10 kΩ resistor the maximum swing of the output is typically 3 mV from the positive and negative rail. The output of the LMV861 and LMV862 can drive currents up to 70 mA at 3.3V, and even up to 150 mA at 5V. The LMV861 and LMV862 can be connected as non-inverting unity gain amplifiers. This configuration is the most sensitive to capacitive loading. The combination of a capacitive load placed at the output of an amplifier along with the amplifier’s output impedance creates a phase lag, which reduces the phase margin of the amplifier. If the phase margin is significantly reduced, the response will be under damped which causes peaking in the transfer and, when there is too much peaking, the op amp might start oscillating. The LMV861 and LMV862 can directly drive capacitive loads up to 200 pF without any stability issues. In order to drive heavier capacitive loads, an isolation resistor, RISO, should be used, as shown in Figure 3. By using this isolation resistor, the capacitive load is isolated from the amplifier’s output, and hence, the pole caused by CL is no longer in the feedback loop. The larger the value of RISO, the more stable the amplifier will be. If the value of RISO is sufficiently large, the feedback loop will be stable, independent of the value of CL. However, larger values of RISO result in reduced output swing and reduced output current drive. The RF signals interfering with the op amp are dominantly received by the PCB and wiring connected to the op amp. As a result the RF signals on the pins of the op amp can be represented by voltages and currents. This representation significantly simplifies the unambiguous measurement and specification of the EMI performance of an op amp. RF signals interfere with op amps via the non-linearity of the op amp circuitry. This non-linearity results in the detection of the so called out-of-band signals. The obtained effect is that the amplitude modulation of the out-of-band signal is downconverted into the base band. This base band can easily overlap with the band of the op amp circuit. As an example Figure 4 depicts a typical output signal of a unity-gain connected op amp in the presence of an interfering RF signal. Clearly the output voltage varies in the rhythm of the on-off keying of the RF carrier. 30024065 FIGURE 4. Offset voltage variation due to an interfering RF signal EMIRR DEFINITION To identify EMI hardened op amps, a parameter is needed that quantitatively describes the EMI performance of op amps. A quantitative measure enables the comparison and the ranking of op amps on their EMI robustness. Therefore the EMI Rejection Ratio (EMIRR) is introduced. This parameter describes the resulting input-referred offset voltage shift of an op amp as a result of an applied RF carrier (interference) with a certain frequency and level. The definition of EMIRR is given by: 30024063 FIGURE 3. Isolating Capacitive Load A resistor value of around 50Ω would be sufficient. As an example some values are given in the following table, for 5V and an open loop gain of 111 dB. CLOAD 300 pF 400 pF 500 pF RISO 62Ω 55Ω 50Ω When increasing the closed-loop gain the capacitive load can be increased even further. With a closed loop gain of 2 and a 27Ω isolation resistor, the load can be 1 nF EMIRR With the increase of RF transmitting devices in the world, the electromagnetic interference (EMI) between those devices and other equipment becomes a bigger challenge. The LMV861 and LMV862 are EMI hardened op amps which are specifically designed to overcome electromagnetic interference. Along with EMI hardened op amps, the EMIRR parameter is introduced to unambiguously specify the EMI performance of an op amp. This section presents an overview of EMIRR. A detailed description on this specification for EMI hardened op amps can be found in Application Note AN-1698. The dimensions of an op amp IC are relatively small compared to the wavelength of the disturbing RF signals. As a result the op amp itself will hardly receive any disturbances. www.national.com 14 In which VRF_PEAK is the amplitude of the applied un-modulated RF signal (V) and ΔVOS is the resulting input-referred offset voltage shift (V). The offset voltage depends quadratically on the applied RF level, and therefore, the RF level at which the EMIRR is determined should be specified. The standard level for the RF signal is 100 mVP. Application Note AN-1698 addresses the conversion of an EMIRR measured for an other signal level than 100 mVP. The interpretation of the EMIRR parameter is straightforward. When two op amps have EMIRRs which differ by 20 dB, the resulting error signals when used in identical configurations, differs by 20 dB as well. So, the higher the EMIRR, the more robust the op amp. Coupling an RF Signal to the IN+ Pin Each of the op amp pins can be tested separately on EMIRR. In this section the measurements on the IN+ pin (which, based on symmetry considerations, also apply to the IN- pin) are discussed. In Application Note AN-1698 the other pins of the op amp are treated as well. For testing the IN+ pin the op LMV861 Single/ LMV862 Dual amp is connected in the unity gain configuration. Applying the RF signal is straightforward as it can be connected directly to the IN+ pin. As a result the RF signal path has a minimum of components that might affect the RF signal level at the pin. The circuit diagram is shown in Figure 5. The PCB trace from RFIN to the IN+ pin should be a 50Ω stripline in order to match the RF impedance of the cabling and the RF generator. On the PCB a 50Ω termination is used. This 50Ω resistor is also used to set the bias level of the IN+ pin to ground level. For determining the EMIRR, two measurements are needed: one is measuring the DC output level when the RF signal is off; and the other is measuring the DC output level when the RF signal is switched on. The difference of the two DC levels is the output voltage shift as a result of the RF signal. As the op amp is in the unity gain configuration, the input referred offset voltage shift corresponds one-to-one to the measured output voltage shift. This application needs two op amps and therefore a dual op amp is used. The op amp configured as a buffer and connected at the negative output of the pressure sensor prevents the loading of the bridge by resistor R2. The buffer also prevents the resistors of the sensor from affecting the gain of the following gain stage. The op amps are placed in a single supply configuration. The experiment is performed on two different op amps: a typical standard op amp and the LMV862, EMI hardened dual op amp. A cell phone is placed on a fixed position a couple of centimeters from the op amps in the sensor circuit. When the cell phone is called, the PCB and wiring connected to the op amps receive the RF signal. Subsequently, the op amps detect the RF voltages and currents that end up at their pins. The resulting effect on the output of the second op amp is shown in Figure 6. 30024062 FIGURE 6. Comparing EMI Robustness 30024067 FIGURE 5. Circuit for coupling the RF signal to IN+ Cell Phone Call The effect of electromagnetic interference is demonstrated in a setup where a cell phone interferes with a pressure sensor application. The application is show in Figure 7. The difference between the two types of op amps is clearly visible. The typical standard dual op amp has an output shift (disturbed signal) larger than 1V as a result of the RF signal transmitted by the cell phone. The LMV862, EMI hardened op amp does not show any significant disturbances. This means that the RF signal will not disturb the signal entering the ADC when using the LMV862. 30024061 FIGURE 7. Pressure Sensor Application 15 www.national.com LMV861 Single/ LMV862 Dual DECOUPLING AND LAYOUT Care must be given when creating a board layout for the op amp. For decoupling the supply lines it is suggested that 10 nF capacitors be placed as close as possible to the op amp. For single supply, place a capacitor between V+ and V−. For dual supplies, place one capacitor between V+ and the board ground, and a second capacitor between ground and V−. Even with the LMV861 and LMV862 inherent hardening against EMI, it is still recommended to keep the input traces short and as far as possible from RF sources. Then the RF signals entering the chip are as low as possible, and the remaining EMI can be, almost, completely eliminated in the chip by the EMI reducing features of the LMV861 and LMV862. LOAD CELL SENSOR APPLICATION The LMV861 and LMV862 can be used for weight measuring system applications which use a load cell sensor. Examples of such systems are: bathroom weight scales, industrial weight scales and weight measurement devices on moving equipment such as forklift trucks. The following example describes a typical load cell sensor application that can be used as a starting point for many different types of sensors and applications. Applications in environments where EMI may appear would especially benefit from the EMIRR performance of the LMV861 and LMV862. Load Cell Characteristics The load cell used in this example is a Wheatstone bridge. The value of the resistors in the bridge changes when pressure is applied to the sensor. This change of the resistor values will result in a differential output voltage depending on the sensitivity of the sensor, the used supply voltage and the applied pressure. The difference between the output at full scale pressure and the output at zero pressure is defined as the span of the load cell. A typical value for the span is 10 mV/V. The circuit configuration should be chosen such that loading of the sensor is prevented. Loading of the resistor bridge due to the circuit following the sensor, could result in incorrect output voltages of the sensor. Load Cell Example Figure 8 shows a typical schematic for a load cell application. It uses a single supply and has an adjustment for both positive and negative offset of the load cell. An ADC converts the amplified signal to a digital signal. The op amps A1 and A2 are configured as buffers, and are connected at both the positive and the negative output of the load cell. This is to prevent the loading of the resistor bridge in the sensor by the resistors configuring the differential op amp circuit (op amp A4). The buffers also prevent the resistors of the sensor from affecting the gain of the following gain stage. The third buffer (A3) is used to create a reference voltage, to correct for the offset in the system. Given the differential output voltage VS of the load cell, the output signal of this op amp configuration, VOUT, equals: To align the pressure range with the full range of an ADC the correct gain needs to be set. To calculate the correct gain, the power supply voltage and the span of the load cell are needed. For this example a power supply of 5V is used and the span of the sensor, in this case a 125 kg sensor, is 100 mV. With the configuration as shown in Figure 8, this signal is covering almost the full input range of the ADC. With no weight on the load cell, the output of the sensor and the op amp A4 will be close to 0V. With the full weight on the load cell, the output of the sensor is 100 mV, and will be amplified with the gain from the configuration. In the case of the configuration of Figure 8 the gain is R3 / R1 = 51 kΩ / 100Ω = 50. This will result in a maximum output of 100 mV x 50 = 5V, which covers the full range of the ADC. For further processing the digital signal can be processed by a microprocessor following the ADC, this can be used to display or log the weight on the load cell. To get a resolution of 0.5 kg, the LSB of the ADC should be smaller then 0.5 kg / 125 kg = 1/1000. A 12-bit ADC would be sufficient as this gives 4096 steps. A 12-bit ADC such as the two channel 12bit ADC122S021 can be used for this application. 30024069 FIGURE 8. Load Cell Application www.national.com 16 LMV861 Single/ LMV862 Dual IR PHOTODIODE APPLICATION The LMV861 and LMV862 are also very good choices to be used in photodiode applications, such as IR communication, monitoring, etc. The large bandwidth of the LMV861 and LM862 makes it possible to create high speed detection. This, together with the low noise, makes the LMV861 and LMV862 ideal for medical applications such as fetal monitors and bed side monitors. Another application where the LMV861 and LMV862 would fit perfectly is a bill validator, an instrument to detect counterfeit bank notes. The following example describes an application that can be used for different types of photodiode sensors and applications. IR Photodiode Example The circuit shown in Figure 10 is a typical configuration for the readout of a photodiode. The response of a photodiode to incoming light is a variation in the diode current. In many applications a voltage is required, i.e. when connecting to an ADC. Therefore the first step is to convert the diode signal current into a voltage by an I-V converter. In Figure 10 the left op amp is configured as an I-V converter, with a gain set by R1. Some types of photodiodes can have a large capacitance. This could potentially lead to oscillation. The addition of resistor R2 isolates the photodiode capacitance from the feedback loop, thereby preventing the loop from oscillating. The capacitor in between the two op amp configurations, blocks the DC component, thus removing the DC offset of the first op amp circuit, and the offset created by the ambient light entering the photodiode. The second op amp amplifies the signal to levels that can be converted to a digital signal by an ADC. To prevent floating of the input of the second op amp, resistor R5 is added. By allowing the input bias current of a few pA to flow through this resistor a stable input is ensured. In Figure 9 a sensed and amplified signal is shown from an IR source, in this case an IR remote control. The data from the ADC can then be used by a DSP or microprocessor for further processing. 30024068 FIGURE 9. IR Photodiode Signal 30024071 FIGURE 10. IR Photodiode Application 17 www.national.com LMV861 Single/ LMV862 Dual Physical Dimensions inches (millimeters) unless otherwise noted 5-Pin SC70 NS Package Number MAA05A 8-Pin MSOP NS Package Number MUA08A www.national.com 18 LMV861 Single/ LMV862 Dual Notes 19 www.national.com LMV861 Single/ LMV862 Dual 30 MHz Low Power CMOS, EMI Hardened Operational Amplifiers Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers Audio Clock Conditioners Data Converters Displays Ethernet Interface LVDS Power Management Switching Regulators LDOs LED Lighting PowerWise Serial Digital Interface (SDI) Temperature Sensors Wireless (PLL/VCO) www.national.com/amplifiers www.national.com/audio www.national.com/timing www.national.com/adc www.national.com/displays www.national.com/ethernet www.national.com/interface www.national.com/lvds www.national.com/power www.national.com/switchers www.national.com/ldo www.national.com/led www.national.com/powerwise www.national.com/sdi www.national.com/tempsensors www.national.com/wireless WEBENCH Analog University App Notes Distributors Green Compliance Packaging Design Support www.national.com/webench www.national.com/AU www.national.com/appnotes www.national.com/contacts www.national.com/quality/green www.national.com/packaging www.national.com/quality www.national.com/refdesigns www.national.com/feedback Quality and Reliability Reference Designs Feedback THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS. EXCEPT AS PROVIDED IN NATIONAL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NATIONAL ASSUMES NO LIABILITY WHATSOEVER, AND NATIONAL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE AND/OR USE OF NATIONAL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. Copyright© 2008 National Semiconductor Corporation For the most current product information visit us at www.national.com National Semiconductor Americas Technical Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 www.national.com National Semiconductor Europe Technical Support Center Email: europe.support@nsc.com German Tel: +49 (0) 180 5010 771 English Tel: +44 (0) 870 850 4288 National Semiconductor Asia Pacific Technical Support Center Email: ap.support@nsc.com National Semiconductor Japan Technical Support Center Email: jpn.feedback@nsc.com