LP2985IBPX-1.8

LP2985LV Micropower 150 mA Low-Noise Low-Dropout Regulator in SOT-23 and micro SMD packages for Applications with Output Voltages ≤ 2.3V June 2004 LP2985LV Micropower 150 mA Low-Noise Low-Dropout Regulator in SOT-23 and micro SMD packages for Applications with Output Voltages ≤ 2.3V Designed for Use with Very Low ESR Output Capacitors General Description The LP2985LV is a 150 mA, fixed-output voltage regulator designed to providehigh performance and low noise in applications requiring output voltages < 2.3V. Using an optimized VIP™ (Vertically Integrated PNP) process, the LP2985LV delivers unequalled performance in all specifications critical to battery-powered designs: Ground Pin Current: Typically 825 µA @ 150 mA load, and 75 µA @ 1 mA load. Enhanced Stability: The LP2985LV is stable with output capacitor ESR as low as 5 mΩ, which allows the use of ceramic capacitors on the output. Sleep Mode: Less than 1 µA quiescent current when ON/ OFF pin is pulled low. Smallest Possible Size: micro SMD package uses absolute minimum board space. Precision Output: 1% tolerance output voltages available (A grade). Low Noise: By adding a 10 nF bypass capacitor, output noise can be reduced to 30 µV (typical). Features n n n n n n n n n n n n n Guaranteed 150 mA output current Smallest possible size (micro SMD) Requires minimum external components Stable with low-ESR output capacitor < 1 µA quiescent current when shut down Low ground pin current at all loads Output voltage accuracy 1% (A Grade) High peak current capability Wide supply voltage range (16V max) Low ZOUT: 0.3Ω typical (10 Hz to 1 MHz) Overtemperature/overcurrent protection −40˚C to +125˚C junction temperature range Custom voltages available Applications n n n n Cellular Phone Palmtop/Laptop Computer Personal Digital Assistant (PDA) Camcorder, Personal Stereo, Camera Block Diagram 10129501 VIP™ is a trademark of National Semiconductor Corporation. © 2005 National Semiconductor Corporation DS101295 www.national.com LP2985LV Basic Application Circuit 10129502 *ON/OFF input must be actively terminated. Tie to VIN if this function is not to be used. **Minimum capacitance is shown to ensure stability (may be increased without limit). Ceramic capacitor required for output (see Application Hints). ***Reduces output noise (may be omitted if application is not noise critical). Use ceramic or film type with very low leakage current (see Application Hints). Connection Diagrams 5-Lead Small Outline Package (M5) micro SMD, 5 Bump Package (BPA05 & BLA05) 10129503 Top View See NS Package Number MF05A For ordering information see Table 1 10129523 Note: The actual physical placement of the package marking will vary from part to part. Package marking contains date code and lot traceability information, and will vary considerably. Package marking does not correlate to device type. Top View See NS Package Number BPA05 & BLA05 Pin Descrption Name SOT-23 VIN GND ON/OFF BYPASS VOUT 1 2 3 4 5 Pin Number micro SMD C3 A1 A3 B2 C1 Input Voltage Common Ground (device substrate) Logic high enable input Bypass capacitor for low noise operation Regulated output voltage Function www.national.com 2 LP2985LV Ordering Information TABLE 1. Package Marking and Ordering Information Output Voltage (V) Grade Order Information Package Marking LF7A LF7A LF7B LF7B LCHA LCHA LCHB LCHB LAYA LAYA LAYB LAYB LCDA LCDA LCDB LCDB Supplied as: 5-Lead Small Outline Package (M5) 1.35 1.35 1.35 1.35 1.5 1.5 1.5 1.5 1.8 1.8 1.8 1.8 2.0 2.0 2.0 2.0 1.5 1.5 1.5 1.5 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.5 1.5 1.5 1.5 1.8 1.8 1.8 1.8 A A STD STD A A STD STD A A STD STD A A STD STD A A STD STD A A STD STD A A STD STD A A STD STD A A STD STD LP2985AIM5X-135 LP2985AIM5-135 LP2985IM5X-135 LP2985IM5-135 LP2985AIM5X-1.5 LP2985AIM5-1.5 LP2985IM5X-1.5 LP2985IM5-1.5 LP2985AIM5X-1.8 LP2985AIM5-1.8 LP2985IM5X-1.8 LP2985IM5-1.8 LP2985AIM5X-2.0 LP2985AIM5-2.0 LP2985IM5X-2.0 LP2985IM5-2.0 LP2985AIBP-1.5 LP2985AIBPX-1.5 LP2985IBP-1.5 LP2985IBPX-1.5 LP2985AIBP-1.8 LP2985AIBPX-1.8 LP2985IBP-1.8 LP2985IBPX-1.8 LP2985AIBL-1.8 LP2985AIBLX-1.8 LP2985IBL-1.8 LP2985IBLX-1.8 LP2985AITP-1.5 LP2985AITPX-1.5 LP2985ITP-1.5 LP2985ITPX-1.5 LP2985AITP-1.8 LP2985AITPX-1.8 LP2985ITP-1.8 LP2985ITPX-1.8 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel micro SMD, 5 Bump Package (BPA05 - 170 µm ball) micro SMD, 5 Bump Package (BLA05 - 300 µm ball) micro SMD, 5 Bump Package (TPA05 - 170 µm ball) 3 www.national.com LP2985LV Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Storage Temperature Range Operating Junction Temperature Range Lead Temp. (Soldering, 5 sec.) ESD Rating (Note 2) Power Dissipation (Note 3) −65˚C to +150˚C −40˚C to +125˚C 260˚C 2 kV Internally Limited Input Supply Voltage (Survival) Input Supply Voltage (Operating) Shutdown Input Voltage (Survival) Output Voltage (Survival, (Note 4)) IOUT (Survival) Input-Output Voltage (Survival, (Note 5)) −0.3V to +16V 2.2V to +16V −0.3V to +16V −0.3V to +9V Short Circuit Protected −0.3V to +16V Electrical Characteristics (Note 10) Limits in standard typeface are for TJ = 25˚C. and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 1 mA, CIN = 1 µF, COUT = 4.7 µF, VON/OFF = 2V. LP2985AI-X.X Symbol ∆VO Parameter Output Voltage Tolerance Conditions IL = 1 mA 1 mA ≤ IL ≤ 50 mA 1 mA ≤ IL ≤ 150 mA Output Voltage Line Regulation IGND Ground Pin Current IL = 0 IL = 1 mA IL = 10 mA IL = 50 mA IL = 150 mA VON/OFF < 0.3V VON/OFF < 0.15V VIN(min) Minimum Input Voltage Required To maintain Output Regulation (Note 9) IL = 50mA VIN - VOUT Dropout Voltage (Note 9) ON/OFF Input Voltage (Note 7) ON/OFF Input Current Output Noise Voltage (RMS) IL = 150mA High = O/P ON Low = O/P OFF VON/OFF = 0 VON/OFF = 5V en BW = 300 Hz to 50 kHz, COUT = 10 µF CBYPASS = 10 nF VOUT = 1.8V 30 µV 65 75 120 300 825 0.01 0.05 2.05 VO(NOM)+1V ≤ VIN ≤ 16V 0.007 Typ (Note 6) Min −1.0 −1.5 −2.5 −2.5 −3.5 Max 1.0 1.5 2.5 2.5 3.5 0.014 0.032 95 125 110 170 220 400 500 900 1200 2000 0.8 2 2.20 LP2985I-X.X (Note 6) Min −1.5 −2.5 −3.5 −3.0 −4.0 Max 1.5 2.5 3.5 3.0 4.0 0.014 0.032 95 125 110 170 220 400 500 900 1200 2000 0.8 2 2.20 V µA %/V %VNOM Units 120 280 1.4 0.55 0.01 5 1.6 150 250 350 600 1.6 0.15 −2 15 150 250 350 600 0.15 −2 15 mV VON/OFF ION/OFF V µA www.national.com 4 LP2985LV Electrical Characteristics (Note 10) (Continued) Limits in standard typeface are for TJ = 25˚C. and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 1 mA, CIN = 1 µF, COUT = 4.7 µF, VON/OFF = 2V. LP2985AI-X.X Symbol Parameter Ripple Rejection Conditions f = 1 kHz, CBYPASS = 10 nF COUT = 10 µF 45 dB Typ (Note 6) Min Max LP2985I-X.X (Note 6) Min Max Units IO(SC) IO(PK) Short Circuit Current Peak Output Current RL = 0 (Steady State) (Note 8) VOUT ≥ Vo(NOM) −5% 400 350 mA mA Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the device outside of its rated operating conditions. Note 2: The ESD rating of pins 3 and 4 for the SOT-23 package, or pins 5 and 2 for the micro SMD package, is 1 kV. Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJ-A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperture is calculated using: Where the value of θJ-A for the SOT-23 package is 220˚C/W in a typical PC board mounting. Exceeding the maximum allowable dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Note 4: If used in a dual-supply system where the regulator load is returned to a negative supply, the LP2985LV output must be diode-clamped to ground. Note 5: The output PNP structure contains a diode between the VIN to VOUT terminals that is normally reverse-biased. Reversing the polarity from VIN to VOUT will turn on this diode, and possibly damage the device (See Application Hints). Note 6: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL). Note 7: The ON/OFF input must be properly driven to prevent possible misoperation. For details, refer to Application Hints. Note 8: The LP2985LV has foldback current limiting which allows a high peak current when VOUT > 0.5V, and then reduces the maximum output current as VOUT is forced to ground (see Typical Performance Characteristics curves). Note 9: VIN must be the greater of 2.2V or VOUT(nom) + Dropout Voltage to maintain output regulation. Dropout Voltage is defined as the input to output differential at which the output voltage drops 2% below ther value measured with a 1V differential. Note 10: Exposing the micro SMD device to direct sunlight will cause misoperation. See Application Hints for additional information. 5 www.national.com LP2985LV Typical Performance Characteristics Unless otherwise specified: CIN = 1µF, COUT = 4.7µF, VIN = VOUT(NOM) +1, VOUT = 1.8V, TA = 25˚C, ON/OFF pin is tied to VIN VOUT vs Temperature Short-Circuit Current 10129516 10129507 Short-Circuit Current Short-Circuit Current vs Output Voltage 10129517 10129518 Ripple Rejection COUT = 4.7µF, Bypass = 10nF Ripple Rejection COUT = 4.7µF, No Bypass 10129525 10129526 www.national.com 6 LP2985LV Typical Performance Characteristics Unless otherwise specified: CIN = 1µF, COUT = 4.7µF, VIN = VOUT(NOM) +1, VOUT = 1.8V, TA = 25˚C, ON/OFF pin is tied to VIN (Continued) Output Impedance vs Frequency Output Impedance vs Frequency 10129527 10129532 Noise Density Noise Density 10129533 10129537 Ground Pin vs Load Current Minimum Input Voltage vs Temperature 10129513 10129509 7 www.national.com LP2985LV Typical Performance Characteristics Unless otherwise specified: CIN = 1µF, COUT = 4.7µF, VIN = VOUT(NOM) +1, VOUT = 1.8V, TA = 25˚C, ON/OFF pin is tied to VIN (Continued) Minimum Input Voltage vs Temperature Input Current vs VIN 10129541 10129510 Input Current vs VIN Input Current vs VIN 10129511 10129512 Ground Pin Current vs Temperature Instantaneous Short Circuit Current 10129514 10129515 www.national.com 8 LP2985LV Typical Performance Characteristics Unless otherwise specified: CIN = 1µF, COUT = 4.7µF, VIN = VOUT(NOM) +1, VOUT = 1.8V, TA = 25˚C, ON/OFF pin is tied to VIN (Continued) Output Characteristics Load Transient 10129542 10129508 Load Transient Load Transient 10129543 10129544 Line Transient Line Transient 10129545 10129546 9 www.national.com LP2985LV Typical Performance Characteristics Unless otherwise specified: CIN = 1µF, COUT = 4.7µF, VIN = VOUT(NOM) +1, VOUT = 1.8V, TA = 25˚C, ON/OFF pin is tied to VIN (Continued) Line Transient Line Transient 10129547 10129548 Turn-On Time Turn-On Time 10129549 10129552 Turn-On Time Turn-On Time 10129550 10129551 www.national.com 10 LP2985LV Application Hints EXTERNAL CAPACITORS Like any low-dropout regulator, the LP2985LV requires external capacitors for regulator stability. These capacitors must be correctly selected for good performance. Input Capacitor An input capacitor whose capacitance is ≥ 1 µF is required between the LP2985LV input and ground (the amount of capacitance may be increased without limit). This capacitor must be located a distance of not more than 1 cm from the input pin and returned to a clean analog ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input. Important: Tantalum capacitors can suffer catastrophic failure due to surge current when connected to a lowimpedance source of power (like a battery or very large capacitor). If a Tantalum capacitor is used at the input, it must be guaranteed by the manufacturer to have a surge current rating sufficient for the application. There are no requirements for ESR on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will be ≥ 1 µF over the entire operating temperature range. Output Capacitor The LP2985LV is designed specifically to work with ceramic output capacitors, utilizing circuitry which allows the regulator to be stable across the entire range of output current with an output capacitor whose ESR is as low as 5 mΩ. It may also be possible to use Tantalum or film capacitors at the output, but these are not as attractive for reasons of size and cost (see next sectionCapacitor Characteristics). The output capacitor must meet the requirement for minimum amount of capacitance and also have an ESR (equivalent series resistance) value which is within the stable range. Curves are provided which show the stable ESR range as a function of load current (see ESR graphs Figure 1 and Figure 2). 10129520 FIGURE 2. LP2985LV 4.7µF Stable ESR Range Important: The output capacitor must maintain its ESR within the stable region over the full operating temperature range of the application to assure stability. The LP2985LV requires a minimum of 2.2 µF on the output (output capacitor size can be increased without limit). It is important to remember that capacitor tolerance and variation with temperature must be taken into consideration when selecting an output capacitor so that the minimum required amount of output capacitance is provided over the full operating temperature range. It should be noted that ceramic capacitors can exhibit large changes in capacitance with temperature (see next section, Capacitor Characteristics). The output capacitor must be located not more than 1 cm from the output pin and returned to a clean analog ground. Noise Bypass Capacitor Connecting a 10 nF capacitor to the Bypass pin significantly reduces noise on the regulator output. It should be noted that the capacitor is connected directly to a high-impedance circuit in the bandgap reference. Because this circuit has only a few microamperes flowing in it, any significant loading on this node will cause a change in the regulated output voltage. For this reason, DC leakage current through the noise bypass capacitor must never exceed 100 nA, and should be kept as low as possible for best output voltage accuracy. The types of capacitors best suited for the noise bypass capacitor are ceramic and film. High-quality ceramic capacitors with either NPO or COG dielectric typically have very low leakage. 10 nF polypropolene and polycarbonate film capacitors are available in small surface-mount packages and typically have extremely low leakage current. CAPACITOR CHARACTERISTICS The LP2985LV was designed to work with ceramic capacitors on the output to take advantage of the benefits they offer: for capacitance values in the 2.2 µF to 4.7 µF range, ceramics are the least expensive and also have the lowest ESR values (which makes them best for eliminating highfrequency noise). The ESR of a typical 2.2 µF ceramic capacitor is in the range of 10 mΩ to 20 mΩ, which easily meets the ESR limits required for stability by the LP2985LV. 11 www.national.com 10129519 FIGURE 1. LP2985LV 2.2µF Stable ESR Range LP2985LV Application Hints (Continued) One disadvantage of ceramic capacitors is that their capacitance can vary with temperature. Most large value ceramic capacitors (≥ 2.2 µF) are manufactured with the Z5U or Y5V temperature characteristic, which results in the capacitance dropping by more than 50% as the temperature goes from 25˚C to 85˚C. This could cause problems if a 2.2 µF capacitor were used on the output since it will drop down to approximately 1 µF at high ambient temperatures (which could cause the LP2985LV to oscillate). If Z5U or Y5V capacitors are used on the output, a minimum capacitance value of 4.7 µF must be observed. A better choice for temperature coefficient in ceramic capacitors is X7R, which holds the capacitance within ± 15%. Unfortunately, the larger values of capacitance are not offered by all manufacturers in the X7R dielectric. Tantalum Tantalum capacitors are less desirable than ceramics for use as output capacitors because they are more expensive when comparing equivalent capacitance and voltage ratings in the 1 µF to 4.7 µF range. Another important consideration is that Tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a Tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic capacitor with the same ESR value. It should also be noted that the ESR of a typical Tantalum will increase about 2:1 as the temperature goes from 25˚C down to −40˚C, so some guard band must be allowed. On/off Input Operation The LP2985LV is shut off by driving the ON/OFF input low, and turned on by pulling it high. If this feature is not to be used, the ON/OFF input should be tied to VIN to keep the regulator output on at all times. To assure proper operation, the signal source used to drive the ON/OFF input must be able to swing above and below the specified turn-on/turn-off voltage thresholds listed in the Electrical Characteristics section under VON/OFF. To prevent mis-operation, the turn-on (and turn-off) voltage signals applied to the ON/OFF input must have a slew rate which is ≥ 40 mV/µs. Caution: the regulator output voltage can not be guaranteed if a slow-moving AC (or DC) signal is applied that is in the range between the specified turn-on and turn-off voltages listed under the electrical specification VON/OFF (see Electrical Characteristics). REVERSE INPUT-OUTPUT VOLTAGE The PNP power transistor used as the pass element in the LP2985LV has an inherent diode connected between the regulator output and input. During normal operation (where the input voltage is higher than the output) this diode is reverse-biased. However, if the output is pulled above the input, this diode will turn ON and current will flow into the regulator output. In such cases, a parasitic SCR can latch which will allow a high current to flow into VIN (and out the ground pin), which can damage the part. In any application where the output may be pulled above the input, an external Schottky diode must be connected from VIN to VOUT (cathode on VIN, anode on VOUT), to limit the reverse voltage across the LP2985LV to 0.3V (see Absolute Maximum Ratings). MICRO SMD MOUNTING The micro SMD package requires specific mounting techniques which are detailed in National Semiconductor Application Note # 1112. Referring to the section Surface Mount Technology (SMT) Assembly Considerations, it should be noted that the pad style which must be used with the 5-pin package is the NSMD (non-solder mask defined) type. For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the micro SMD device. MICRO SMD LIGHT SENSITIVITY Exposing the micro SMD device to direct sunlight will cause misoperation of the device. Light sources such as Halogen lamps can also affect electrical performance if brought near to the device. The wavelenghts which have the most detrimental effect are reds and infra-reds, which means that the fluorescent lighting used inside most buildings has very little effect on performance. A micro SMD test board was brought to within 1 cm of a fluorescent desk lamp and the effect on the regulated output voltage was negligible, showing a deviation of less than 0.1% from nominal. www.national.com 12 LP2985LV Physical Dimensions inches (millimeters) unless otherwise noted 5-Lead Small Outline Package (M5) NS Package Number MF05A For Order Numbers, refer to Table 1 in the “Ordering Information” section of this document. 13 www.national.com LP2985LV Physical Dimensions inches (millimeters) unless otherwise noted (Continued) NOTES: UNLESS OTHERWISE SPECIFIED 1. EPOXY COATING 2. 63Sn/37Pb EUTECTIC BUMP 3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD. 4. PIN 1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED COUNTER CLOCKWISE. 5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS PACKAGE HEIGHT. 6.NO JEDEC REGISTRATION AS OF AUG.1999. micro SMD, 5 Bump, Package (BPA05 - 170 µm ball) NS Package Number BPA05A For Order Numbers, refer to Table 1 “Ordering Information” section of this document. The dimensions for X1, X2 and X3 are as given: X1 = 0.930 +/− 0.030mm X2 = 1.107 +/− 0.030mm X3 = 0.945 +/− 0.100mm www.national.com 14 LP2985LV Physical Dimensions inches (millimeters) unless otherwise noted (Continued) NOTES: UNLESS OTHERWISE SPECIFIED 1. EPOXY COATING 2. 63Sn/37Pb EUTECTIC BUMP 3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD. 4. PIN 1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED COUNTER CLOCKWISE. 5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS PACKAGE HEIGHT. 6.NO JEDEC REGISTRATION AS OF AUG.1999. micro SMD, 5 Bump, Package (BLA05 - 300 µm ball) NS Package Number BLA05A For Order Numbers, refer to Table 1 “Ordering Information” section of this document. The dimensions for X1, X2 and X3 are as given: X1 = 1.057 +/− 0.030mm X2 = 1.412 +/− 0.030mm X3 = 0.945 +/− 0.100mm 15 www.national.com LP2985LV Physical Dimensions inches (millimeters) unless otherwise noted (Continued) NOTES: UNLESS OTHERWISE SPECIFIED 1. EPOXY COATING 2. 63Sn/37Pb EUTECTIC BUMP 3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD. 4. PIN 1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED COUNTER CLOCKWISE. 5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS PACKAGE HEIGHT. 6.NO JEDEC REGISTRATION AS OF AUG.1999. micro SMD, 5 Bump, Package (TPA05 - 170 µm ball) NS Package Number TPA05 For Order Numbers, refer to Table 1 “Ordering Information” section of this document. The dimensions for X1, X2 and X3 are as given: X1 = 0.930 +/− 0.030mm X2 = 1.107 +/− 0.030mm X3 = 0.500 +/− 0.075mm www.national.com 16 LP2985LV Micropower 150 mA Low-Noise Low-Dropout Regulator in SOT-23 and micro SMD packages for Applications with Output Voltages ≤ 2.3V Notes National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. 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