LP2989ILD-1.8

LP2989LV Micropower 500 mA Low Noise Low Dropout Regulator for Output Voltages < 2V Designed for Use with Very Low ESR Output Capacitors February 2005 LP2989LV Micropower 500 mA Low Noise Low Dropout Regulator for Applications with Output Voltages < 2V Designed for Use with Very Low ESR Output Capacitors General Description The LP2989LV is a 500 mA fixed-output voltage regulator designed to provide high performance and low noise in applications requiring output voltages < 2V. Output noise can be reduced to 18µV (typical) by connecting an external 10 nF capacitor to the bypass pin. Using an optimized VIP™ (Vertically Integrated PNP) process, the LP2989LV delivers superior performance: Ground Pin Current: Typically 3 mA @ 500 mA load, and 110 µA @ 100 µA load. Sleep Mode: The LP2989LV draws less than 0.8 µA quiescent current when shutdown pin is pulled low. Error Flag: The built-in error flag goes low when the output drops approximately 5% below nominal. Precision Output: Guaranteed output voltage accuracy is 0.75% (“A” grade) and 1.25% (standard grade) at room temperature. For output voltages ≥ 2V, see LP2989 datasheet. Features n n n n n n n n n n n Ultra low dropout voltage Guaranteed 500 mA continuous output current Very low output noise with external capacitor SO-8, Mini SO-8, 8 Lead LLP surface mount packages < 0.8 µA quiescent current when shutdown Low ground pin current at all loads 0.75% output voltage accuracy (“A” grade) High peak current capability (800 mA typical) Wide supply voltage range (16V max) Overtemperature/overcurrent protection −40˚C to +125˚C junction temperature range Applications n n n n Notebook/Desktop PC PDA/Palmtop Computer Wireless Communication Terminals SMPS Post-Regulator Block Diagram 10135701 VIP™ is a trademark of National Semiconductor Corporation. © 2005 National Semiconductor Corporation DS101357 www.national.com LP2989LV Connection Diagrams Surface Mount Packages: 8 Lead LLP Surface Mount Package 10135702 SO-8/Mini SO-8 Package See NS Package Drawing Numbers M08A/MUA08A 10135750 Top View See NS Package Number LDC08A Ordering Information TABLE 1. Package Marking and Ordering Information Output Voltage 8 Lead LLP 1.8 1.8 1.8 1.8 SO-8 (M) 1.8 1.8 1.8 1.8 8 Lead MSOP (MM) 1.8 1.8 1.8 1.8 A A STD STD LP2989AIMMX-1.8 LP2989AIMM-1.8 LP2989IMMX-1.8 LP2989IMM-1.8 LA5A LA5A LA5B LA5B 3500 Units on Tape and Reel 1000 Units on Tape and Reel 3500 Units on Tape and Reel 1000 Units on Tape and Reel A A STD STD LP2989AIMX-1.8 LP2989AIM-1.8 LP2989IMX-1.8 LP298IM-1.8 2989AIM1.8 2989AIM1.8 2989IM1.8 2989IM1.8 2500 Units on Tape and Reel Shipped in Anti-Static Rails 2500 Units on Tape and Reel Shipped in Anti-Static Rails A A STD STD LP2989AILD-1.8 LP2989AILDX-1.8 LP2989ILD-1.8 LP2989ILDX-1.8 L01EA L01EA L01EAB L01EAB 1000 Units on Tape and Reel 4500 Units on Tape and Reel 1000 Units on Tape and Reel 4500 Units on Tape and Reel Grade Order Information Package Marking Supplied as: For output voltages ≥ 2V, see LP2989 datasheet. www.national.com 2 LP2989LV Basic Application Circuit 10135703 *Capacitance values shown are minimum required to assure stability, but may be increased without limit. Larger output capacitor provides improved dynamic response. **Shutdown must be actively terminated (see App. Hints). Tie to INPUT (Pin4) if not used. 3 www.national.com LP2989LV Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Storage Temperature Range Operating Junction Range Lead Temperature seconds) ESD Rating (Note 2) Power Dissipation (Note 3) Temperature −40˚C to +125˚C (Soldering, 5 260˚C 2 kV Internally Limited −65˚C to +150˚C Input Supply Voltage Input Supply Voltage (Operating) Sense Pin Output Voltage (Note 4) IOUT (Survival) Input-Output Voltage (Note 5) (Survival) −0.3V to +16V 2.1V to +16V −0.3V to +6V (Survival) −0.3V to +16V Short Circuit Protected (Survival) −0.3V to +16V Electrical Characteristics Limits in standard typeface are for TJ = 25˚C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 1 mA, COUT = 10 µF, CIN = 2.2 µF, VS/D = 2V. Symbol VO Parameter Output Voltage Tolerance Conditions Typical LP2989AI-X.X (Note 6) Min −0.75 1 mA < IL < 500 mA VO(NOM) + 1V ≤ VIN ≤ 16V 1 mA < IL < 500 mA VO(NOM) + 1V ≤ VIN ≤ 16V −25˚C ≤ TJ ≤ 125˚C Output Voltage Line Regulation Load Regulation VO(NOM) + 1V ≤ VIN ≤ 16V 0.005 1 mA < IL < 500 mA 0.4 −1.5 −4.0 −3.5 Max 0.75 1.5 2.5 2.5 LP2989I-X.X (Note 6) Min −1.25 −2.5 −5.0 −4.5 Max 1.25 2.5 3.5 3.5 %VNOM Units 0.014 0.032 0.014 0.032 %/V %VNOM VIN (min) Minimum Input Voltage Required To Maintain Output Regulation VOUT = 1.8 IL ≤ 50 mA VOUT = 1.8 IL = 250 mA VOUT = 1.8 IL = 500 mA IL = 100 µA IL = 200 mA IL = 500 mA VS/D < 0.18V VS/D < 0.4V 1.96 1.98 2.11 175 200 2 3.5 6 9 2 0.8 600 600 mA 175 200 2 3.5 6 9 2 0.8 µA mA V IGND Ground Pin Current 110 1 3 0.5 0.05 800 1000 18 µA IO(PK) IO(MAX) en Peak Output Current Short Circuit Current Output Noise Voltage (RMS) Ripple Rejection VOUT ≥ VO(NOM) − 5% RL = 0 (Steady State) (Note 8) BW = 100 Hz to 100 kHz, CBYPASS = .01 µF f = 1 kHz µV(RMS) 60 Output Voltage (Note 7) Temperature Coefficient dB 20 ppm/˚C www.national.com 4 LP2989LV Electrical Characteristics (Continued) Limits in standard typeface are for TJ = 25˚C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 1 mA, COUT = 10 µF, CIN = 2.2 µF, VS/D = 2V. Parameter Conditions Typical LP2989AI-X.X (Note 6) Min Max LP2989I-X.X (Note 6) Min 1.6 0.18 −1 15 1 2 220 350 −6.0 −8.3 −8.9 −13.0 −3.5 −2.5 −4.9 −3.0 −6.0 −8.3 −8.9 −13.0 0.18 −1 15 1 2 220 350 −3.5 −2.5 −4.9 −3.0 %VOUT V Max Units Symbol SHUTDOWN INPUT VS/D S/D Input Voltage VH = O/P ON VL = O/P OFF IIN ≤ 2 µA IS/D S/D Input Current VS/D = 0 VS/D = 5V ERROR COMPARATOR IOH VOL VTHR (MAX) VTHR (MIN) HYST Output “HIGH” Leakage Output “LOW” Voltage Upper Threshold Voltage Lower Threshold Voltage Hysteresis VOH = 16V VOUT = VO(NOM) − 0.5V IO(COMP) = 150 µA 0.001 150 −4.8 −6.6 2.0 µA mV 1.4 0.50 0.001 5 1.6 µA Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the device outside of its rated operating conditions. Note 2: ESD testing was performed using Human Body Model, a 100 pF capacitor discharged through a 1.5 kΩ resistor. Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJ−A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using: The value of θJ−A for the SO-8 (M) package is 160˚C/W and the mini SO-8 (MM) package is 200˚C/W. The value θJ−A for the LLP (LD) package is specifically dependent on PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance and power dissipation for the LLP package, refer to Application Note AN-1187.Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Note 4: If used in a dual-supply system where the regulator load is returned to a negative supply, the LP2989LV output must be diode-clamped to ground. Note 5: The output PNP structure contains a diode between the VIN and VOUT terminals that is normally reverse-biased. Forcing the output above the input will turn on this diode and may induce a latch-up mode which can damage the part (see Application Hints). Note 6: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL). Note 7: Temperature coefficient is defined as the maximum (worst-case) change divided by the total temperature range. Note 8: See Typical Performance Characteristics curves. 5 www.national.com LP2989LV Typical Performance Characteristics Unless otherwise specified: TA = 25˚C, COUT = 10 µF, CIN = 2.2 µF, S/D is tied to VIN, VIN = VO(NOM) + 1V, IL = 1 mA, VOUT = 1.8V. IGND vs Shutdown IGND vs Shutdown 10135707 10135708 IGND vs Shutdown IGND vs Shutdown 10135709 10135710 Ground Pin Current vs Load Current GND Pin Current vs Temperature and Load 10135722 10135723 www.national.com 6 LP2989LV Typical Performance Characteristics Unless otherwise specified: TA = 25˚C, COUT = 10 µF, CIN = 2.2 µF, S/D is tied to VIN, VIN = VO(NOM) + 1V, IL = 1 mA, VOUT = 1.8V. (Continued) Short Circuit Current vs Temperature Short Circuit Current 10135734 10135732 Short Circuit Current Minimum VIN vs Load Current 10135735 10135739 Typical Temperature vs VOUT (LP2989-1.8) 10135755 7 www.national.com LP2989LV Application Hints LLP Package Devices The LP2989LV is offered in the 8 lead LLP surface mount package to allow for increased power dissipation compared to the SO-8 and Mini SO-8. For details on thermal performance as well as mounting and soldering specifications, refer to Application Note AN-1187. For output voltages ≥ 2V, see LP2989 datasheet. EXTERNAL CAPACITORS Like any low-dropout regulator, the LP2989LV requires external capacitors for regulator stability.These capacitors must be correctly selected for good performance. INPUT CAPACITOR: An input capacitor whose capacitance is at least 2.2 µF is required between the LP2989LV input and ground (the amount of capacitance may be increased without limit). Characterization testing performed on the LP2989LV has shown that if the amount of actual input capacitance drops below about 1.5 µF, an unstable operating condition may result. Therefore, the next larger standard size (2.2 µF) is specified as the minimum required input capacitance. Capacitor tolerance and temperature variation must be considered when selecting a capacitor (see Capacitor Characteristics section) to assure the minimum requirement of 1.5 µF is met over all operating conditions. The input capacitor must be located at a distance of not more than 0.5" from the input pin and returned to a clean analog ground. Any good quality ceramic or tantalum may be used for this capacitor, assuming the minimum capacitance requirement is met. OUTPUT CAPACITOR: The LP2989LV requires a ceramic output capacitor whose size is at least 10 µF. The actual amount of capacitance on the output must never drop below about 7 µF or unstable operation may result. For this reason, capacitance tolerance and temperature characteristics must be considered when selecting an output capacitor The LP2989LV is designed specifically to work with ceramic output capacitors, utilizing circuitry which allows the regulator to be stable across the entire range of output current with an output capacitor whose ESR is as low as 4 mΩ. It may also be possible to use Tantalum or film capacitors at the output, but these are not as attractive for reasons of size and cost (see next section Capacitor Characteristics). The output capacitor must meet the requirement for minimum amount of capacitance and also have an ESR (equivalent series resistance) value which is within the stable range. Curves are provided which show the stable ESR range as a function of load current (see ESR graph below). 10135738 Stable Region For Output Capacitor ESR Important: The output capacitor must maintain its ESR within the stable region over the full operating temperature range of the application to assure stability. It is important to remember that capacitor tolerance and variation with temperature must be taken into consideration when selecting an output capacitor so that the minimum required amount of output capacitance is provided over the full operating temperature range. (See Capacitor Characteristics section). The output capacitor must be located not more than 0.5" from the output pin and returned to a clean analog ground. NOISE BYPASS CAPACITOR: Connecting a 10 nF capacitor to the Bypass pin significantly reduces noise on the regulator output. However, the capacitor is connected directly to a high-impedance circuit in the bandgap reference. Because this circuit has only a few microamperes flowing in it, any significant loading on this node will cause a change in the regulated output voltage. For this reason, DC leakage current through the noise bypass capacitor must never exceed 100 nA, and should be kept as low as possible for best output voltage accuracy. The types of capacitors best suited for the noise bypass capacitor are ceramic and film. High-quality ceramic capacitors with either NPO or COG dielectric typically have very low leakage. 10 nF polypropolene and polycarbonate film capacitors are available in small surface-mount packages and typically have extremely low leakage current. CAPACITOR CHARACTERISTICS CERAMIC: The LP2989LV was designed to work with ceramic capacitors on the output to take advantage of the benefits they offer: for capacitance values in the 10 µF range, ceramics are the least expensive and also have the lowest ESR values (which makes them best for eliminating high-frequency noise). The ESR of a typical 10 µF ceramic capacitor is in the range of 5 mΩ to 10 mΩ, which meets the ESR limits required for stability by the LP2989LV. One disadvantage of ceramic capacitors is that their capacitance can vary with temperature. Many large value ceramic capacitors (≥ 2.2 µF) are manufactured with the Z5U or Y5V temperature characteristic, which results in the capacitance dropping by more than 50% as the temperature goes from 25˚C to 85˚C. www.national.com 8 LP2989LV Application Hints (Continued) This could cause problems if a 10 µF Y5V capacitor were used on the output since it will drop down to approximately 5 µF at high ambient temperatures (which could cause the LP2989LV to oscillate). Another significant problem with Z5U and Y5V dielectric devices is that the capacitance drops severely with applied voltage. A typical Z5U or Y5V capacitor can lose 60% of its rated capacitance with half of the rated voltage applied to it. For these reasons, X7R and X5R type ceramic capacitors must be used on the input and output of the LP2989LV. TANTALUM: Tantalum output capacitors are not recommended for use with the LP2989LV because: Tantalum capacitors are less desirable than ceramics for use as output capacitors because they are typically more expensive when comparing equivalent capacitance and voltage ratings in the 1 µF to 10 µF range. Another important consideration is that Tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a Tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic capacitor with the same ESR value. Most 10 µF Tantalum capacitors have ESR values higher than the 0.5Ω maximum limit required to make the LP2989LV stable. It should also be noted that the ESR of a typical Tantalum will increase about 2:1 as the temperature goes from 25˚C down to −40˚C, so some guard band must be allowed. FILM: Polycarbonate and polypropelene film capacitors have excellent electrical performance: their ESR is the lowest of the three types listed, their capacitance is very stable with temperature, and DC leakage currrent is extremely low. One disadvantage is that film capacitors are larger in physical size than ceramic or tantalum which makes film a poor choice for either input or output capacitors. However, their low leakage makes them a good choice for the noise bypass capacitor. Since the required amount of capacitance is only .01 µF, small surface-mount film capacitors are avalable in this size. SHUTDOWN INPUT OPERATION The LP2989LV is shut off by driving the Shutdown input low, and turned on by pulling it high. If this feature is not to be used, the Shutdown input should be tied to VIN to keep the regulator output on at all times. To assure proper operation, the signal source used to drive the Shutdown input must be able to swing above and below the specified turn-on/turn-off voltage thresholds listed in the Electrical Characteristics section under VON/OFF. REVERSE INPUT-OUTPUT VOLTAGE The PNP power transistor used as the pass element in the LP2989LV has an inherent diode connected between the regulator output and input. During normal operation (where the input voltage is higher than the output) this diode is reverse-biased. However, if the output is pulled above the input, this diode will turn ON and current will flow into the regulator output. In such cases, a parasitic SCR can latch which will allow a high current to flow into VIN (and out the ground pin), which can damage the part. In any application where the output may be pulled above the input, an external Schottky diode must be connected from VIN to VOUT (cathode on VIN, anode on VOUT), to limit the reverse voltage across the LP2989LV to 0.3V (see Absolute Maximum Ratings). 9 www.national.com LP2989LV Physical Dimensions unless otherwise noted inches (millimeters) SO-8 Package Type M NS Package Number M08A mini SO-8 Package Type MM NS Package Number MUA08A www.national.com 10 LP2989LV Micropower 500 mA Low Noise Low Dropout Regulator for Output Voltages < 2V Designed for Use with Very Low ESR Output Capacitors Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8 Lead LLP Surface Mount PackagePackage NS Package Number LDC08A National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. 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