LP3470M5X-4.63

LP3470 Tiny Power On Reset Circuit September 2000 LP3470 Tiny Power On Reset Circuit General Description The LP3470 is a micropower CMOS voltage supervisory circuit designed to monitor power supplies in microprocessor (µP) and other digital systems. It provides maximum adjustability for power-on-reset (POR) and supervisory functions. It is available in the following six standard reset threshold voltage (VRTH) options: 2.63V, 2.93V, 3.08V, 3.65V, 4.00V, 4.38V, and 4.63V. If other voltage options between 2.4V and 5.0V are desired please contact your National Semiconductor representative. The LP3470 asserts a reset signal whenever the VCC supply voltage falls below a reset threshold. The reset time-out period is adjustable using an external capacitor. Reset remains asserted for an interval (programmed by an external capacitor) after VCC has risen above the threshold voltage. The device is available in the tiny SOT23-5 package. n Custom Reset Threshold Voltages: For other voltages between 2.4V and 5.0V contact your National Semiconductor representative n Very Low Quiescent Current (16 µA typical) n Guaranteed Reset valid down to VCC=0.5V Features n Tiny SOT23-5 Package n Open Drain Reset Output n Programmable Reset Timeout Period Using an External Capacitor n Immune to Short VCC Transients Applications n n n n Critical µP and µC Power Monitoring Intelligent Instruments Computers Portable/Battery-Powered Equipments Key Specifications n ± 1% Reset Threshold Accuracy Over Temperature n Standard Reset Threshold Voltages: 2.63V, 2.93V, 3.08V, 3.65V, 4.00V, 4.38V, and 4.63V Pin Configuration and Basic Operating Circuit Pin Configuration Basic Operating Circuit 10001602 Top View See NS Package Number MF05A 10001601 © 2004 National Semiconductor Corporation DS100016 www.national.com LP3470 Ordering Information Operating Temperature Range Order Number LP3470M5-2.63 LP3470M5X-2.63 LP3470M5-2.93 LP3470M5X-2.93 LP3470M5-3.08 LP3470M5X-3.08 −20˚C to +85˚C LP3470M5-3.65 LP3470M5X-3.65 LP3470M5-4.00 LP3470M5X-4.00 LP3470M5-4.38 LP3470M5X-4.38 LP3470M5-4.63 LP3470M5X-4.63 LP3470IM5-2.63 LP3470IM5X-2.63 LP3470IM5-2.93 LP3470IM5X-2.93 LP3470IM5-3.08 LP3470IM5X-3.08 −40˚C to +85˚C LP3470IM5-3.65 LP3470IM5X-3.65 LP3470IM5-4.00 LP3470IM5X-4.00 LP3470IM5-4.38 LP3470IM5X-4.38 LP3470IM5-4.63 LP3470IM5X-4.63 Nominal VRTH (V) 2.63 2.63 2.93 2.93 3.08 3.08 3.65 3.65 4.00 4.00 4.38 4.38 4.63 4.63 2.63 2.63 2.93 2.93 3.08 3.08 3.65 3.65 4.00 4.00 4.38 4.38 4.63 4.63 Package Marking D25B D25B D26B D26B D28B D28B D37B D37B D29B D29B D30B D30B D31B D31B D25C D25C D26C D26C D28C D28C D37C D37C D29C D29C D30C D30C D31C D31C Package Type SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 SOT23-5 Supplied As 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel www.national.com 2 LP3470 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VCC Voltage Reset Voltage Output Current (Reset) Operating Temperature Range LP3470 −20˚C to +85˚C −0.3V to +6V −0.3V to +6V 10 mA LP3470I Junction Temperature (TJmax) Power Dissipation (TA = 25˚C) (Note 2) θJA (Note 2) Storage Temp. Range Lead Temp. (Soldering, 5 sec) ESD Rating (Note 3) −40˚C to +85˚C 125˚C 300 mW 280˚C/W −65˚C to +150˚C 260˚C 2 kV Electrical Characteristics Limits in standard typeface are for TJ = 25˚C, and limits in boldface type apply over the full operating temperature range, unless otherwise specified. VCC = +2.4V to +5.0V unless otherwise noted. Symbol VCC ICC VRTH Parameter Operating Voltage Range VCC Supply Current Reset Threshold Voltage (Note 6) VCC = 4.5V LP3470 16 VRTH 0.99 VRTH 0.99 VRTH 0.99 VRTH 0.985 VRTH 15 1.0 Conditions Typ (Note 4) Min (Note 5) 0.5 Max (Note 5) 5.5 30 1.01 VRTH 1.01 VRTH 1.01 VRTH 1.015 VRTH 65 300 3.5 0.1 0.1 0.4 20 0.15 0.68 68 1 6 kΩ µA V Units V µA LP3470I VRTH V VHYST tPD tRP VOL Hysteresis Voltage (Note 7) VCC to Reset Delay Reset Timeout Period (Note 8) Reset Output Voltage Low VCC falling at 1 mV/µs C1 = 1 nF VCC = 0.5V; IOL = 30 µA VCC = 1.0V; IOL = 100 µA VCC =VRTH −100 mV; IOL = 4 mA 35 100 2 mV µs ms R1 ILEAK External Pull-up Resistor Reset Output Leakage Current Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device beyond its operating conditions. Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (Maximum Junction Temperature), θJA (Junction to Ambient Thermal Resistance), and TA (Ambient Temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax − TA)/ θJA or the number given in the Absolute Maximum Ratings, whichever is lower. Note 3: The Human Body Model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. Note 4: Typical numbers are at 25˚C and represent the most likely parametric norm. Note 5: Min. and Max. limits in standard typeface are 100% production tested at 25˚C. Min. and Max. limits in boldface are guaranteed through correlation using Statistical Quality Control (SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL). Note 6: Factory-trimmed reset thresholds are available in 50 mV increments from 2.4V to 5.0V. Contact your National Semiconductor representative. Note 7: VHYST affects the relation between VCC and Reset as shown in the timing diagram. Note 8: tRP is programmable by varying the value of the external capacitor (C1) connected to pin SRT. The equation is: tRP = 2000 x C1 (C1 in µF and tRP in ms). 3 www.national.com LP3470 Typical Operating Characteristics TA = +25˚C, unless otherwise specified. ICC vs Temperature ICC vs VCC 10001610 10001611 VCC to Reset Delay vs Temp Normalized tRP vs Temp. 10001613 10001612 Normalized VRTH vs Temp. Transient Rejection 10001608 10001606 www.national.com 4 LP3470 Typical Operating Characteristics TA = +25˚C, unless otherwise specified. VHYST vs VRTH (Continued) VHYST vs Temperature 10001614 10001609 Pin Description Pin 1 Name SRT Function Set Reset Time-out Input. Connect a capacitor between this input and ground to select the Reset Time-out period (tRP). tRP = 2000 x C1 (C1 in µF and tRP in ms). If no capacitor is connected, leave this pin floating. Ground pin. Always connect to pin VCC (Pin 4). Supply voltage, and reset threshold monitor input. Open-Drain, Active-Low reset output. Connect to an external pull-up resistor. Reset changes from high to low whenever the monitored voltage (VCC) drops below the reset threshold voltage (VRTH). Once VCC exceeds VRTH, Reset remains low for the reset timeout period (tRP) and then goes high. 2 3 4 5 GND VCC1 VCC Reset Functional Block Diagram 10001603 5 www.national.com LP3470 Application Information RESET TIMEOUT PERIOD The Reset Timeout Period (tRP) is programmable using an external capacitor (C1) connected to pin SRT of LP3470. A Ceramic chip capacitor rated at or above 10V is sufficient. The Reset Timeout Period (tRP) can be calculated using the following formula: tRP (ms) = 2000 x C1 (µF). For example a C1 of 100 nF will achieve a tRP of 200 ms. If no delay due to tRP is needed in a certain application, the pin SRT should be left floating. RESET OUTPUT In applications like microprocessor (µP) systems, errors might occur in system operation during power-up, powerdown, or brownout conditions. It is imperative to monitor the power supply voltage in order to prevent these errors from occurring. The LP3470 asserts a reset signal whenever the VCC supply voltage is below a threshold (VRTH) voltage. Reset is guaranteed to be a logic low for VCC > 0.5V. Once VCC exceeds the reset threshold, the reset is kept asserted for a time period (tRP) programmed by an external capacitor (C1); after this interval Reset goes to logic high. If a brownout condition occurs (monitored voltage falls below the reset threshold minus a small hysteresis), Reset goes low. When VCC re- turns above the reset threshold, Reset remains low for a time period tRP before going to logic high. PULL-UP RESISTOR SELECTION The LP3470’s Reset output structure is a simple open-drain N-channel MOSFET switch. A pull-up resistor (R1) should be connected to VCC. R1 should be large enough to limit the current through the output MOSFET (Q1) below 10 mA. A resistor value of more than 680Ω guarantees this. R1 should also be small enough to ensure a logic high while supplying all the leakage current through the Reset pin. A resistor value of less than 68kΩ satisfies this condition. A typical pull-up resistor value of 20 kΩ is sufficient in most applications. NEGATIVE-GOING VCC TRANSIENTS The LP3470 is relatively immune to short duration negativegoing VCC transients (glitches). The Typical Operating Characteristics show the Maximum Transient Duration vs. Negative Transient Amplitude (graph titled Transient Rejection), for which reset pulses are not generated. This graph shows the maximum pulse width a negative-going VCC transient may typically have without causing a reset pulse to be issued. As the transient amplitude increases (i.e. goes farther below the reset threshold), the maximum allowable pulse width decreases. A 0.1 µF bypass capacitor mounted close to VCC provides additional transient immunity. Timing Diagram 10001604 www.national.com 6 LP3470 Typical Application Circuit 10001605 7 www.national.com LP3470 Tiny Power On Reset Circuit Physical Dimensions inches (millimeters) unless otherwise noted 5-Lead Small Outline Package (M5) For Ordering Information See Ordering Information Table In This Data Sheet NSPackage Number MF05A National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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