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LP3939

LP3939

  • 厂商:

    NSC

  • 封装:

  • 描述:

    LP3939 - Power Amplifier Driver For Dual Band CDMA Handsets - National Semiconductor

  • 数据手册
  • 价格&库存
LP3939 数据手册
LP3939 Power Amplifier Driver for Dual Band CDMA Handsets November 2003 LP3939 Power Amplifier Driver for Dual Band CDMA Handsets General Description Designed specifically for Qualcomm’s MSM3xxx and MSM5xxx series, the LP3939 is an integrated device that provides interface to the baseband processor to powerswitch two independent power amplifiers in dual band applications. By integrating the discrete components necessary to achieve the same functions, the LP3939 drastically reduces board space and component cost. Features n Power-switch for dual band CDMA power amplifier Key Specifications n 0.002 µA Quiescent Current (typ) n LLP16 Package Applications n Dual-band CDMA phones with MSM3xxx or MSM5xxx platform LP3939 Application Circuit 20083101 Note: This application circuit shows the connection interface to a typical Skyworks PA. Connections to other PA vendors may vary slightly. © 2003 National Semiconductor Corporation DS200831 www.national.com LP3939 Connection Diagram (LLP16: NSC Marketing Drawing LQA16A) 20083102 Top View See NS Package Number LQA16A Pin Description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Name INV_A1 VDD2 PCS_ON PCS_GAIN INV_Y1 GAIN_MODE EN_CELL EN_PCS CELL_GAIN CELL_ON VDD1 PA_ON INV_A2 INV_Y2 GND A1_SINK Input Supply. VDD1 and VDD2 must be tied together externally. Output, open drain Output, open drain Output Input Input Input Output, open drain Output, open drain Supply. VDD1 and VDD2 must be tied together externally. Output Input Output, open drain GND Output, open drain Functional Description Ordering Information LP3939 Supplied as 1k Units, Tape and Reel LP3939ILQ LP3939 Supplied as 4.5k Units, Tape and Reel LP3939ILQX Package Marking National Logo UZXYTT LP3939 Note: U-wafer fab code Z-assembly plant code XY-date code TT-die run traceability www.national.com 2 LP3939 Absolute Maximum Ratings 2) (Notes 1, Storage Temperature ESD (Note 4): Human Body Model Machine Model −65˚C to +150˚C 2 kV 200V If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VDD1, VDD2 EN_CELL, EN_PCS, GAIN_MODE, INV_A1, INV_A2, PA_ON, INV_Y1, CELL_ON, CELL_GAIN, PCS_ON, PCS_GAIN, INV_Y2 and A1_SINK GND to GND SLUG Junction Temperature Maximum Power Dissipation (Note 3) −0.3V to +6.0V Operating Ratings (Notes 1, 2) VDD1, VDD2 Junction Temperature Operating Temperature Thermal Resistance θJA (LLP16) Maximum Power Dissipation (Note 5) 1.8V to 5.5V −40˚C to +125˚C −40˚C to +85˚C 39.8˚C/W −0.3V to (VDD + 0.3V) ± 0.3V 150˚C 2.0W 1.38W DC Electrical Characteristics Unless otherwise noted, VDD1 = VDD2 = 3V. Typical values and limits appearing in normal type apply for TJ = 25˚C. Limits appearing in boldface type apply over the entire junction temperature range for operation, −40˚C to +85˚C. (Note 6) Symbol IIN IQ ILEAKAGE Parameter Input Current Quiescent Current Output Leakage Current Conditions All Input Pins All inputs tied to VDD or ground. No load at the outputs. CELL_ON, PCS_ON CELL_GAIN, PCS_GAIN A1_SINK RDS-ON MOSFET’s ON Resistance P-Ch, VDD = 3V CELL_ON, PCS_ON CELL_GAIN, PCS_GAIN P-Ch, VDD = 2V CELL_ON, PCS_ON CELL_GAIN, PCS_GAIN VIH Logic High Input 1.8V ≤ VDD < 2.5V EN_CELL, EN_PCS, INV_A1, GAIN_MODE, INV_A2 2.5V ≤ VDD ≤ 3.5V EN_CELL, EN_PCS, INV_A1, GAIN_MODE, INV_A2 VIL Logic Low Input 1.8V ≤ VDD ≤ 3.5V EN_CELL, EN_PCS, INV_A1, GAIN_MODE, INV_A2 PA_ON, INV_Y1, ISOURCE = 1 mA INV_Y2, ISOURCE = 1 mA VOL Logic Low Output PA_ON, INV_Y1, ISINK = 1 mA INV_Y2, A1_SINK ISINK = 1 mA 2.93 2.74 80 16 2.8 V 2.5 200 55 mV 275 Typ 0.05 0.002 Limit Min Max 5 5 10 5 500 mΩ 430 650 Units µA µA µA 1.4 V 2.0 0.4 V VOH Logic High Output 3 www.national.com LP3939 AC Electrical Characteristics Unless otherwise noted, VDD1 = VDD2 = 3V, CLOAD = 50 pF. Typical values and limits appearing in normal type apply for TJ = 25˚C. Limits appearing in boldface type apply over the entire junction temperature range for operation, −40˚C to +85˚C. (Note 7) Symbol tPLH Parameter Propagations Delay Low to High Conditions EN_CELL to PA_ON or EN_PCS to PA_ON EN_CELL to CELL_ON or EN_PCS to PCS_ON RPD = 100Ω GAIN_MODE to CELL_GAIN or GAIN_MODE to PCS_GAIN RPD = 100Ω INV_A1 to INV_Y1 INV_A2 to INV_Y2 tPHL Propagations Delay High to Low EN_CELL to PA_ON or EN_PCS to PA_ON EN_CELL to CELL_ON or EN_PCS to PCS_ON RPD = 100Ω GAIN_MODE to CELL_GAIN or GAIN_MODE to PCS_GAIN RPD = 100Ω INV_A1 to INV_Y1 INV_A1 to A1_SINK RPU = 10 kΩ INV_A2 to INV_Y2 tRISE Rise Time PA_ON INV_Y2 INV_Y1 TFALL Fall Time PA_ON INV_Y2 INV_Y1 Typ 10 Limit Min Max 80 Units ns 7 56 ns 7 10 25 10 56 80 200 80 ns ns ns ns 25 200 ns 20 10 5 5 15 50 20 15 10 20 160 80 40 40 120 400 160 120 80 160 ns ns ns ns ns ns Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All voltages are with respect to the potential at the GND pin. Note 3: The Absolute Maximum power dissipation depends on the ambient temperature and can be calculated using the formula: where TJ is the junction temperature, TA is the ambient temperature, and θJA is the junction-to-ambient temperature. The 2.0W rating appearing under Absolute Maximum Ratings results from substituting the Absolute Maximum junction temperature, 150˚C for TJ, 70˚C for TA and 39.8˚C/W for θJA. More power can be dissipated safely at ambient temperatures below 70˚C. Less power can be dissipated safely at ambient temperatures above 70˚C. The Absolute Maximum power dissipation can be increased by 25 mW for each degree below 70˚C, and it must be derated by 25 mW for each degree above 70˚C. Note 4: The human body model is 100 pF discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin. Note 5: Like the Absolute Maximum power dissipation, the maximum power dissipation depends on the ambient temperature. The 1.38W rating appearing under Absolute Maximum Ratings results from substituting the Maximum junction temperature, 125˚C for TJ, 70˚C for TA and 39.8˚C/W for θJA. More power can be dissipated safely at ambient temperatures below 70˚C. Less power can be dissipated safely at ambient temperatures above 70˚C. The Absolute Maximum power dissipation can be increased by 25 mW for each degree below 70˚C, and it must be derated by 25 mW for each degree above 70˚C. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: All AC parameters are guaranteed by design, not production tested. www.national.com 4 LP3939 LP3939 Block Diagram 20083104 Truth Tables TABLE 1. PA Enables INPUTS EN_CELL 0 1 0 1 EN_PCS 0 0 1 1 CELL_ON 0 1 0 OUTPUTS PCS_ON 0 0 1 Not Valid PA_ON 0 1 1 Note: Measured with a 10 kΩ pull down resistor on CELL_ON and PCS_ON. 5 www.national.com LP3939 Truth Tables (Continued) TABLE 2. PA Gain Mode INPUTS OUTPUTS EN_PCS 0 0 0 1 1 1 CELL_GAIN 0 1 0 0 0 Not Valid PCS_GAIN 0 0 0 1 0 GAIN_MODE 0 0 1 0 1 X EN_CELL 0 1 1 0 0 1 Note: Measured with a 10 kΩ pull down resistor on CELL_GAIN and PCS_GAIN. TABLE 3. Current Sink Control INPUTS INV_A1 0 1 INV_A2 0 1 Note: Measured with a 10 kΩ pull up resistor on A1_SINK. OUTPUTS INV_Y1 1 0 INV_Y2 1 0 A1_SINK 0 1 www.national.com 6 LP3939 Power Amplifier Driver for Dual Band CDMA Handsets Physical Dimensions inches (millimeters) unless otherwise noted NOTES: UNLESS OTHERWISE SPECIFIED 1. 2. STANDARD LEAD FINISH TO BE 5.08 MICROMETERS MINIMUM LEAD/TIN (SOLDER) ON COPPER. NO JEDEC REGISTRATION AS OF APRIL 2000. 16-Lead Plastic Quad Package Order Number LP3939ILQ or LP3939ILQX NS Package Number LQA16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. BANNED SUBSTANCE COMPLIANCE National Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 www.national.com National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Support Center Email: ap.support@nsc.com National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: jpn.feedback@nsc.com Tel: 81-3-5639-7560 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
LP3939 价格&库存

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