LP3984IMF-2.0

LP3984 Micropower, 150mA Ultra Low-Dropout CMOS Voltage Regulator in Subminiature 4-I/O micro SMD Package November 2001 LP3984 Micropower, 150mA Ultra Low-Dropout CMOS Voltage Regulator in Subminiature 4-I/O micro SMD Package General Description The LP3984 is designed for portable and wireless applications with demanding performance and space requirements. The LP3984’s performance is optimized for battery powered systems to deliver extremely low dropout voltage and low quiescent current. Regulator ground current increases only slightly in dropout, further prolonging the battery life. Power supply rejection is better than 60 dB at low frequencies and starts to roll off at 10 kHz. High power supply rejection is maintained down to lower input voltage levels common to battery operated circuits. The device is ideal for mobile phone and similar battery powered wireless applications. It provides up to 150 mA, from a 2.5V to 6V input, consuming less than 1.2µA in disable mode and has fast turn-on time less than 20µs. The LP3984 is available in micro SMD and 5 pin SOT-23 package. Performance is specified for −40˚C to +125˚C temperature range and is available in 1.5V, 1.8V, 2.0V, and 3.1V output voltages. For other output voltage options from 1.5V to 3.5V, please contact National Semiconductor sales office. n n n n n n 60dB PSRR at 1kHz, 40dB at 10kHz @ 3.1VIN ≤1.2µA quiescent current when shut down Fast Turn-On time: 20 µs (typ.) 75mV typ dropout with 150mA load −40 to +125˚C junction temperature range for operation 1.5V, 1.8V, 2.0V, and 3.1V Features n n n n n n Miniature 4-I/O micro SMD and SOT-23-5 package Logic controlled enable Stable with tantalum capacitors 1 µF Tantalum output capacitor Fast turn-on Thermal shutdown and short-circuit current limit Applications n n n n CDMA cellular handsets Wideband CDMA cellular handsets GSM cellular handsets Portable information appliances Key Specifications n 2.5 to 6.0V input range n 150mA guaranteed output Typical Application Circuit 20020402 Note: Pin Numbers in parenthesis indicate micro SMD package. © 2001 National Semiconductor Corporation DS200204 www.national.com LP3984 Block Diagram 20020401 Pin Descriptions Name VEN GND VOUT VIN N.C. µSMD 4 1 2 3 SOT 3 2 5 1 4 Function Enable Input Logic, Enable High Common Ground Output Voltage of the LDO Input Voltage of the LDO No Connection micro SMD, 4 Bump Package Connection Diagrams SOT-23-5 Package 20020407 Top View See NS Package Number MF05A 20020470 Top View See NS Package Number BPA04 Note: The actual physical placement of the package marking will vary from part to part. The package marking will designate the date code. Package marking does not correlate to device type in any way. www.national.com 2 LP3984 Ordering Information For micro SMD Package Output Voltage (V) 1.5 1.8 2.0 3.1 Grade STD STD STD STD LP3984 Supplied as 250 Units, Tape and Reel LP3984IBP-1.5 LP3984IBP-1.8 LP3984IBP-2.0 LP3984IBP-3.1 For SOT Package Output Voltage (V) 1.5 1.8 2.0 3.1 Grade STD STD STD STD LP3984 Supplied as 1000 Units, Tape and Reel LP3984IMF-1.5 LP3984IMF-1.8 LP3984IMF-2.0 LP3984IMF-3.1 LP3984 Supplied as 3000 Units, Tape and Reel LP3984IMFX-1.5 LP3984IMFX-1.8 LP3984IMFX-2.0 LP3984IMFX-3.1 Package Marking LEAB LEBB LECB LEDB LP3984 Supplied as 3000 Units, Tape and Reel LP3984IBPX-1.5 LP3984IBPX-1.8 LP3984IBPX-2.0 LP3984IBPX-3.1 3 www.national.com LP3984 Absolute Maximum Ratings 2) (Notes 1, If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN,VOUT, VEN Junction Temperature Storage Temperature Lead Temp. (Note 3) Pad Temp. (Note 3) Power Dissipation (Note 4) θJA (SOT23-5) θJA (micro SMD) Maximum Power Dissipation SOT23-5 Micro SMD −0.3 to 6.5V 150˚C −65˚C to +150˚C 235˚C 235˚C 220˚C/W 340˚C/W 364mW 235mW ESD Rating(Note 5) Human Body Model Machine Model 2kV 200V Operating Ratings (Notes 1, 2) VIN VEN Junction Temperature Maximum Power Dissipation (Note 6) SOT23-5 micro SMD 2.5 to 6V 0 to (VIN + 0.3V) −40˚C to +125˚C 250mW 160mW Electrical Characteristics Unless otherwise specified: VIN = 2.5V for 1.5, 1.8, & 2.0V options, VIN = VOUT + 0.5 for output options higher than 2.5V, CIN = 1 µF, IOUT = 1mA, COUT = 1 µF, tantalum. Typical values and limits appearing in standard typeface are for TJ = 25˚C. Limits appearing in boldface type apply over the entire junction temperature range for operation, −40˚C to +125˚C. (Note 7) (Note 8) Symbol Parameter Output Voltage Tolerance Line Regulation Error ∆VOUT Load Regulation Error (Note 9) VIN = 2.5V to 4.5V for 1.5, 1.8, 2.0V options VIN = (VOUT + 0.5V) to 4.5V for Voltage options higher than 2.5V IOUT = 1 mA to 150 mA LP3984IM5 (SOT23-5) LP3984IBP (micro SMD) VIN = VOUT(nom) + 0.2V, f = 1 kHz, IOUT = 50 mA (Figure 2) VIN = VOUT(nom) + 0.2V, f = 10 kHz, IOUT = 50 mA (Figure 2) VEN = 1.4V, IOUT = 0 mA VEN = 1.4V, IOUT = 0 to 150 mA VEN = 0.4V Dropout Voltage (Note 10) IOUT = 1 mA IOUT = 50 mA IOUT = 100 mA IOUT = 150 mA ISC IOUT(PK) TON en IEN www.national.com Conditions Typ Limit Min −1.2 −2.0 Max 1.2 2.0 0.15 Units % of VOUT(nom) 0.05 −0.15 %/V 0.002 0.0009 60 0.005 %/mA 0.002 PSRR Power Supply Rejection Ratio 40 dB IQ Quiescent Current 80 110 0.005 0.6 25 50 75 600 600 20 300 125 150 1.2 2.5 40 80 120 mA mA µs µVrms nA mV µA Short Circuit Current Limit Peak Output Current Turn-On Time (Note 11) Output Noise Voltage Maximum Input Current at EN Output Grounded (Steady State) VOUT ≥ VOUT(nom) - 5% BW = 10 Hz to 100 kHz, COUT = 1µF tant. VEN = 0.4 and VIN = 6.0 4 90 ±1 LP3984 Electrical Characteristics (Continued) Unless otherwise specified: VIN = 2.5V for 1.5, 1.8, & 2.0V options, VIN = VOUT + 0.5 for output options higher than 2.5V, CIN = 1 µF, IOUT = 1mA, COUT = 1 µF, tantalum. Typical values and limits appearing in standard typeface are for TJ = 25˚C. Limits appearing in boldface type apply over the entire junction temperature range for operation, −40˚C to +125˚C. (Note 7) (Note 8) Symbol VIL VIH COUT Parameter Maximum Low Level Input Voltage at EN Minimum High Level Input Voltage at EN Output Capacitor Thermal Shutdown Temperature Thermal Shutdown Hysteresis Conditions VIN = 2.5 to 6.0V VIN = 2.5 to 6.0V Capacitance ESR TSD 160 20 1.4 1 2 22 10 Typ Limit Min Max 0.4 Units V V µF Ω ˚C ˚C Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All voltages are with respect to the potential at the GND pin. Note 3: Additional information on lead temperature and pad temperature can be found in National Semiconductor Application Note (AN-1112). Note 4: The Absolute Maximum power dissipation depends PD = (TJ - TA)/θJA, on the ambient temperature and can be calculated using the formula: where TJ is the junction temperature, TA is the ambient temperature, and θ JA is the junction-to-ambient thermal resistance. The 364mW rating for SOT23-5 appearing under Absolute Maximum Ratings results from substituting the Absolute Maximum junction temperature, 150˚C, for TJ, 70˚C for TA, and 220˚C/W for θJA. More power can be dissipated safely at ambient temperatures below 70˚C . Less power can be dissipated safely at ambient temperatures above 70˚C. The Absolute Maximum power dissipation for SOT23-5 can be increased by 4.5mW for each degree below 70˚C, and it must be derated by 4.5mW for each degree above 70˚C. Note 5: The human body model is 100pF discharged through 1.5kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin. Note 6: Like the Absolute Maximum power dissipation, the maximum power dissipation for operation depends on the ambient temperature. The 250mW rating for SOT23-5 appearing under Operating Ratings results from substituting the maximum junction temperature for operation, 125˚C, for TJ, 70˚C for TA, and 220˚C/W for θJA into (Note 4) above. More power can be dissipated at ambient temperatures below 70˚C . Less power can be dissipated at ambient temperatures above 70˚C. The maximum power dissipation for operation can be increased by 4.5mW for each degree below 70˚C, and it must be derated by 4.5mW for each degree above 70˚C. Note 7: All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production with TJ = 25˚C or correlated using Statistical Quality Control (SQC) methods. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control. Note 8: The target output voltage, which is labeled VOUT(nom), is the desired voltage option. Note 9: An increase in the load current results in a slight decrease in the output voltage and vice versa. Note 10: Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value. This specification does not apply for input voltages below 2.5V. Note 11: Turn-on time is time measured between the enable input just exceeding VIH and the output voltage just reaching 95% of its nominal value. 20020408 FIGURE 1. Output AC Line Regulation Input Perturbation 5 www.national.com LP3984 20020409 FIGURE 2. PSRR Input Perturbation Typical Performance Characteristics Power Supply Rejection Ratio (VIN = 3.5V) Unless otherwise specified, CIN = COUT = 1 µF Tantalum, VIN = 2.5 for 1.5, 1.8, and 2.0V options, VIN = VOUT + 0.2V for output options higher than 2.5V, TA = 25˚C, Enable pin is tied to VIN. Power Supply Rejection Ratio (VIN = 3.5V) 20020403 20020404 Power Supply Rejection Ratio (VIN = 3.5V) Power Supply Rejection Ratio (LP3984-1.5, VIN = 2.5V) 20020420 20020419 www.national.com 6 LP3984 Typical Performance Characteristics Unless otherwise specified, CIN = COUT = 1 µF Tantalum, VIN = 2.5 for 1.5, 1.8, and 2.0V options, VIN = VOUT + 0.2V for output options higher than 2.5V, TA = 25˚C, Enable pin is tied to VIN. (Continued) Line Transient Response (LP3984-3.1) Line Transient Response (LP3984-3.1) 20020418 20020417 Line Transient Response (LP3984-3.1) Line Transient Response (LP3984-3.1) 20020416 20020415 Line Transient Response (LP3984-3.1) Line Transient Response (LP3984-3.1) 20020414 20020413 7 www.national.com LP3984 Typical Performance Characteristics Unless otherwise specified, CIN = COUT = 1 µF Tantalum, VIN = 2.5 for 1.5, 1.8, and 2.0V options, VIN = VOUT + 0.2V for output options higher than 2.5V, TA = 25˚C, Enable pin is tied to VIN. (Continued) Start Up Response Start Up Response 20020412 20020411 Enable Response Load Transient Response (LP3984-3.1 20020410 20020408 Load Transient Response (LP3984-3.1) Load Transient Response (VIN = 4.2V) 20020406 20020405 www.national.com 8 LP3984 Application Hints External Capacitors Like any low-dropout regulator, the LP3984 requires external capacitors for regulator stability. The LP3984 is specifically designed for portable applications requiring minimum board space and smallest components. These capacitors must be correctly selected for good performance. Input Capacitor An input capacitance of ) 1µF is required between the LP3984 input pin and ground (the amount of the capacitance may be increased without limit). This capacitor must be located a distance of not more than 1cm from the input pin and returned to a clean analog ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input. Important: Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a low-impedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input, it must be guaranteed by the manufacturer to have a surge current rating sufficient for the application. There are no requirements for the ESR on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will be ) 1µF over the entire operating temperature range. Output Capacitor The LP3984 is designed specifically to work with tantalum output capacitors. A tantalum capacitor in 1 to 22 µF range with 2Ω to 10Ω ESR range is suitable in the LP3984 application circuit. It may also be possible to use film capacitors at the output, but these are not as attractive for reasons of size and cost. The output capacitor must meet the requirement for minimum amount of capacitance and also have an ESR (Equivalent Series Resistance) value which is within a stable range (2Ω to 10Ω). No-Load Stability The LP3984 will remain stable and in regulation with no external load. This is specially important in CMOS RAM keep-alive applications. On/Off Input Operation The LP3984 is turned off by pulling the VEN pin low, and turned on by pulling it high. If this feature is not used, the VEN pin should be tied to VIN to keep the regulator output on at all time. To assure proper operation, the signal source used to drive the VEN input must be able to swing above and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section under VIL and VIH. Fast On-Time The LP3984 utilizes a speed up circuitry to ramp up the internal VREF voltage to its final value to achieve a fast output turn on time. Micro SMD Mounting The micro SMD package requires specific mounting techniques which are detailed in National Semiconductor Application Note (AN-1112). Referring to the section Surface Mount Technology (SMT) Assembly Considerations, it should be noted that the pad style which must be used with the 5 pin package is NSMD (non-solder mask defined) type. For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the micro SMD device. Micro SMD Light Sensitivity Exposing the micro SMD device to direct sunlight will cause misoperation of the device. Light sources such as Halogen lamps can effect electrical performance if brought near to the device. The wavelengths which have most detrimental effect are reds and infra-reds, which means that the fluorescent lighting used inside most buildings has very little effect on performance. A micro SMD test board was brought to within 1cm of a fluorescent desk lamp and the effect on the regulated output voltage was negligible, showing a deviation of less than 0.1% from nominal. 9 www.national.com LP3984 Physical Dimensions unless otherwise noted inches (millimeters) 5-Lead Small Outline Package (MF) NS Package Number MF05A www.national.com 10 LP3984 Micropower, 150mA Ultra Low-Dropout CMOS Voltage Regulator in Subminiature 4-I/O micro SMD Package Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Micro SMD, 4 Bump Package (BPA04) NS Package Number bpa04DHC X1 = 0.853 ± 0.03mm X2 = 0.955 ± 0.03mm X3 = 0.900 ± 0.1mm LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: ap.support@nsc.com National Semiconductor Japan Ltd. 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