LP3997

LP3997 Micropower 250mA CMOS LDO Regulator with Error Flag / Power-On-Reset PRELIMINARY May 2004 LP3997 Micropower 250mA CMOS LDO Regulator with Error Flag / Power-On-Reset General Description The LP3997 regulator is designed to meet the requirements of portable, battery-powered systems, providing accurate output voltage, low noise, and low quiescent current. The LP3997 provides 3.3V output at up to 250mA load current. When switched in shutdown mode, the power consumption is virtually zero. The LP3997 is designed to be stable with space saving ceramic capacitors as small as 1µF. The LP3997 also includes an out-of-regulation error flag. When the output is more than 5% below its nominal voltage, the error flag sets to low. If a capacitor is connected to device’s delay pin, a delayed power-on reset signal will be generated. n n n n n Less than 70µA Typical IQ at 250mA. Virtually Zero IQ (Disabled). Themal and Short Circuit Protection. 3.3V Output. For other voltage options, please contact your local NSC sales office. Package 8 Lead MSOP For other package options contact your NSC sales office. Applications n n n n n Portable Consumer Electronics Cellular Handsets Laptop and Palm Computers PDA’s Digital Cameras Features n Low, 140mV, Dropout at 250mA Load. n Stable with Ceramic Capactor. n Low Noise, with Bypass Capacitor. Typical Application Circuit 20092901 © 2004 National Semiconductor Corporation DS200929 www.national.com LP3997 Functional Block Diagram 20092908 Pin Descriptions Pin # 1 2 3 4 5 6 7 Name CNOISE DELAY GND VIN VOUT SENSE ERROR Description Noise bypass pin. For low noise applications a 0.1µF or larger ceramic capacitor should be connected from this pin to ground A capacitor connected from this pin to ground will allow a delayed power-on-reset signal at the ERROR (pin 7) output. Ground pin. Local ground for CNOISE and COUT. Input supply pin. Bypass this with a 1µF capacitor. Output voltage, Connect COUT between this pin and ground. Connect this pin to VOUT (pin 5). This open drain output is an error flag output which goes low when VOUT drops 5% below it nominal voltage. This pin also provides a power-on-reset signal if a capacitor is connected to the DELAY pin. Shutdown. Disables the regulator when less than 0.4V is applied. Enables the regulator when greater than 0.9V. The Shutdown pin is pulled down internally by a 6MΩ resistor. 8 SD Connection Diagram 8 Lead MSOP NS Package Number MUA08A 20092904 www.national.com 2 LP3997 Ordering Information For MSOP Package Please contact Sales Office for Availability Output Voltage (V) 3.3 Grade STD LP3997 Supplied as 1000 Units, Tape and Reel LP3997MM-3.3 LP3997 Supplied as 3500 Units, Tape and Reel LP3997MMX-3.3 Package Marking 3 www.national.com LP3997 Absolute Maximum Ratings (Notes 2, 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Input Voltage Output Voltage SD Input Voltage Junction Temperature Lead/Pad Temp. MSOP Storage Temperature Continuous Power Dissipation Internally Limited (Note 3) 260˚C -65 to 150˚C -0.3 to 6.5V -0.3 to (VIN + 0.3V) to 6.5V (max) -0.3 to (VIN + 0.3V) to 6.5V (max) 150˚C ESD (Note 4) Human Body Model Machine Model 2KV 200V Operating Ratings (Note 1) Input Voltage Shutdown Input Voltage Junction Temperature Ambient Temperature TA Range (Note 5) 2V to 6V 0 to (VIN + 0.3V) to 6.5V (max) -40˚C to 125˚C -40˚C to 85˚C Thermal Properties (Note 1) Junction To Ambient Thermal Resistance (Note 6) θJA (MSOP) 210˚C/W Electrical Characteristics Unless otherwise noted, VSD =950mV, VIN = VOUT + 1.0V, CIN = 2.2 µF, IOUT = 1 mA, COUT =2.2 µF and CNOISE = 0.1 µF. Typical values and limits appearing in normal type apply for TJ = 27˚C. Limits appearing in boldface type apply over the full temperature range for operation, −40 to +125˚C. (Note 11) Symbol VIN ∆VOUT Parameter Input Voltage Output Voltage Tolerance Line Regulation Error Load Regulation Error ILOAD IQ Load Current Quiescent Current Over full line and load regulation. VIN = (VOUT(NOM) + 1.0V) to 6.0V, IOUT = 1mA IOUT = 1mA to 250mA (Notes 7, 8) VSD = 950mV, IOUT = 0mA VSD = 950mV, IOUT = 250mA VSD = 0.4V ISC IOUT PSRR eN Short Circuit Current Limit Maximum Output Current Power Supply Rejection Ratio Output noise Voltage (Note 8) f = 1kHz, IOUT = 1mA to 150mA f = 10kHz, IOUT = 150mA BW = 10Hz to 100kHz, VIN = VOUTnom +1V Temperature Hysteresis Enable Control Characteristics ISD VIL VIH VTH Maximum Input Current at VSD Input Low Input Threshold High Input Threshold Power Good Trip Threshold VSD = 0.0V VSD = 6V (Note 10) VIN = 2V to 6V VIN = 2V to 6V VIN Rising 95 0.95 95 97 0.001 1 0.1 2 0.4 µA V V %VOUT w/o CNOISE CNOISE = 0.1µF 64 39 180 µVRMS 100 160 20 ˚C (Note 9) 45 65 0.002 650 250 1000 mA mA dB µA 0.05 20 0 Conditions Typ Limit Min 2 -3 Max 6 +3 Units V % %/V µV/mA µA TSHUTDOWN Thermal Shutdown Error Flag Characteristics www.national.com 4 LP3997 Electrical Characteristics (Continued) Unless otherwise noted, VSD =950mV, VIN = VOUT + 1.0V, CIN = 2.2 µF, IOUT = 1 mA, COUT =2.2 µF and CNOISE = 0.1 µF. Typical values and limits appearing in normal type apply for TJ = 27˚C. Limits appearing in boldface type apply over the full temperature range for operation, −40 to +125˚C. (Note 11) Symbol Parameter Hysteresis ErrorOutput low Voltage Error Output High Leakage Delay Pin Current Source Turn On Time (Note 8) Conditions VIN Rising or Falling ISINK = 2mA ERROR = VOUT(NOM) VOUT > 95% VOUT(NOM) To 95% Level w/o CNOISE CNOISE = 0.1µF 2.2 150 2 8 70 TBA 80 250 Typ Limit Min 2 0.4 2 Max Units %VOUT V µA µA µs ms mV (pk - pk) mV VHYST VOL IOFF IDELAY tON Transient Response Timing Characteristics Line Transient Response |δVOUT| Trise = Tfall = 30µs (Note 8) δVIN = 600mV Load Transient Response |δVOUT| Trise = Tfall = 1µs (Note 8) IOUT = 1mA to 150mA Note 1: Absolute Maximum Ratings are limits beyond which damage can occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All Voltages are with respect to the potential at the GND pin. Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Note 4: The human body model is 100pF discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. Note 5: The maximum ambient temperature (TA(max)) is dependant on the maximum operating junction temperature (TJ(max-op) = 125˚C), the maximum power dissipation of the device in te application (PD(max)), and the junction to ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA(max) = TJ(max-op) - (θJA x PD(max)). Note 6: Junction to ambient thermal resistance is dependant on the application and board layout. In applications where high maximum power dissipation is possible, special care must be paid to thermal dissipation issues in board design. Note 7: The device maintains the regulated output voltage without the load. Note 8: This electrical specification is guaranteed by design. Note 9: Short circuit current is measured on the input supply line at the point when the short circuit condition reduces the output voltage to 5% of its nominal value. Note 10: Enable Pin has 6MΩ typical, resistor connected to GND. Note 11: All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production at TJ = 25˚C or correlated using Statistical Quality Control methods. Operation over the temperature specification is guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control. Output Capacitor, Recommended Specifications Symbol Co Parameter Output Capacitor Conditions Capacitance(Note 12) ESR Typ 1.0 Limit Min 0.7 5 500 Max Units µF mΩ Note 12: The capacitor tolerance should be 30% or better over temperature. The full operating conditions for the application should be considered when selecting a suitable capacitor to ensure that the minimum value of capacitance is always met. Recommended capacitor type is X7R. However, dependent on application, X5R, Y5V, and Z5U can also be used. (See capacitor characteristics section in Application Hints) 5 www.national.com LP3997 Unless otherwise noted, VSD =950mV, VIN = VOUT + 1.0V, CIN = 2.2 µF, IOUT = 1 mA, COUT = 2.2 µF and CNOISE = 0.1 µF. Typical values and limits appearing in normal type apply for TJ = 27˚C. Limits appearing in boldface type apply over the full temperature range for operation, −40 to +125˚C. Output Voltage Change vs Temperature Ground Current vs Load Current Typical Performance Characteristics. 20092910 20092911 Ground Current vs VIN. ILOAD = 0mA Ground Current vs VIN. ILOAD = 1mA 20092930 20092931 Ground Current vs VIN. ILOAD = 250mA Dropout Voltage vs Load Current 20092932 20092916 www.national.com 6 LP3997 Typical Performance Characteristics. Unless otherwise noted, VSD =950mV, VIN = VOUT + 1.0V, CIN = 2.2 µF, IOUT = 1 mA, COUT = 2.2 µF and CNOISE = 0.1 µF. Typical values and limits appearing in normal type apply for TJ = 27˚C. Limits appearing in boldface type apply over the full temperature range for operation, −40 to +125˚C. (Continued) Line Transient Line Transient 20092918 20092919 Load Transient Enable Start-up Time 20092921 20092923 Enable Start-up Time Short Circuit Current 20092929 20092926 7 www.national.com LP3997 Typical Performance Characteristics. Unless otherwise noted, VSD =950mV, VIN = VOUT + 1.0V, CIN = 2.2 µF, IOUT = 1 mA, COUT = 2.2 µF and CNOISE = 0.1 µF. Typical values and limits appearing in normal type apply for TJ = 27˚C. Limits appearing in boldface type apply over the full temperature range for operation, −40 to +125˚C. (Continued) Power Supply Rejection Ratio Noise Spectrum 20092925 20092924 Turn-0n Sequence Turn-Off Sequence 20092927 20092928 www.national.com 8 LP3997 Applications Information External Capacitors In common with most regulators, the LP3997 requires external capacitors for regulator stability. The LP3990 is specifically designed for portable applications requiring minimum board space and smallest components. These capacitors must be correctly selected for good performance. VIN An input capacitor is required for stability. It is recommended that a minimum of 1.0µF capacitor is connected between the LP3997 input pin and ground (this capacitance value may be increased without limit). This capacitor must be located a distance of not more than 1cm from the input pin and returned to a clean analogue ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input. Important: Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a lowimpedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input, it must be guaranteed by the manufacturer to have a surge current rating sufficient for the application. There are no requirements for the ESR (Equivalent Series Resistance) on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will remain ) 1.0µF over the entire operating temperature range. VOUT VOUT is the output voltage of the regulator. Connect capacitor (minimum 1.0µF) to ground form this pin. To ensure stabilty the capacitor must meet the minimum value for capcitance and have an ESR in the range 5mW to 500mW. Ceramic X7R types are recommended. SENSE or ADJUST SENSE is used to sense the output voltage. Connect sense to VOUT for fixed voltage version. SHUTDOWN SD controls the turning on and off of the LP3997. VOUT is guaranteed to be on when the voltage on the /SD pin is greater than 0.95V. VOUT is guaranteed to be off when the voltage on the SD pin is less than 0.4V. ERROR ERROR is an open drain output which is set low when VOUT is more than 5% below its nominal value. An external pull up resistor is required on this pin. When a capacitor is connected from DELAY to GROUND, the error signal is delayed (see DELAY section). This delayed error signal can be used as the power-on reset signal for the application system. The ERROR pin is disconnected when not used. DELAY A capacitor from DELAY to GROUND sets the time delay for ERROR changing from low to high state. The delay time is set by the following formula. 20092905 VTH(DELAY) is nominally 1.2V. The DELAY pin should be open circuit if not used. CNOISE For low noise application, connect a high frequency ceramic capacitor from CNOISE to ground, A 0.01µF to 0.1µF X5R or X7R is recommended. This capacitor is connected directly to high impedence node in the band gap reference circuit. Any significant loading on this node will cause a change in the regulated output voltage. For theis reason, DC leakage current from this pin must be kept as low as possible for best output voltage accuracy. CAPACITOR CHARACTERISTICS The LP3997 is designed to work with ceramic capacitors on the output to take advantage of the benefits they offer: for capacitance values in the range of 1µF to 4.7µF range, ceramic capacitors are the smallest, least expensive and have the lowest ESR values (which makes them best for eliminating high frequency noise). The ESR of a typical 1µF ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which easily meets the ESR requirement for stability by the LP3985. For both input and output capacitors careful interpretation of the capacitor specification is required to ensure correct device operation. The capacitor value can change greatly dependant on the conditions of operation and capacitor type. In particular the output capacitor selection should take account of all the capacitor parameters to ensure that the specification is met within the application. Capacitance value can vary with DC bias conditions as well as temperature and frequency of operation. Capacitor values will also show some decrease over time due to aging. The capacitor parameters are also dependant on the particular case size with smaller sizes giving poorer performance figures in general. As an example Figure 1shows a typical graph showing a comparison of capacitor case sizes in a Capacitance vs. DC Bias plot. As shown in the graph, as a result of the DC Bias condition the capacitance value may drop below the minimum capacitance value given in the recommended capacitor table (0.7µF in this case). Note that the graph shows the capacitance out of spec for the 0402 case size capacitor at higher bias voltages. It is therefore recommended that the capacitor manufacturers’ specifications for the nominal value capacitor are consulted for all conditions as some capacitor sizes (e.g. 0402) may not be suitable in the actual application. 9 www.national.com LP3997 Applications Information (Continued) perature range of -55˚C to +125˚C, will only vary the capacitance to within ± 15%. The capacitor type X5R has a similar tolerance over a reduced temperature range of -55˚C to +85˚C. Most large value ceramic capacitors, larger than 1µF are manufactured with Z5U or Y5V temperature characteristics. Their capacitance can drop by more than 50% as the temperature goes from 25˚C to 85˚C. Therefore X7R is recommended over Z5U and Y5V in applications where the ambient temperature will change significantly above or below 25˚C. Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more expensive when comparing equivalent capacitance and voltage ratings in the 1µF to 4.7µF range. Another important consideration is that tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly ) than a ceramic capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about 2:1 as the temperature goes from 25˚C down to -40˚C, so some guard band must be allowed. 20092940 FIGURE 1. Graph Showing a Typical Variation in Capacitance vs DC Bias The ceramic capacitor’s capacitance can vary with temperature. The capacitor type X7R, which operates over a tem- www.national.com 10 LP3997 Micropower 250mA CMOS LDO Regulator with Error Flag / Power-On-Reset Physical Dimensions inches (millimeters) unless otherwise noted LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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