LPV531MKX

LPV531 Programmable Micropower CMOS Input, Rail-to-Rail Output Operational Amplifier May 2006 LPV531 Programmable Micropower CMOS Input, Rail-to-Rail Output Operational Amplifier General Description The LPV531 is an extremely versatile operational amplifier. A single external resistor gives the system designer the ability to define the quiescent current, gain bandwidth product and output short circuit current. This innovative feature gives the system designer a method to dynamically switch the power level to optimize the performance of the op amp and meet the system design requirements. The LPV531 can be tailored to a wide variety of applications. It offers the system designer the ability to dynamically trade off supply current for bandwidth by adjusting the current drawn from the ISEL pin using a DAC or switching in different value resistors in series with the ISEL pin. The LPV531 is capable of operating from 73 kHz, consuming only 5 µA, to as fast as 4.6 MHz, consuming only 425 µA. The input offset voltage is relatively independent and therefore is not significantly affected by the chosen power level. Utilizing a CMOS input stage, the LPV531 achieves an input bias current of 50 fA and a common mode input voltage which extends from the negative rail to within 1.2V of the positive supply. The LPV531’s rail-to-rail class AB output stage enables this op amp to offer maximum dynamic range at low supply voltage. Offered in the space saving 6-pin TSOT23 package, the LPV531 is ideal for use in handheld electronics and portable applications. The LPV531 is manufactured using National’s advanced VIP50 process. A fixed supply current/gain bandwidth is available upon request. Features (Typical 5V supply, unless otherwise noted.) n Supply voltage 2.7V to 5.5V n Dynamic power mode setting n Continuously programmable supply current — Range 5 µA to 425 µA n Continuously programmable bandwidth — Range 73 kHz to 4.6 MHz n Input common mode voltage range −0.3V to 3.8V n CMRR 95 dB n Rail-to-rail output voltage swing n Input offset voltage 1 mV Applications n AC coupled circuits n Portable instrumentation n Active filters Typical Application 20132335 AC Coupled Application © 2006 National Semiconductor Corporation DS201323 www.national.com LPV531 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Human Body Model Machine Model VIN Differential Supply Voltage (V+ - V−) Storage Temperature Range Junction Temperature (Note 5) 2000V 200V Soldering Information Infrared or Convection (20 sec) Wave Soldering Lead Temp. (10 sec) 235˚C 260˚C Operating Ratings (Note 1) Operating Temperature Range Supply Voltage (V – V ) Package Thermal Resistance (θJA ) (Note 4) 6-Pin TSOT23 171˚C/W + − ± 2V 6V −65˚C to +150˚C +150˚C −40˚C to +85˚C 2.7V to 5.5V 5V Full Power Mode Electrical Characteristics Unless otherwise specified, all limits are guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2, ISEL pin connected to V−, RL = 100 kΩ. Boldface limits apply at the temperature extremes. Symbol VOS ∆VOS TC VOS IB CMRR PSRR CMVR AVOL Parameter Input Offset Voltage Input Offset Voltage Difference (VOS in Full Power Mode) − (VOS in Low Power Mode) Input Offset Average Drift Input Bias Current Common Mode Rejection Ratio Power Supply Rejection Ratio Input Common Mode Voltage Range Large Signal Voltage Gain (Note 8) (Note 9) VCM Stepped from 0V to 3.5V V+ = 2.7V to 5.5V VCM = 1V CMRR ≥ 50 dB VO = 0.5V to 4.5V RL = 1 kΩ to V+/2 VO = 0.5V to 4.5V RL = 10 kΩ to V+/2 VO = 0.5V to 4.5V RL = 100 kΩ, to V+/2 VO Output Swing High RL = 1 kΩ to V+/2 RL = 10 kΩ to V+/2 RL = 100 kΩ to V+/2 Output Swing Low RL = 1 kΩ to V+/2 RL = 10 kΩ to V+/2 RL = 100 kΩ to V+/2 ISC Output Short Circuit Current (Note 3) Sourcing, VO = 2.5V VID = 100 mV Sinking, VO = 2.5V VID = −100 mV IS Supply Current 13 10 72 68 74 70 −0.3 87 84 104 100 108 104 96 114 128 120 55 30 160 105 95 −15 24 425 530 650 180 195 80 85 50 60 210 230 120 135 120 135 −8 −3 mV mV from V+ Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units ±1 ± 0.1 ±2 .05 95 90 ± 4.5 ±5 ±2 mV mV µV/˚C ± 10 ± 100 pA dB dB 3.8 V dB mA µA www.national.com 2 LPV531 5V Full Power Mode Electrical Characteristics Symbol SR GBW en in Parameter Slew Rate (Note 7) Gain Bandwidth Product Input-Referred Voltage Noise Input-Referred Current Noise Conditions AV = +1, VIN = 0.5V to 3.5V CL = 15 pF CL = 20 pF f = 100 kHz f = 1 kHz f = 1 kHz (Continued) Unless otherwise specified, all limits are guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2, ISEL pin connected to V−, RL = 100 kΩ. Boldface limits apply at the temperature extremes. Min (Note 6) 1.55 1 Typ (Note 5) 2.5 4.6 20 28 6 Max (Note 6) Units V/µs MHz nV/ fA/ 5V Mid-Power Mode Electrical Characteristics Unless otherwise specified, all limits are guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2, ISEL pin connected to V− through 100 kΩ resistor, RL = 100 kΩ. Boldface limits apply at the temperature extremes. Symbol VOS ∆VOS TC VOS IB CMRR PSRR CMVR AVOL Parameter Input Offset Voltage Input Offset Voltage Difference (VOS in Full Power Mode) − (VOS in Low Power Mode) Input Offset Average Drift Input Bias Current Common Mode Rejection Ratio Power Supply Rejection Ratio Input Common Mode Voltage Range Large Signal Voltage Gain (Note 8) (Note 9) VCM Stepped from 0V to 3.5V V+ = 2.7V to 5.5V CMRR ≥ 50 dB VO = 0.5V to 4.5V RL = 10 kΩ to V+/2 VO = 0.5V to 4.5V RL = 100 kΩ to V+/2 VO Output Swing High RL = 10 kΩ to V+/2 RL = 100 kΩ to V+/2 Output Swing Low RL = 10 kΩ to V+/2 RL = 100 kΩ to V+/2 ISC Output Short Circuit Current (Note 3) Sourcing, VO = 2.5V VID = 100 mV Sinking, VO = 2.5V VID = −100 mV IS SR GBW en Supply Current Slew Rate (Note 7) Gain Bandwidth Product Input-Referred Voltage Noise AV = +1, VIN = 0.5V to 3.5V CL = 20 pF f = 100 kHz f = 1 kHz 180 100 1.5 1 72 68 72 68 −0.3 86 82 100 98 96 114 115 65 150 105 −4 4 42 250 625 55 60 55 62 160 175 110 120 165 180 120 135 −1.5 −1 dB Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units ±1 ± 0.1 ±2 .05 92 88 ± 4.5 ±5 ±2 mV mV µV/˚C ± 10 ± 100 pA dB dB 3.8 V mV from V+ mV mA µA V/ms kHz nV/ 3 www.national.com LPV531 5V Mid-Power Mode Electrical Characteristics Symbol in Parameter Input-Referred Current Noise f = 1 kHz Conditions (Continued) Unless otherwise specified, all limits are guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2, ISEL pin connected to V− through 100 kΩ resistor, RL = 100 kΩ. Boldface limits apply at the temperature extremes. Min (Note 6) Typ (Note 5) 6 Max (Note 6) Units fA/ 5V Low Power Mode Electrical Characteristics Unless otherwise specified, all limits are guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2, ISEL connected to V− through 1 MΩ resistor, RL = 100 kΩ. Boldface limits apply at the temperature extremes. Symbol VOS ∆VOS TC VOS IB CMRR PSRR CMVR AVOL Parameter Input Offset Voltage Input Offset Voltage Difference (VOS in Full Power Mode) − (VOS in Low Power Mode) Input Offset Average Drift Input Bias Current Common Mode Rejection Ratio Power Supply Rejection Ratio Input Common-Mode Voltage Range Large Signal Voltage Gain (Note 8) (Note 9) VCM Stepped from 0V to 3.5V V = 2.7V to 5.5V CMRR ≥ 50 dB VO = 0.5V to 4.5V RL = 10 kΩ to V+/2 VO = 0.5V to 4.5V RL = 100 kΩ to V+/2 VO Output Swing High RL = 10 kΩ to V+/2 RL = 100 kΩ to V+/2 Output Swing Low RL = 10 kΩ to V+/2 RL = 100 kΩ to V+/2 ISC Output Short Circuit Current (Note 3) Sourcing, VO = 2.5V VID = 100 mV Sinking, VO = 2.5V VID = −100 mV IS SR GBW en in Supply Current Slew Rate (Note 7) Gain Bandwidth Product Input-Referred Voltage Noise Input-Referred Current Noise AV = +1, VIN = 0.5V to 3.5V CL = 20 pF f = 1 kHz f = 1 kHz 10 8 80 35 80 78 + Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units ±1 ± 0.1 ±2 .05 72 68 72 68 −0.3 90 100 175 115 250 150 −400 300 5 28 73 200 60 90 85 ± 4.5 ±5 ±2 mV mV µV/˚C ± 10 ± 100 pA dB dB 3.8 V dB 400 1600 200 230 1200 1800 165 180 −100 −35 mV from V+ mV µA 7 8 µA V/ms kHz nV/ fA/ www.national.com 4 LPV531 Power Select Electrical Characteristics Unless otherwise specified, all limits are guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2, RL = 100 kΩ. Boldface limits apply at the temperature extremes. Symbol tLF tFL VREXT RINT Parameter Time from Low Power Mode to Full Power Mode Time from Full Power Mode to Low Power Mode Voltage @ ISEL Pin ISEL Pin Left Open 100 9 Conditions Min (Note 6) Typ (Note 5) 210 500 110 11 125 14.5 Max (Note 6) Units ns ns mV kΩ Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables. Note 2: Human Body Model is 1.5 kΩ in series with 100 pF. Machine Model is 0Ω in series with 200 pF. Note 3: Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150˚C. Note 4: The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board. Note 5: Typical values represent the most likely parametric norm. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: Slew rate is the slower of the rising or falling slew rates. Note 8: Offset voltage average drift is determined by dividing the change in VOS at temperature extremes into the total temperature change. Note 9: Guaranteed by design. Connection Diagram 6-Pin TSOT23 20132316 Top View Ordering Information Package 6-Pin TSOT23 Part Number LPV531MK LPV531MKX Package Marking AV2A Transport Media 1k Units Tape and Reel 3k Units Tape and Reel NSC Drawing MK06A 5 www.national.com LPV531 Unless otherwise specified, V+ = 5V, TJ = 25˚C. For Full Power Mode the ISEL pin is connected to V ; for Mid-Power Mode the ISEL pin is connected to V− through a 100 kΩ resistor; for Low Power Mode the ISEL pin is connected to V− through a 1 MΩ resistor. − Typical Performance Characteristics Supply Current vs. ISEL Supply Current vs. ISEL 20132319 20132342 Supply Current vs. Supply Voltage (Full Power Mode) Supply Current vs. Supply Voltage (Mid Power Mode) 20132324 20132317 Supply Current vs. Supply Voltage (Low Power Mode) Gain and Phase vs. Frequency (Full Power Mode) 20132318 20132330 www.national.com 6 LPV531 Typical Performance Characteristics Unless otherwise specified, V+ = 5V, TJ = 25˚C. For Full Power Mode the ISEL pin is connected to V−; for Mid-Power Mode the ISEL pin is connected to V− through a 100 kΩ resistor; for Low Power Mode the ISEL pin is connected to V− through a 1 MΩ resistor. (Continued) Gain and Phase vs. Frequency (Mid Power Mode) Gain and Phase vs. Frequency (Low Power Mode) 20132331 20132329 Input Offset Voltage vs. Common Mode Voltage (Full Power Mode) Input Offset Voltage vs. Common Mode Voltage (Mid Power Mode) 20132360 20132359 Input Offset Voltage vs. Common Mode Voltage (Low Power Mode) CMRR vs. Frequency 20132358 20132362 7 www.national.com LPV531 Typical Performance Characteristics Unless otherwise specified, V+ = 5V, TJ = 25˚C. For Full Power Mode the ISEL pin is connected to V−; for Mid-Power Mode the ISEL pin is connected to V− through a 100 kΩ resistor; for Low Power Mode the ISEL pin is connected to V− through a 1 MΩ resistor. (Continued) PSRR vs. Frequency (Full Power Mode) PSRR vs. Frequency (Mid Power Mode) 20132361 20132373 PSRR vs. Frequency (Low Power Mode) Small Signal Non-Inverting Response (Full Power Mode) 20132346 20132374 Small Signal Non-Inverting Response (Mid Power Mode) Small Signal Non-Inverting Response (Low Power Mode) 20132350 20132354 www.national.com 8 LPV531 Typical Performance Characteristics Unless otherwise specified, V+ = 5V, TJ = 25˚C. For Full Power Mode the ISEL pin is connected to V−; for Mid-Power Mode the ISEL pin is connected to V− through a 100 kΩ resistor; for Low Power Mode the ISEL pin is connected to V− through a 1 MΩ resistor. (Continued) Large Signal Non-Inverting Response (Full Power Mode) Large Signal Non-Inverting Response (Mid Power Mode) 20132347 20132351 Large Signal Non-Inverting Response (Low Power Mode) Small Signal Inverting Pulse Response (Full Power Mode) 20132355 20132348 Small Signal Inverting Pulse Response (Mid Power Mode) Small Signal Inverting Pulse Response (Low Power Mode) 20132352 20132356 9 www.national.com LPV531 Typical Performance Characteristics Unless otherwise specified, V+ = 5V, TJ = 25˚C. For Full Power Mode the ISEL pin is connected to V−; for Mid-Power Mode the ISEL pin is connected to V− through a 100 kΩ resistor; for Low Power Mode the ISEL pin is connected to V− through a 1 MΩ resistor. (Continued) Large Signal Inverting Response (Full Power Mode) Large Signal Inverting Response (Mid Power Mode) 20132349 20132353 Large Signal Inverting Response (Low Power Mode) ISINK vs. Supply Current 20132357 20132344 ISOURCE vs. Supply Current Gain Bandwidth Product vs. ISEL 20132343 20132345 www.national.com 10 LPV531 Typical Performance Characteristics Unless otherwise specified, V+ = 5V, TJ = 25˚C. For Full Power Mode the ISEL pin is connected to V−; for Mid-Power Mode the ISEL pin is connected to V− through a 100 kΩ resistor; for Low Power Mode the ISEL pin is connected to V− through a 1 MΩ resistor. (Continued) Input Referred Voltage Noise vs. Frequency Phase Margin vs. Capacitive Load 20132369 20132370 11 www.national.com LPV531 Application Information The LPV531 is an extremely versatile operational amplifier because performance and power consumption can be adjusted during operation. This provides a method to dynamically optimize the supply current, the bandwidth and the output short circuit current in the application. The power level can be set by the current drawn from the ISEL pin according to the application performance requirements. CIRCUIT TOPOLOGY As shown in Figure 1, the LPV531 contains two internal bias reference generators that deliver a reference current (IREF) to the amplifier core. The programmable bias generator gen- erates a 110 mV reference voltage (VINT). This reference voltage is converted into a programmable reference current (IPROG) through the internal resistor (RINT) and the external resistor (REXT) connected to the ISEL pin. Internally, IPROG is added to the output current from the low power bias generator (ISTDB). When the ISEL pin is left floating, IPROG equals zero and the IREF equals ISTDB. The value of ISTDB is such that in this mode the power supply current is below 1 µA. In this 1 µA power mode, the LPV531 is functional but performance over the full temperature range is not guaranteed. The 1 µA power mode operation is only recommended for applications with a temperature range between 0 and 70˚C. 20132337 FIGURE 1. Simplified Schematic POWER MODE CONTROL To illustrate typical configurations three possible solutions to control the power mode(s) of the LPV531 will be described. 1. Single Power Mode If the application requires one single power mode for the LPV531, then the easiest way to achieve this is to connect a resistor (REXT) from the ISEL pin to V−. Together with the internal circuitry, REXT will determine the current drawn from the ISEL pin. Internally the ISEL pin is connected to an 11 kΩ internal series resistor (RINT) which is biased at VINT = 110 mV. This set up is illustrated in Figure 2. For a desired supply current, bandwidth, short circuit current, or load resistance, the required value of REXT can be calculated using the equations in the section “DETERMINING THE ISEL LEVELS”. 20132336 FIGURE 2. Single Power Mode www.national.com 12 LPV531 Application Information 2. Switched Discrete Power Modes (Continued) In this typical application, the LPV531 can operate at two (or more) power modes in order to fulfill the demands of the design. One of the modes is used to save power. It is a low power mode which is set by using a large resistor. The others are the higher power modes which are set by one or more smaller resistors. The larger resistor that sets the low power mode can be permanently connected while the smaller resistor(s) can be switched in parallel to set the high power mode(s). This configuration allows the designer to get the required performance from the LPV531 when needed. The output of the resistive voltage divider should have an impedance that is small compared to the value of RINT to allow a linear control of the power level. Therefore, REXT2 needs to have a value in the order of RINT/10 and REXT1 = 125 mV * REXT2 /VCONTROL,MAX. For 1 µA power mode operation, these resistor values will divide the maximum voltage of VCONTROL to 125 mV. DETERMINING THE REXT VALUES AND ISEL LEVELS To determine the value of REXT that is needed for a certain supply current or bandwidth, the following equations can be used: or 20132363 For the power modes characterized in this datasheet, these formulas lead to the values in Table 1. These values deviate slightly from the typical values presented in the electrical characteristic tables. The values in Table 1 are calculated using approximated linear equations while the values in the Electrical Characteristics table are the result of characterization measurement procedures. TABLE 1. Values for Characterized Power Modes REXT 1Ω 100 kΩ 1 MΩ ISEL 9 µA 0.9 µA 99 nA Supply Current 400 µA 40 µA 5.3 µA Gain Bandwidth Product 4.6 MHz 460 kHz 60 kHz FIGURE 3. Power Modes Set by Resistors and Switches The switches shown in Figure 3 can be easily implemented with an open drain I/O port of an ASIC or any other simple pull down switch. 3. DAC Controlled Power Modes For voltage controlled filter applications, where control of the gain bandwidth is essential, a DAC and a resistive voltage divider can be used. In this application the current drawn from the ISEL pin is controlled by the DAC. The DAC’s total output range is divided to match the V− to VINT voltage which has the range of 0-110 mV. To calculate the REXT which will allow the LPV531 to deliver a minimum output current at all times and over all temperatures, use the following equations: If the output has to be kept at V+/2 for a known load resistance, the required REXT can be calculated with the following equations: 20132364 FIGURE 4. DAC Controlled Power Mode Configurations 13 www.national.com LPV531 Application Information (Continued) For the characterized power modes these equations lead to the minimum values in Table 2 below. TABLE 2. Minimum Values for Characterized Power Modes REXT 1Ω 100 kΩ 1 MΩ ISEL 9 µA 0.9 µA 99 nA ISC 3 mA 300 µA 55 µA RLOAD 770Ω 7.8 kΩ 70.8 kΩ a low power AC amplifier design. The values of the gain resistors, bias resistors, and coupling capacitors can be chosen independently of the turn-on and stabilization time. The smallest load resistor that the LPV531 can drive when in low power mode is 70.8 kΩ, as shown in Table 2. When driving smaller loads, such as the 10 kΩ load resistor used in the Electrical Characteristics table specification, the output swing in the low power mode is limited. If the application requires a 10 kΩ load then it is not recommended to use the LPV531 in low power mode. 20132334 ISEL SENSITIVITY The ISEL pin is a current reference that directly affects the entire internal bias condition. Therefore, the ISEL pin is very sensitive to parasitic signal coupling. In order to protect the ISEL pin from unwanted distortion, it is important to route the PCB layout such that there is as little coupling between the ISEL pin and the output or other signal traces as possible. FIGURE 5. Inverting AC Coupled Application PROGRAMMABLE POWER LEVELS AND THE EFFECTS OF STABILITY COMPENSATION METHODS USING EXTERNAL COMPONENTS In some op amp application circuits, external capacitors are used to improve the stability of the feedback loop around the amplifier. When using the programmable power level feature of the LPV531 such stability improvement methods may not work. This is related to the internal frequency compensation method applied inside the LPV531. Figure 6 shows the bode plot of the frequency response of the LPV531. The gain-bandwidth product is determined by the transconductance of the input stage (gm,in) and the internal Miller compensation capacitor (Cm). The nondominant pole is formed by the transconductance of the output stage (gm,out) and the load capacitance connected to the output of the LPV531 (Cl). The frequency response crosses the frequency axis with a single-pole slope (20 dB/decade). This ensures the stability of feedback loops formed around the LPV531. Typical Application AC COUPLED CIRCUITS The programmable power mode makes the LPV531 ideal for AC coupled circuits where the circuit needs to be kept active to maintain a quiescent charge on the coupling capacitors with minimal power consumption. Figure 5 shows the schematic of an inverting AC coupled amplifier using the LPV531 with the ISEL pin controlled by I/O ports of a microcontroller. The advantage of the low power active mode for AC coupled amplifiers is the elimination of the time needed to reestablish a quiescent operating point when the amplifier is switched to full power mode. When an amplifier without a low power active mode is used in low power applications, there are two ways to minimize power consumption. The first method turns off the amplifier by switching off power to the op amp using a transistor switch. The second method uses an amplifier with a shutdown pin. Both of these methods have the problem of allowing the coupling capacitors, C1 and C2 to discharge the quiescent DC voltage stored on them when in the shutdown state. When the amplifier is turned on again, the quiescent DC voltages must reestablish themselves. During this time, the amplifier’s output is not usable because the output signal is a mixture of the amplified input signal and the charging voltage on the coupling capacitors. The settling time can range from a several milliseconds to several seconds depending on the resistor and capacitor values. When the LPV531 is placed into the low power mode, the power consumption is minimal but the amplifier is active to maintain the quiescent DC voltage on the coupling capacitors. The transition back to the operational high power mode is fast, within a few hundred nanoseconds. The active low power mode of the LPV531 separates two critical aspects of 20132371 FIGURE 6. Bode Plot of the Frequency Response www.national.com 14 LPV531 Typical Application (Continued) the LPV531 can drive sufficient capacitive loads without the need for an external isolation resistor. When the load capacitance is increased, the pole at the output will shift to lower frequencies. Eventually, the output pole will shift below the unity gain frequency. This will cause the frequency characteristic to move through the 0 dB axis with a slope of 40 dB/decade and a feedback loop formed around the LPV531 may oscillate. The LPV531 is internally compensated in such a manner that it will be stable for load capacitances up to 100 pF. When the power setting of the LPV531 is reduced, both the transconductance of the input stage and the transconductance of the output stage will scale lineary with the power level to lower levels. This means that both the unity gain frequency and the pole to the transconductance of the output stage and the load capacitance will move down. Because both the unity gain frequency and the output pole move down in similar amounts, the stability of the LPV531 is still the same. This is shown in Figure 7 which gives the phase margin as a function of the load capacitance in the low power mode (5 µA), mid-power mode (40 µA) and high power mode (400 µA). Though the power level and unity gain frequency move with about two decades, the phase margin as a function of the capacitive load is hardly affected. This means that when the LPV531 is stable in an application circuit with a given load capacitance in the high power mode, the circuit will remain stable with the same capacitive load connected when the power level is reduced. 20132325 FIGURE 8. Compensation by Isolation Resistor INPUT CAPACITANCE AND FEEDBACK CIRCUIT ELEMENTS The LPV531 has a very low input bias current (50 fA). To obtain this performance a large CMOS input stage is used, which adds to the input capacitance of the op amp, CIN. Though this does not affect the DC and low frequency performance, at higher frequencies the input capacitance interacts with the input and the feedback impedances to create a pole, which results in lower phase margin and gain peaking. The gain peaking can be reduced by carefully choosing the appropriate feedback resistor, as well as, by using a feedback capacitance, CF. For example, in the inverting amplifier shown in Figure 9, if CIN and CF are ignored and the open loop gain of the op amp is considered infinite then the gain of the circuit is −R2/R1. An op amp, however, usually has a dominant pole, which causes its gain to drop with frequency. Hence, this gain is only valid for DC and low frequency. To understand the effect of the input capacitance coupled with the non-ideal gain of the op amp, the circuit needs to be analyzed in the frequency domain using a Laplace transform. 20132370 FIGURE 7. Phase Margin vs. Capacitive Load Figure 8 shows a method that is sometimes used to allow an op amp to drive larger capacitors than it was originally designed to do. The capacitive load is isolated from the output of the op amp with an isolation resistor (RISO). This moves the output pole, that was originally located at gm,out/Cl, to a higher frequency. This method requires that the value of RISO is in the same order of magnitude as 1/gm,out. For the LPV531, this method will not be effective when used across a broad range of power levels. This is because the high power mode will require a relatively small value for RISO, while such a small RISO will be ineffective at low power levels. In most applications this should not be a problem as 20132338 FIGURE 9. Inverting Amplifier 15 www.national.com LPV531 Typical Application (Continued) For simplicity, the op amp is modelled as an ideal integrator with a unity gain frequency of A0 . Hence, its transfer function (or gain) in the frequency domain is A0/s. Solving the circuit equations in the frequency domain, ignoring CF for the moment, results in the following equation for the gain: AV = −R2/R1, or alternatively R2 = −AVR1 It is the presence of pairs of poles in Equation (2) that causes gain peaking. In order to eliminate this effect, the poles should be placed in Butterworth position, since poles in Butterworth position do not cause gain peaking. To achieve a Butterworth pair, the quantity under the square root in Equation 2 should be set to equal −1. Using this fact and the relation between R1 and R2, the optimum value for R1 can be found. This is shown in Equation (3). If R1 is chosen to be larger than this optimum value, gain peaking will occur. (1) It can be inferred from the denominator of the transfer function that it has two poles, whose expressions can be obtained by solving for the roots of the denominator: (3) In Figure 9, CF is added to compensate for input capacitance and to increase stability. In addition, CF reduce or eliminates the gain peaking that can be caused by having a larger feedback resistor. (2) Equation (2) shows that as the values of R1 and R2 are increased, the magnitude of the poles is reduced, and hence the bandwidth of the amplifier is decreased. Furthermore, R1 and R2 are related by the gain of the amplifier. www.national.com 16 LPV531 Programmable Micropower CMOS Input, Rail-to-Rail Output Operational Amplifier Physical Dimensions inches (millimeters) unless otherwise noted 6-Pin TSOT23 NS Package Number MK06A National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. 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