MM74C221N

MM54C221 MM74C221 Dual Monostable Multivibrator February 1988 MM54C221 MM74C221 Dual Monostable Multivibrator General Description The MM54C221 MM74C221 dual monostable multivibrator is a monolithic complementary MOS integrated circuit Each multivibrator features a negative-transition-triggered input and a positive-transition-triggered input either of which can be used as an inhibit input and a clear input Once fired the output pulses are independent of further transitions of the A and B inputs and are a function of the external timing components CEXT and REXT The pulse width is stable over a wide range of temperature and VCC Pulse stability will be limited by the accuracy of external timing components The pulse width is approximately defined by the relationship tW(OUT) CEXT REXT For further information and applications see AN-138 Features Y Y Y Y Wide supply voltage range Guaranteed noise margin High noise immunity Low power TTL compatibility 4 5V to 15V 1 0V 0 45 VCC (typ ) fan out of 2 driving 74L Connection Diagrams Timing Component Dual-In-Line Package TL F 5904 – 1 TL F 5904 – 2 Top View Order Number MM54C221 or MM74C221 Truth Table Inputs Clear L X X H H A X H X L B X X L Q L L L Outputs Q H H H H L e e e e e e e u v X u H High level Low level Transition from low to high Transition from high to low One high level pulse One low level pulse Irrelevant v C1995 National Semiconductor Corporation TL F 5904 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Voltage at Any Pin Operating Temperature Range MM54C221 MM74C221 Storage Temperature Range b 0 3V to VCC a 0 3V b 55 C to a 125 C b 40 C to a 85 C b 65 C to a 150 C Power Dissipation Dual-In-Line Small Outline Operating VCC Range Absolute Maximum VCC REXT t 80 VCC (X) Lead Temperature (Soldering 10 seconds) 700 mW 500 mW 4 5V to 15V 18V 260 C DC Electrical Characteristics Max Symbol CMOS to CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) IIN(1) IIN(0) ICC ICC Logical ‘‘1’’ Input Voltage Logical ‘‘0’’ Input Voltage Logical ‘‘1’’ Output Voltage Logical ‘‘0’’ Output Voltage Logical ‘‘1’’ Input Current Logical ‘‘0’’ Input Current Supply Current (Standby) Supply Current (During Output Pulse) Parameter min limits apply across temperature range unless otherwise noted Conditions Min Typ Max Units VCC e 5V VCC e 10V VCC e 5V VCC e 10V VCC e 5V IO e b10 mA VCC e 10V IO e b10 mA VCC e 5V IO e a 10 mA VCC e 10V IO e a 10 mA VCC e 15V VIN e 15V VCC e 15V VIN e 0V VCC e 15V REXT e % Q1 Q2 e Logic ‘‘0’’ (Note 3) VCC e 15V Q1 e Logic ‘‘1’’ Q2 e Logic ‘‘0’’ (Figure 4) VCC e 5V Q1 e Logic ‘‘1’’ Q2 e Logic ‘‘0’’ (Figure 4) 35 80 15 20 45 90 05 1 0 005 b1 0 b 0 005 V V V V V V V V mA mA 300 mA mA mA 30 mA 10 0 05 15 2 0 01 Leakage Current at R CEXT Pin CMOS LPTTL Interface VIN(1) VIN(0) VOUT(1) VOUT(0) Logical ‘‘1’’ Input Voltage Logical ‘‘0’’ Input Voltage Logical ‘‘1’’ Output Voltage Logical ‘‘0’’ Output Voltage VCC e 15V VCEXT e 5V 54C VCC e 4 5V 74C VCC e 4 75V 54C VCC e 4 5V 74C VCC e 4 75V 54C VCC e 4 5V IO e b360 mA 74C VCC e 4 75V IO e b360 mA 54C VCC e 4 5V IO e 360 mA 74C VCC e 4 75V IO e 360 mA VCC b 1 5 VCC b 1 5 08 08 24 24 04 04 V V V V V V V V Output Drive (See 54C 74C Family Characteristics Data Sheet) (Short Circuit Current) ISOURCE ISOURCE ISINK ISINK Output Source Current (P-Channel) Output Source Current (P-Channel) Output Sink Current (N-Channel) Output Sink Current (N-Channel) VCC e 5V TA e 25 C VOUT e 0V VCC e 10V TA e 25 C VOUT e 0V VCC e 5V TA e 25 C VOUT e VCC VCC e 10V TA e 25 C VOUT e VCC b 1 75 b8 mA mA mA mA 1 75 8 2 AC Electrical Characteristics Symbol tpd A B tpd CL tS tW(A B) tW(CL) tW(OUT) Parameter Propagation Delay from Trigger Input (A B) to Output Q Q Propagation Delay from Clear Input (CL) to Output Q Q Time Prior to Trigger Input (A B) that Clear must be Set Trigger Input (A B) Pulse Width Clear Input (CL) Pulse Width Q or Q Output Pulse Width TA e 25 C CL e 50 pF unless otherwise noted Conditions VCC e 5V VCC e 10V VCC e 5V VCC e 10V VCC e 5V VCC e 10V VCC e 5V VCC e 10V VCC e 5V VCC e 10V VCC e 5V REXT e 10k CEXT e 0 pF VCC e 10V REXT e 10k CEXT e 0 pF VCC e 15V REXT e 10k CEXT e 0 pF VCC e 5V REXT e 10k CEXT e 1000 pF (Figure 1) VCC e 10V REXT e 10k CEXT e 1000 pF (Figure 1) VCC e 15V REXT e 10k CEXT e 1000 pF (Figure 1) VCC e 5V REXT e 10k CEXT e 0 1 mF (Figure 2) VCC e 10V REXT e 10k CEXT e 0 1 mF (Figure 2) VCC e 15V REXT e 10k CEXT e 0 1 mF (Figure 2) 90 90 89 900 900 900 150 60 150 70 150 70 Min Typ 250 120 250 120 50 20 50 30 50 30 900 350 320 10 6 10 98 1020 1000 990 50 25 16 7 12 2 11 10 8 1200 1100 1100 150 65 45 90 90 15 5 25 Max 500 250 500 250 Units ns ns ns ns ns ns ns ns ns ns ns ns ns ms ms ms ms ms ms X X X % % pF pF RON ON Resistance of Transistor between R CEXT to CEXT Output Duty Cycle VCC e 5V (Note 4) VCC e 10V (Note 4) VCC e 15V (Note 4) R e 10k C e 1000 pF R e 10k C e 0 1 mF (Note 5) R CEXT Input (Note 2) Any Other Input (Note 2) CIN Input Capacitance AC Parameters are guaranteed by DC correlated testing Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation Note 2 Capacitance is guaranteed by periodic testing Note 3 In Standby (Q e Logic ‘‘0’’) the power dissipated equals the leakage current plus VCC REXT Note 4 See AN-138 for detailed explanation RON Note 5 Maximum output duty cycle e REXT REXT a 1000 3 Typical Performance Characteristics 0% Point pulse width At At At At At At VCC e 5V VCC e 10V VCC e 15V VCC e 5V VCC e 10V VCC e 15V TW e 10 6 ms TW e 10 ms TW e 9 8 m s 90% of units 95% of units 98% of units Percentage of units within a 4% TL F 5904 – 3 FIGURE 1 Typical Distribution of Units for Output Pulse Width 0% Point pulse width At At At At At At VCC e 5V VCC e 10V VCC e 15V VCC e 5V VCC e 10V VCC e 15V TW e 1020 ms TW e 1000 ms TW e 982 ms 95% of units 97% of units 98% of units Percentage of units within a 4% TL F 5904 – 4 FIGURE 2 Typical Distribution of Units for Output Pulse Width TL F 5904 – 5 TL F 5904 – 6 FIGURE 3 Typical Variation in Output Pulse Width vs Temperature FIGURE 4 Typical Power Dissipation per Package 4 Switching Time Waveforms tr e tf e 20 ns TL F 5904 – 7 Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54C221J or MM74C221C NS Package Number J16A 5 MM54C221 MM74C221 Dual Monostable Multivibrator Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number MM54C221N or MM74C221N NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National 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