MM74C48

MM54C48 MM74C48 BCD-to-7 Segment Decoder March 1988 MM54C48 MM74C48 BCD-to-7 Segment Decoder General Description The MM54C48 MM74C48 BCD-to-7 segment decoder is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors Seven NAND gates and one driver are connected in pairs to make binary-coded decimal (BCD) data and its complement available to the seven decoding AND-OR-INVERT gates The remaining NAND gate and three input buffers provide test-blanking input ripple-blanking output and ripple-blanking inputs Features Wide supply voltage range 3 0V to 15V Guaranteed noise margin 1 0V Y High noise immunity 0 45 VCC (typ ) Y Low power fan out of 2 TTL compatibility driving 74L Y High current sourcing output (up to 50 mA) Y Ripple blanking for leading or trailing zeros (optional) Y Lamp test provision Y Y Connection Diagram Dual-In-Line Package TL F 5883 – 1 Top View Order Number MM54C48 or MM74C48 Segment Identification Numerical Designations and Resultant Displays TL F 5883–2 TL F 5883 – 3 C1995 National Semiconductor Corporation TL F 5883 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Voltage at Any Pin Operating Temperature Range MM54C48 MM74C48 Storage Temperature Range b 0 3V to VCC a 0 3V b 55 C to a 125 C b 40 C to a 85 C b 65 C to a 150 C Power Dissipation Dual-In-Line Small Outline Operating VCC Range Absolute Maximum VCC Lead Temperature (Soldering 10 seconds) 700 mW 500 mW 3 0V to 15V 18V 260 C DC Electrical Characteristics Min Symbol CMOS to CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) IIN(1) IIN(0) ICC VIN(1) VIN(0) VOUT(1) VOUT(0) Logical ‘‘1’’ Input Voltage Parameter Max limits apply across temperature range unless otherwise noted Conditions Min Typ Max Units VCC e 5 0V VCC e 10V VCC e 5 0V VCC e 10V VCC e 5 0V IO e b10 mA VCC e 10V IO e b10 mA VCC e 5 0V IO e 10 mA VCC e 10V IO e 10 mA VCC e 15 0V VIN e 15V VCC e 15 0V VIN e 0V VCC e 15V 54C VCC e 4 5V 74C VCC e 4 75V 54C VCC e 4 5V 74C VCC e 4 75V 54C VCC e 4 5V IO e b50 mA 74C VCC e 4 75V IO e b50 mA 54C VCC e 4 5V IO e 360 mA 74C VCC e 4 75V IO e 360 mA 35 80 15 20 45 90 05 10 0 005 b1 0 b 0 005 V V V V V V V V mA mA 300 mA Logical ‘‘0’’ Input Voltage Logical ‘‘1’’ Output Voltage (RB Output Only) Logical ‘‘0’’ Output Voltage Logical ‘‘1’’ Input Current Logical ‘‘0’’ Input Current Supply Current 10 0 05 CMOS LPTTL INTERFACE Logical ‘‘1’’ Input Voltage VCC b 1 5 VCC b 1 5 08 08 24 24 04 04 V V V V V V V V Logical ‘‘0’’ Input Voltage Logical ‘‘1’’ Output Voltage (RB Output Only) Logical ‘‘0’’ Output Voltage OUTPUT DRIVE (See 54C 74C Family Characteristics Data Sheet) ISOURCE ISINK ISINK ISOURCE Output Source Current (P-Channel)(RB Output Only) Output Sink Current (N-Channel) Output Sink Current (N-Channel) Output Source Current (NPN Bipolar) VCC e 4 75V VOUT e 0 4V VCC e 10V VOUT e 0 5V VCC e 5 0V VOUT e VCC TA e 25 C VCC e 10V VOUT e VCC TA e 25 C VCC e 5 0V VOUT e 3 4V VCC e 5 0V VOUT e 3 0V VCC e 10V VOUT e 8 4V VCC e 10V VOUT e 8 0V b 20 b 0 80 b4 0 mA mA mA mA mA mA mA mA 1 75 80 b 20 36 16 b 50 b 65 b 50 b 65 Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation Note 2 Capacitance is guaranteed by periodic testing Note 3 CPD determines the no load AC power consumption of any CMOS device For complete explanation see 54C 74C Family Characteristics Application Note AN-90 2 AC Electrical Characteristics Symbol tpd0 tpd1 tpd0 tpd0 tpd1 tpd1 tpd0 Parameter TA e 25 C CL e 50 pF unless otherwise specified Conditions VCC e 5 0V VCC e 10V VCC e 5 0V VCC e 10V VCC e 5 0V VCC e 10V VCC e 5 0V VCC e 10V VCC e 5 0V VCC e 10V VCC e 5 0V VCC e 10V Min Typ 450 160 500 180 350 140 450 160 600 250 140 50 Max 1500 500 1600 550 1200 450 1500 500 2000 800 450 150 Units ns ns ns ns ns ns ns ns ns ns ns ns Propagation Delay to a ‘‘1’’ or ‘‘0’’ on Segment Outputs from Data Inputs Propagation Delay to a ‘‘0’’ on Segment Outputs from RB Input Propagation Delay to a ‘‘0’’ on Segment Outputs from Blanking Input Propagation Delay to a ‘‘1’’ on Segment Outputs from Lamp Test Propagation Delay to a ‘‘1’’ on RB Output from RB Input Propagation Delay to a ‘‘0’’ on RB Output from RB Input AC Parameters are guaranteed by DC correlated testing Typical Applications Typical Connection Utilizing the Ripple-Blanking Feature TL F 5883 – 4 First three stages will blank leading zeros the fourth stage will not blank zeros 3 Typical Applications (Continued) Blanking Input Connection Diagram TL F 5883 – 5 When RBO BI is forced low all segment outputs are off regardless of the state of any other input condition Light Emitting Diode (LED) Readout TL F 5883 – 7 TL F 5883 – 6 Incandescent Readout Fluorescent Readout TL F 5883 – 8 TL F 5883 – 9 A filament pre-warm resistor is recommended to reduce filament thermal shock and increase the effective cold resistance of the filament 4 Typical Applications (Continued) Gas Discharge Readout Liquid Crystal (LC) Readout TL F 5883 – 11 Direct DC drive of LC’s not recommended for life of LC readouts TL F 5883 – 10 Truth Table Decimal or Function 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BI RBI LT Inputs LT H H H H H H H H H H H H H H H H X H L RBI H X X X X X X X X X X X X X X X X L X D L L L L L L L L H H H H H H H H X L X C L L L L H H H H L L L L H H H H X L X B L L H H L L H H L L H H L L H H X L X A L H L H L H L H L H L H L H L H X L X H H H H H H H H H H H H H H H H L L H BI RBO a H L H H L H L H H H L L L H L L L L H b H H H H H L L H H H L L H L L L L L H c H H L H H H H H H H L H L L L L L L H Outputs d H L H H L H H L H L H H L H H L L L H e H L H L L L H L H L H L L L H L L L H f H L L L H H H L H H L L H H H L L L H g L L H H H H H L H H H H H H H L L L H 2 3 4 1 1 Note H e high level L e low level X e irrelevant Note 1 The blanking input (BI) must be open when output functions 0–15 are desired The ripple-blanking input (RBI) must be high if blanking of a decimal zero is not desired Note 2 When a low logic level is applied directly to the blanking input (BI) all segment outputs are low regardless of the level of any other input Note 3 When ripple-blanking input (RBI) and inputs A B C and D are at a low level with the lamp-test input high all segment outputs go low and the rippleblanking output (RBO) goes to a low level (response condition) Note 4 When the blanking input ripple-blanking output (BI RBO) is open and a low is applied to the lamp-test input all segment outputs are high One BI RBO is wire-AND logic serving as blanking input (BI) and or ripple-blanking output (RBO) 5 MM54C48 MM74C48 BCD-to-7 Segment Decoder Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54C48J or MM74C48J NS Package Number J16A Molded Dual-In-Line Package (N) Order Number MM54C48N or MM74C48N NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications