MM74HC148

MM54HC148 MM74HC148 8-3 Line Priority Encoder February 1988 MM54HC148 MM74HC148 8-3 Line Priority Encoder General Description This priority encoder utilizes advanced silicon-gate CMOS technology It has the high noise immunity and low power consumption typical of CMOS circuits as well as the speeds and output drive similar to LB-TTL This priority encoder accepts 8 input request lines 0– 7 and outputs 3 lines A0–A2 The priority encoding ensures that only the highest order data line is encoded Cascading circuitry (enable input EI and enable output EO) has been provided to allow octal expansion without the need for external circuitry All data inputs and outputs are active at the low logic level All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground Features Y Y Typical propagation delay 13 ns Wide supply voltage range 2V – 6V Connection Diagram Dual-In-Line Package TL F 9390 – 1 Order Number MM54HC148 or MM74HC148 Truth Table Inputs EI H L L L L L L L L L 0 X H X X X X X X X L 1 X H X X X X X X L H 2 X H X X X X X L H H 3 X H X X X X L H H H 4 X H X X X L H H H H 5 X H X X L H H H H H 6 X H X L H H H H H H 7 X H L H H H H H H H Outputs A2 A1 A0 GS EO H H L L L L H H H H H H L L H H L L H H H H L H L H L H L H H H L L L L L L L L H L H H H H H H H H H e High L e Low X e irrelevant C1995 National Semiconductor Corporation TL F 9390 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Notes 1 2) Operation Conditions Min Max Units Supply Voltage (VCC) 2 6 V DC Input or Output Voltage 0 VCC V (VIN VOUT) Operating Temperature Range (TA) b 40 a 85 MM74HC C b 55 a 125 MM54HC C Input Rise or Fall Times (tr tf) VCC e 2 0V 1000 ns VCC e 4 5V 500 ns VCC e 6 0V 400 ns If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage (VCC) DC Input Voltage (VIN) DC Output Voltage (VOUT) Clamp Diode Current (IIK IOK) DC Output Current per pin (IOUT) DC VCC or GND Current per pin (ICC) Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) S O Package only Lead Temperature (TL) (Soldering 10 sec ) b 0 5 to a 7 0V b 1 5 to VCC a 1 5V b 0 5 to VCC a 0 5V g 20 mA g 25 mA g 50 mA b 65 C to a 150 C 600 mW 500 mW 260 C DC Electrical Characteristics (Note 4) Symbol Parameter Conditions VCC TA e 25 C Typ VIH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage VIN e VIH or VIL lIOUTl s 20 mA 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 4 5V 6 0V 2 0V 4 5V 6 0V 4 5V 6 0V 6 0V 6 0V 20 45 60 47 52 0 0 0 02 02 15 3 15 42 05 1 35 18 19 44 59 3 96 5 48 01 01 01 0 26 0 26 g0 1 74HC TA e b40 to 85 C 54HC TA e b55 to 125 C Units Guaranteed Limits 15 3 15 42 05 1 35 18 19 44 59 3 84 5 34 01 01 01 0 33 0 33 g1 0 15 3 15 42 05 1 35 18 19 44 59 37 52 01 01 01 04 04 g1 0 V V V V V V V V V V V V V V V V mA mA VIL VOH VIN e VIH or VIL lIOUTl s 4 0 mA lIOUTl s 5 2 mA VOL Maximum Low Level Output Voltage VIN e VIH or VIL lIOUTl s 20 mA VIN e VIH or VIL lIOUTl s 4 0 mA lIOUTl s 5 2 mA IIN ICC Maximum Input Current Maximum Quiescent Supply Current VIN e VCC or GND VIN e VCC or GND IOUT e 0 mA 80 80 160 Note 1 Absolute Maximum Ratings are those values beyond which damage to the device may occur Note 2 Unless otherwise specified all voltages are referenced to ground Note 3 Power Dissipation temperature derating plastic ‘‘N’’ package b 12 mW C from 65 C to 85 C ceramic ‘‘J’’ package b 12 mW C from 100 C to 125 C Note 4 For a power supply of 5V g 10% the worst case output voltages (VOH and VOL) occur for HC at 4 5V Thus the 4 5V values should be used when designing with this supply Worst case VIH and VIL occur at VCC e 5 5V and 4 5V respectively (The VIH value at 5 5V is 3 85V ) The worst case leakage current (IIN ICC and IOZ) occur for CMOS at the higher voltage and so the 6 0V values should be used VIL limits are currently tested at 20% of VCC The above VIL specification (30% of VCC) will be implemented no later than Q1 CY’89 2 AC Electrical Characteristics VCC e 5V Symbol tPHL tPLH Parameter Maximum Propagation Delay Any Input to Any Output TA e 25 C CL e 15 pF tr e tf e 6 ns Conditions Typ 14 Units ns AC Electrical Characteristics VCC e 2 0V to 6 0V Symbol Parameter VCC TA e 25 C Typ tPHL tPLH Inputs 0–7 to Outputs A0 A1 A2 Inputs 0–7 to Output EO Inputs 0–7 to Output GS Input EI to Outputs A0 A1 A2 Input EI to Output GS Input EI to Output EO Maximum Output Rise and Fall Time 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 14 140 28 24 140 28 24 160 32 27 160 32 27 100 20 17 100 20 17 75 15 13 CL e 50 pF tr e tf e 6 ns (unless otherwise specified) 74HC b 40 C to a 85 C 54HC b 55 C to a 125 C Units Guaranteed Limits 175 35 30 175 35 30 200 40 34 200 40 34 125 25 21 125 25 21 95 19 16 210 42 36 210 42 36 240 48 41 240 48 41 150 30 26 150 30 26 110 22 19 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns pF 10 10 10 pF tPHL tPLH 15 tPHL tPLH 17 tPHL tPLH 17 tPHL tPLH 12 tPHL tPLH 12 tf tr 7 Cpd Cin Power Dissipation Capacitance (Note 5) Maximum Input Capacitance 52 5 Note 5 Cpd determines the no load dynamic power consumption and the no load dynamic current consumption 3 HC148 Schematic for Datasheet 4 TL F 9390 – 3 Logic Diagram TL F 9390 – 2 Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54HC148 or MM74HC148 NS Package Number J16A 5 MM54HC148 MM74HC148 8-3 Line Priority Encoder Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number MM54HC148 or MM74HC148 NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications