MICROCIRCUIT DATA SHEET MNCLC449A-X REV 1A0
Original Creation Date: 08/07/98 Last Update Date: 10/25/02 Last Major Revision Date: 10/24/02
1.2GHz ULTRA-WIDEBAND MONOLITHIC OP AMP
General Description
The Comlinear CLC449 is an ultra-high-speed monolithic op amp, with a typical -3dB bandwidth of 1.2GHz at a gain of +2. This wideband op amp supports rise and fall times less than 1ns, settling time of 6ns (to 0.2%) and slew rate of 2500V/us. The CLC449 achieves 2nd harmonic distortion of -68dBc at 5MHz at a low supply current of only 12mA. These performance advantages have been achieved through improvements in Comlinear's proven current feedback topology combined with a high-speed complementary bipolar process. The DC to 1.2GHz bandwidth of the CLC449 is suitable for many IF and RF applications as a versatile op amp building block for replacement of AC coupled discrete designs. Operational amplifier functions such as active filters, gain blocks, differentiation, addition, subtraction and other signal conditioning functions take full advantage of the CLC449's unity-gain stable closed-loop performance. The CLC449 performance provides greater headroom for lower frequency applications such as component video, high-resolution workstation graphics, and LCD displays. The amplifier's 0.1dB gain flatness to beyond 200MHz, plus 0.8ns 2V rise and fall times are ideal for improved time domain performance. In addition, the 0.03%/0.02 differential gain/phase performance allows system flexibility for handling standard NTSC and PAL signals. In applications using high-speed flash A/D and D/A converters, the CLC449 provides the necessary wide bandwidth (1.2GHz), settling (6ns to 0.2%) and low distortion into 50 Ohms loads to improve SFDR.
Industry Part Number
CLC449A
NS Part Numbers
CLC449AJ-MLS CLC449AJ-QML
Prime Die
VB1851A
Controlling Document
5962-9752001MPA
Processing
MIL-STD-883, Method 5004
Subgrp Description
1 2 3 4 5 6 7 8A 8B 9 10 11 Static tests at Static tests at Static tests at Dynamic tests at Dynamic tests at Dynamic tests at Functional tests at Functional tests at Functional tests at Switching tests at Switching tests at Switching tests at
Temp ( oC)
+25 +125 -55 +25 +125 -55 +25 +125 -55 +25 +125 -55
Quality Conformance Inspection
MIL-STD-883, Method 5005
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MNCLC449A-X REV 1A0
MICROCIRCUIT DATA SHEET
Features
1.2GHz small-signal bandwidth (Av = +2) 2500V/us slew rate 0.03%, 0.02 Dg 6ns settling time to 0.2% 3rd order intercept, 30dBm @ 70MHz Dual +5V or single 10V supply High output current: 90mA 2.5dB noise figure
Applications
High performance RGB video RF/IF amplifier Instrumentation Medical electronics Active filters High-speed A/D driver High-speed D/A buffer
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MNCLC449A-X REV 1A0
MICROCIRCUIT DATA SHEET
(Absolute Maximum Ratings)
(Note 1) Supply Voltage (Vcc) +6V dc Output Current (Iout) +96mA Common Mode Input Voltage Vcc Differential Input Voltage +4V Maximum Power Dissipation (Pd) (Note 2) 1.2W Junction Temperature (Tj) +175 C Storage Temperature Range -65 C to +150C Lead Temperature (soldering, 10 seconds) +300 C Thermal Resistance Junction -to-ambient (ThetaJA) Ceramic DIP (Still Air) (500 LFPM) Junction -to-case (ThetaJC) Ceramic DIP Package Weight (Typical) Ceramic DIP Note 1:
TBD TBD TBD
TBD
Note 2:
Note 3:
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (Tjmax - TA) / ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower. Human body model, 100 pF discharged through 1.5K Ohms.
Recommended Operating Conditions
Supply Voltage (Vcc) +5V dc Gain Range +2 to +10 Ambient Operating Temperature Range (Ta) -55 C to +125 C
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MICROCIRCUIT DATA SHEET
Electrical Characteristics
DC PARAMETERS
(The following conditions apply to all the following parameters, unless otherwise specified.) DC: Vcc = +5.0V, load resistance (Rl) = 100 Ohms, feedback resistance (Rf) = 249 Ohms, gain resistance (Rg) = 249 Ohms, and gain (Av) = 2. -55 C < Ta < +125 C (Note 3). SYMBOL VIO PARAMETER Input Offset Voltage Input Bias Current, non-inverting Input Bias Current, inverting Power Supply Rejection Ratio Supply Current +V = 4.5V to 5.0V, -V = -4.5V to -5.0V CONDITIONS NOTES PINNAME MIN -7 -12 IBN -30 -60 -20 -40 43 41 Icc No Load 13.5 14.0 LSBW Large Signal Bandwidth Gain Flatness Vout < 2.0Vpp 380 360 GFLAT Vout < 2.0Vpp, 0.3MHz to 200MHz -0.5 -0.7 HD2 2nd Harmonic Distortion 3rd Harmonic Distortion 20MHz, 2.0Vpp 48 48 HD3 20MHz, 2.0Vpp 66 64 0.5 0.7 7 12 30 60 20 40 MAX UNIT mV mV uA uA uA uA dB dB mA mA MHz MHz dB dB dBc dBc dBc dBc SUBGROUPS 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 4 5, 6 4 5, 6 4 5, 6 4 5, 6
IBI
PSRR
DC PARAMETERS: DRIFT VALUES
(The following conditions apply to all the following parameters, unless otherwise specified.) DC: "Deltas not required on B-Level product. Deltas required for S-Level product ONLY as specified on Internal Processing Instructions (IPI), (Note 3). Vio Ibn Input Offset Voltage Input Bias Current, non-inverting Input Bias Current, inverting Note 1: Note 2: Note 3: -0.7 -3 +0.7 +3 mV uA 1 1
Ibi
-2
+2
uA
1
If not tested, shall be guaranteed to the limits specified in table I herein. Group A testing only. The algebraic convention, whereby the most negative value is a minimum and most positive is a maximum, is used in this table. Negative current shall be defined as convential current flow out of a device terminal.
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MNCLC449A-X REV 1A0
MICROCIRCUIT DATA SHEET
Graphics and Diagrams
GRAPHICS# 07081HRA3 J08ARL P000410A CERDIP (J), 8 LEAD (B/I CKT) CERDIP (J), 8 LEAD (P/P DWG) CERDIP (J), 8 LEAD (PINOUT) DESCRIPTION
See attached graphics following this page.
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N/C VINV VNON-INV -VCC
1 2 3 4
8 7 6 5
N/C +VCC VOUT N/C
CLC449J 8 - LEAD DIP CONNECTION DIAGRAM TOP VIEW P000410A
MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050
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MNCLC449A-X REV 1A0
MICROCIRCUIT DATA SHEET
Revision History
Rev
0A0 1A0
ECN #
Rel Date
Originator
Shaw Mead Rose Malone
Changes
Initial MDS Release Updated MDS: MNCLC449A-X, Rev. 0A0 to MNCLC449A-X, Rev. 1A0. Added MLS NSID to Main Table and Drift Table to Electrical Section.
M0002997 10/25/02 M0004075 10/25/02
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