SM72442MTX

SM72442 Programmable Maximum Power Point Tracking Controller for Photovoltaic Solar Panels May 12, 2011 SM72442 Programmable Maximum Power Point Tracking Controller for Photovoltaic Solar Panels General Description The SM72442 is a programmable MPPT controller capable of controlling four PWM gate drive signals for a 4-switch buckboost converter. The SM72442 also features a proprietary algorithm called Panel Mode which allows for the panel to be connected directly to the output of your power optimizer circuit. Along with the SM72295 (Photovoltaic Full Bridge Driver), it creates a solution for an MPPT configured DC-DC converter with efficiencies up to 99.5%. Integrated into the chip is an 8-channel, 12 bit A/D converter used to sense input and output voltages and currents, as well as board configuration. Externally programmable values include maximum output voltage and current as well as different settings forslew rate, soft-start and Panel Mode. Features ■ ■ ■ ■ ■ ■ ■ Renewable Energy Grade Programmable maximum power point tracking Photovoltaic solar panel voltage and current diagnostic Single inductor four switch buck-boost converter control I2C interface for communication VOUT Overvoltage protection Over-current protection Package ■ TSSOP-28 Block Diagram 30134302 FIGURE 1. Block Diagram © 2011 National Semiconductor Corporation 301343 www.national.com SM72442 www.national.com 30134301 2 FIGURE 2. Typical Application Circuit SM72442 Connection Diagram 30134303 FIGURE 3. Top View TSSOP-28 Ordering Information Order Number SM72442MTX SM72442MTE SM72442MT Description TSSOP-28 TSSOP-28 TSSOP-28 NSC Package Drawing MTC28 MTC28 MTC28 Supplied As 2500 Units in Tape and Reel 250 Units in Tape and Reel 48 Units in Rail Package Top Marking SO2442 SO2442 SO2442 3 www.national.com SM72442 Pin Descriptions Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Name RST NC1 VDDD VSSD NC2 I2C0 I2C1 SCL SDA NC3 Description Active low signal. External reset input signal to the digital circuit. Reserved for test only. This pin should be grounded. Digital supply voltage. This pin should be connected to a 5V supply, and bypassed to VSSD with a 0.1 µF monolithic ceramic capacitor. Digital ground. The ground return for the digital supply and signals. No Connect. This pin should be pulled up to the 5V supply using 10k resistor. Addressing for I2C communication. Addressing for I2C communication. I2C clock. I2C data. Reserved for test only. This pin should be grounded. PM_OUT When Panel Mode is active, this pin will output a 400 kHz square wave signal with amplitude of 5V. Otherwise, it stays low. VDDA VSSA A0 AVIN A2 AVOUT A4 AIIN A6 AIOUT I2C2 NC4 LIB HIB HIA LIA PM Analog supply voltage. This voltage is also used as the reference voltage. This pin should be connected to a 5V supply, and bypassed to VSSA with a 1 µF and 0.1 µF monolithic ceramic capacitor. Analog ground. The ground return for the analog supply and signals. A/D Input Channel 0. Connect a resistor divider to 5V supply to set the maximum output voltage. Please refer to the application section for more information on setting the resistor value. Input voltage sensing pin. A/D Input Channel 2. Connect a resistor divider to a 5V supply to set the condition to enter and exit Panel Mode (PM). Refer to configurable modes for SM72442 in the application section. Output voltage sensing pin. A/D Input Channel 4. Connect a resistor divider to a 5V supply to set the maximum output current. Please refer to the application section for more information on setting the resistor value. Input current sensing pin. A/D Input Channel 6. Connect a resistor divider to a 5V supply to set the output voltage slew rate and various PM configurations. Refer to configurable modes for SM72442 in the application section. Output current sensing pin. Addressing for I2C communication. No Connect. This pin should be connected with 60.4k pull-up resistor to 5V. Low side boost PWM output. High side boost PWM output. High side buck PWM output. Low side buck PWM output. Panel Mode Pin. Active low. Pulling this pin low will force the chip into Panel Mode. www.national.com 4 SM72442 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Analog Supply Voltage VA (VDDA - VSSA) Digital Supply Voltage VD (VDDD - VSSD) Voltage on Any Pin to GND Input Current at Any Pin (Note 3) Package Input Current (Note 3) Storage Temperature Range ESD Rating Human Body Model -0.3 to 6.0V -0.3 to VA +0.3V max 6.0V -0.3 to VA +0.3V ±10 mA ±20 mA -65°C to +150°C (Note 2) 2 kV Recommended Operating Conditions Operating Temperature VA Supply Voltage VD Supply Voltage Digital Input Voltage Analog Input Voltage Junction Temperature -40°C to 105°C +4.75V to +5.25V +4.75V to VA 0 to VA 0 to VA -40°C to 125°C Specifications in standard typeface are for TJ = 25°C, and those in boldface type apply over the full operating junction temperature range.(Note 3) Symbol AVin, AIin AVout, AIout IDCL CINA Parameter Conditions Min Typ Max Units ANALOG INPUT CHARACTERISTICS Input Range DC Leakage Current Input Capacitance (Note 4) Track Mode Hold Mode 2.8 ISOURCE = 200 µA VA = VD = 5V ISINK = 200 µA to 1.0 mA VA = VD = 5V VA = VD = 5V 2 VD - 0.5 0 to VA 33 3 2 ±0.01 ±1 0.8 4 ±1 0.4 ±1 4 V µA pF pF V V pF µA V V µA pF DIGITAL INPUT CHARACTERISTICS VIL VIH CIND IIN VOH VOL IOZH , IOZL COUT Input Low Voltage Input High Voltage Digital Input Capacitance (Note 4) Input Current Output High Voltage Output Low Voltage Hi-Impedance Output Leakage Current Hi-Impedance Output Capacitance (Note 4) Analog and Digital Supply Voltages Total Supply Current Power Consumption PWM switching frequency DIGITAL OUTPUT CHARACTERISTICS POWER SUPPLY CHARACTERISTICS (CL = 10 pF) VA ,VD IA + ID PC fPWM VA ≥ VD VA = VD = 4.75V to 5.25V VA = VD = 4.75V to 5.25V 4.75 5 11.5 57.5 220 5.25 15 78.75 V mA mW kHz PWM OUTPUT CHARACTERISTICS Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. Note 3: Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL). Note 4: Not tested. Guaranteed by design. 5 www.national.com SM72442 Operation Description OVERVIEW The SM72442 is a programmable MPPT controller capable of outputting four PWM gate drive signals for a 4-switch buckboost converter with an independent Panel Mode. The typical application circuit is shown in Figure 2. The SM72442 uses an advanced digital controller to generate its PWM signals. A maximum power point tracking (MPPT) algorithm monitors the input current and voltage and controls the PWM duty cycle to maximize energy harvested from the photovoltaic module. MPPT performance is very fast. Convergence to the maximum power point of the module typically occurs within 0.01s. This enables the controller to maintain optimum performance under fast-changing irradiance conditions. Transitions between buck, boost, and Panel Mode are smoothed and advanced digital PWM dithering techniques are employed to increase effective PWM resolution. Output voltage and current limiting functionality are integrated into the digital control logic. The controller is capable of handling both shorted and no-load conditions and will recover smoothly from both conditions. 30134304 FIGURE 4. High Level State Diagram for Startup www.national.com 6 SM72442 STARTUP SM72442 has a soft start feature that will ramp its output voltage for a fixed time of 250ms. If no output current is detected during soft-start time, the chip will then be in Panel Mode for 60 seconds. A counter will start once the minimum output current threshold is met (set by ADC input channel 4). During these 60 seconds, any variation on the output power will not cause the chip to enter MPPT mode. Once 60 seconds have elapsed, at a certain power level variation at the output (set by ADC input channel 2) will engage the chip in MPPT mode. If the output current exceeded the current threshold set at A/D Channel 6 (A6) during soft-start, the chip will then engage in MPPT mode. CURRENT LIMIT SETTING Maximum output current can be set by changing the resistor divider on A4 (pin 18). Refer to Figure 2. Overcurrent at the output is detected when the voltage on AIOUT (pin 21) equals the voltage on A4 (pin 18). The voltage on A4 can be set by a resistor divider connected to 5V whereas the voltage on AIOUT can be set by a current sense amplifier. AVIN PIN AVIN is an A/D input to sense the input voltage of the SM72442. A resistor divider can be used to scale max voltage to about 4V, which is 80% of the full scale of the A/D input. CONFIGURABLE SETTINGS A/D pins A0, A2, A4, and A6 are used to configure the behavior of the SM72442 by adjusting the voltage applied to them. One way to do this is through resistor dividers as shown in Figure 2, where RT1 to RT4 should be in the range of 20 kΩ. Different conditions to enter and exit Panel Mode can be set on the ADC input channel 2. Listed below are different conditions that a user can select on pin A2. “1:1”refers to the state in which the DC/DC converter operates with its output voltage equal to its input voltage (also referred to as “Buck-Boost” mode on Figure 4.) A2 4.69 V 4.06 V 3.44 V 2.81 V 2.19 V 1.56 V 0.94 V 0.31 V Entering Panel Mode 2s in 1:1 Mode 1s in 1:1 Mode 0.4s in 1:1 Mode 0.2s in 1:1 Mode 2s in 1:1 Mode 1s in 1:1 Mode 0.4s in 1:1 Mode 0.2s in 1:1 Mode Exiting Panel Mode 3.1% power variation 3.1% power variation 3.1% power variation 3.1% power variation 1.6% power variation 1.6% power variation 1.6% power variation 1.6% power variation 30134305 FIGURE 5. Startup Sequence MAXIMUM OUTPUT VOLTAGE Maximum output voltage on the SM72442 is set by resistor divider ratio on pin A0. (Please refer to Figure 2 Typical Application Circuit). The user can also select the output voltage slew rate, minimum current threshold and duration of Panel Mode after the soft-start period has finished, by changing the voltage level on pin A6 which is the input of ADC channel 6. Where RT1 and RB1 are the resistor divider on the ADC pin A0 and RFB1 and RFB2 are the output voltage sense resistors. A typical value for RFB2 is about 2 kΩ A6 4.69 V 4.06 V 3.44 V 2.81 V 2.19 V 1.56 V 0.94 V 0.31 V Output Voltage Slew Rate Limit Slow Slow Slow Slow Slow Slow Fast No slew rate limit Starting Panel Mode Time Not applicable 60s 0s 120s Not applicable 60s 60s 60s MPPT Exit Threshold 0 mA 75mA 300mA 300mA 300mA 300mA 300mA 300mA MPPT Start Threshold 0 mA 125mA 500mA 500mA 500mA 500mA 500mA 500mA Starting boost ratio 1:1 1:1 1:1 1:1 1:1.2 1:1 1:1 1:1 7 www.national.com SM72442 PARAMETER DEFINITIONS Output Voltage Slew Rate Limit Settling Time: Time constant of the internal filter used to limit output voltage change. For fast slew rate, every 1V increase, the output voltage will be held for 30 ms whereas in a slow slew rate, the output voltage will be held for 62 ms for every 1V increase. (See Figure 6). Starting PM Time: After initial power-up or reset, the output soft-starts and then enters Panel Mode for this amount of time. MPPT Exit Threshold and MPPT Start Threshold: These are the hysteretic thresholds for Iout_th. Starting Boost Ratio – This is the end-point of the soft-start voltage ramp. 1:1 ratio means it stops when Vout = Vin, 1:1.2 means it stops when Vout = 1.2 x Vin. PANEL MODE PIN (PM) PIN The SM72442 can be forced into Panel Mode by pulling the PM pin low. One sample application is to connect this pin to the output of an external temperature sensor; therefore whenever an over-temperature condition is detected the chip will enter a Panel Mode. Once Panel Mode is enabled either when buck-boost mode is entered for a certain period of time (adjustable on channel 2 of ADC) or when PM is pulled low, the PM_OUT pin will output a 400 kHz square wave signal. Using a gate driver and transformer, this square wave signal can then be used to drive a Panel Mode FET as shown in Figure 7. 30134313 FIGURE 6. Slew Rate Limitation Circuit 30134307 FIGURE 7. Sample Application for Panel Mode Operation www.national.com 8 SM72442 RESET PIN When the reset pin is pulled low, the chip will cease its normal operation and turn-off all of its PWM outputs including the output of PM_OUT pin. Below is an oscilloscope capture of a forced reset condition. specially important when sampling dynamic signals. Also important when sampling dynamic signals is a band-pass or lowpass filter which reduces harmonic and noise in the input. These filters are often referred to as anti-aliasing filters. 30134309 FIGURE 9. Equivalent Input Circuit DIGITAL INPUTS and OUTPUTS The digital input signals have an operating range of 0V to VA, where VA = VDDA – VSSA. They are not prone to latchup and may be asserted before the digital supply VD, where VD = VDDD – VSSD, without any risk. The digital output signals operating range is controlled by VD. The output high voltage is VD – 0.5V (min) while the output low voltage is 0.4V (max). SDA and SCL OPEN DRAIN OUTPUT SCL and SDA output is an open-drain output and does not have internal pull-ups. A “high” level will not be observed on this pin until pull-up current is provided by some external source, typically a pull-up resistor. Choice of resistor value depends on many system factors; load capacitance, trace length, etc. A typical value of pull- up resistor for SM72442 ranges from 2 kΩ to 10 kΩ. For more information, refer to the I2C Bus specification for selecting the pull-up resistor value . The SCL and SDA outputs can operate while being pulled up to 5V and 3.3V. I2C CONFIGURATION REGISTERS The operation of the SM72442 can be configured through its I2C interface. Complete register settings for I2C lines are shown below. 30134308 FIGURE 8. Forced Reset Condition As seen in Figure 8, the initial value for output voltage and load current are 28V and 1A respectively. After the reset pin is grounded both the output voltage and load current decreases immediately. MOSFET switching on the buck-boost converter also stops immediately. VLOB indicates the low side boost output from the SM72295. ANALOG INPUT An equivalent circuit for one of the ADC input channels is shown in Figure 9. Diode D1 and D2 provide ESD protection for the analog inputs. The operating range for the analog inputs is 0V to VA. Going beyond this range will cause the ESD diodes to conduct and result in erratic operation. The capacitor C1 in Figure 9 has a typical value of 3 pF and is mainly the package pin capacitance. Resistor R1 is the on resistance of the multiplexer and track / hold switch; it is typically 500Ω. Capacitor C2 is the ADC sampling capacitor; it is typically 30 pF. The ADC will deliver best performance when driven by a low-impedance source (less than 100Ω). This is reg0 Register Description Bits 55:40 39:30 29:20 19:10 9:0 Field RSVD ADC6 ADC4 ADC2 ADC0 Reset Value 16'h0 10'h0 10'h0 10'h0 10'h0 R/W R R R R R Bit Field Description Reserved for future use. Analog Channel 6 (slew rate detection time constant, see adc config worksheet) Analog Channel 4 (iout_max: maximum allowed output current) Analog Channel 2 (operating mode, see adc_config worksheet) Analog Channel 0 (vout_max: maximum allowed output voltage) reg1 Register Description Bits 55:43 42 Field RSVD burnin_n Reset Value 13'h0 1'h0 R/W R R Bit Field Description Reserved for future use. over temperature input to IC 9 www.national.com SM72442 reg1 Register Description Bits 41 40 39:30 29:20 19:10 9:0 Field pt_n mppt_ok Vout Iout Vin Iin Reset Value 1'h0 1'h0 10'h0 10'h0 10'h0 10'h0 R/W R R R R R R Bit Field Description over voltage protection input to IC Internal mppt_start signal (test only) Voltage out Current out Voltage in Current in reg3 Register Description Bits 55:47 46 45 44:43 42 41:40 39:30 29:20 19:17 16:14 13:5 4 3 2 1 0 Field RSVD overide_adcprog RSVD RSVD power_thr_sel bb_in_ptmode_s el iout_max vout_max tdoff tdon dc_open pass_through_se l pass_through_m anual bb_reset clk_oe_manual Open Loop operation Reset Value 9'd0 1'b0 1'b0 2'd0 1'b0 2'd0 10'd1023 10'd1023 3'h3 3'h3 9'hFF 1'b0 1'b0 1'b0 1'b0 1'b0 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Bit Field Description Reserved When set to 1'b1,the below overide registers used instead of ADC Reserved Reserved Register override alternative for ADC2[9] when reg3 [46] is set ( 1/2^^5 or 1/2^^6 ) Register override alternative for ADC2[8:7] when reg3 [46] is set ( 5%,10%,25% or 50%) Register override alternative when reg3[46] is set for maximum current threshold instead of ADC ch4 Register override alternative when reg3[46] is set for maximum voltage threshold instead of ADC ch0 Dead time Off Time Dead time On time Open loop duty cycle (test only) Overrides PM pin 28 and use reg3[3] Control Panel Mode when pass_through_sel bit is 1'b1 Soft reset Enable the PLL clock to appear on pin 5 Open Loop operation (MPPT disabled, receives duty cycle command from reg 3b13:5); set to 1 and then assert & deassert bb_reset to put the device in openloop (test only) reg4 Register Description Bits 55:32 31:24 23:16 15:8 7:0 Field RSVD Vout offset Iout offset Vin offset Iin offset Reset Value 24'd0 8'h0 8'h0 8'h0 8'h0 R/W R/W R/W R/W R/W R/W Bit Field Description Reserved Voltage out offset Current out offset Voltage in offset Current in offset reg5 Register Description Bits 55:40 39:30 29:20 19:10 9:0 www.national.com Field RSVD iin_hi_th iin_lo_th iout_hi_th iout_lo_th Reset Value 15'd0 10'd40 10'd24 10'd40 10'd24 R/W R/W R/W R/W R/W R/W 10 Bit Field Description Reserved Current in high threshold for start Current in low threshold for start Current out high threshold for start Current out low threshold for start SM72442 Using the I2C port, the user will be able to control the duty cycle of the PWM signal. Input and output voltage and current offset can also be controlled using I2C on register 4. Control registers are available for additional flexibility. The thresholds iin_hi_th, iin_lo_th, iout_hi_th, iout_lo_th, in reg5 are compared to the values read in by the ADC on the AIIN and AIOUT pins. Scaling is set by the scaling of the analog signal fed into AIIN and AIOUT. These 10–bit values determine the entry and exit conditions for MPPT. COMMUNICATING WITH THE SM72442 The SCL line is an input, the SDA line is bidirectional, and the device address can be set by I2C0, I2C1 and I2C2 pins. Three device address pins allow connection of up to 7 SM72444s to the same I2C master. A pull-up resistor (10k) to a 5V supply is used to set a bit 1 on the device address. Device addressing for slaves are as follows: I2C0 0 0 0 1 1 1 1 I2C1 0 1 1 0 0 1 1 I2C2 1 0 1 0 1 0 1 Hex 0x1 0x2 0x3 0x4 0x5 0x6 0x7 The data registers in the SM72442 are selected by the Command Register. The Command Register is offset from base address 0xE0. Each data register in the SM72442 falls into one of two types of user accessibility: 1) Read only (Reg0, Reg1) 2) Write/Read same address (Reg3, Reg4, Reg5) There are 7 bytes in each register (56 bits), and data must be read and written in blocks of 7 bytes. Figure 10 depicts the ordering of the bytes transmitted in each frame and the bits within each byte. In the read sequence depicted in Figure 11 the data bytes are transmitted in Frames 5 through 11, starting from the LSByte, DATA1, and ending with MSByte, DATA7. In the write sequence depicted in Figure 12, the data bytes are transmitted in Frames 4 through 11. Only the 100kHz data rate is supported. Please refer to “The I2C Bus Specification” version 2.1 (Doc#: 939839340011) for more documentation on the I2C bus. 30134316 FIGURE 10. Endianness Diagram 30134312 FIGURE 11. I2C Read Sequence 11 www.national.com SM72442 30134314 FIGURE 12. I2C Write Sequence Noise coupling into digital lines greater than 400 mVp-p (typical hysteresis) and undershoot less than 500 mV GND, may prevent successful I2C communication with SM72442. I2C no acknowledge is the most common symptom, causing unnecessary traffic on the bus although the I2C maximum frequency of communication is rather low (400 kHz max), care still needs to be taken to ensure proper termination within a system with multiple parts on the bus and long printed board traces. Additional resistance can be added in series with the SDA and SCL lines to further help filter noise and ringing. Minimize noise coupling by keeping digital races out of switching power supply areas as well as ensuring that digital lines containing high speed data communications cross at right angles to the SDA and SCL lines. www.national.com 12 SM72442 Physical Dimensions 30134350 NS Package Drawing MTC28 13 www.national.com SM72442 Programmable Maximum Power Point Tracking Controller for Photovoltaic Solar Panels For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Amplifiers Audio Clock and Timing Data Converters Interface LVDS Power Management Switching Regulators LDOs LED Lighting Voltage References PowerWise® Solutions Temperature Sensors PLL/VCO www.national.com/amplifiers www.national.com/audio www.national.com/timing www.national.com/adc www.national.com/interface www.national.com/lvds www.national.com/power www.national.com/switchers www.national.com/ldo www.national.com/led www.national.com/vref www.national.com/powerwise WEBENCH® Tools App Notes Reference Designs Samples Eval Boards Packaging Green Compliance Distributors Quality and Reliability Feedback/Support Design Made Easy Design Support www.national.com/webench www.national.com/appnotes www.national.com/refdesigns www.national.com/samples www.national.com/evalboards www.national.com/packaging www.national.com/quality/green www.national.com/contacts www.national.com/quality www.national.com/feedback www.national.com/easy www.national.com/solutions www.national.com/milaero www.national.com/solarmagic www.national.com/training Applications & Markets Mil/Aero PowerWise® Design University Serial Digital Interface (SDI) www.national.com/sdi www.national.com/wireless www.national.com/tempsensors SolarMagic™ THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS. EXCEPT AS PROVIDED IN NATIONAL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NATIONAL ASSUMES NO LIABILITY WHATSOEVER, AND NATIONAL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE AND/OR USE OF NATIONAL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. Copyright© 2011 National Semiconductor Corporation For the most current product information visit us at www.national.com National Semiconductor Americas Technical Support Center Email: support@nsc.com Tel: 1-800-272-9959 www.national.com National Semiconductor Europe Technical Support Center Email: europe.support@nsc.com National Semiconductor Asia Pacific Technical Support Center Email: ap.support@nsc.com National Semiconductor Japan Technical Support Center Email: jpn.feedback@nsc.com