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NTE6507

NTE6507

  • 厂商:

    NTE

  • 封装:

  • 描述:

    NTE6507 - Integrated Circuit NMOS, 8 Bit Microprocessor (MPU) w/On-Chip Clock OSC - NTE Electronics

  • 数据手册
  • 价格&库存
NTE6507 数据手册
NTE6507 Integrated Circuit NMOS, 8 Bit Microprocessor (MPU) w/On–Chip Clock OSC Description: The NTE6507 integrated circuit is an 8 bit microprocessor in a 28–Lead DIP type package which provides a selection of addressable memory range, interrupt input options, and on–chip clock oscillators and drivers. This device is bus compatible with the MC6800 product offering and is aimed at high performance, low cost applications where single phase inputs or crystals provide the time base. Features: D Single 5V ±5% Power Supply D N Channel, Silicon Gate, Depletion Load Technology D 8 Bit Parallel Processing D Decimal and Binary Arithmetic D Thirteen Addressing Modes D True Indexing Capability D Programmable Stack Pointer D Variable Length Stack D D D D D D D D Bi–Directional Data Bus Instruction Decoding and Control 8k Addressable Bytes of Memory “Ready” Input Direct Memory Access Capability Bus Compatible with MC6800 On–Board Clock 1MHz Operating Frequency Absolute Maximum Ratings: (Note 1) Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to +7.0V Input Voltage, Vin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to +7.0V Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +70°C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55° to +150°C Note 1. This device contains input protection against damage due to high static voltages or electric fields; however, precautions should be taken to avoid application of voltages higher than the maximum rating. DC Characteristics: (VCC = 5V ±5%, TA = 0° to +70°C unless otherwise specified) Parameter Input High Voltage Logic and ∅o(in) Logic Input Low Voltage Logic and ∅o(in) Input Loading RDY Input Leakage Current Logic (Excluding RDY) ∅o(in) Three–State (Off State) Input Current DB0–DB7 Output High Voltage DB0–DB7, A0–A15, R/W Output Low Voltage DB0–DB7, A0–A15, R/W Power Dissipation Capaticance RES, RDY, DB0–DB7 A0–A15, R/W ∅o(in) Cout CO o(in) Symbol VIH Test Conditions Min +2.0 VCC–0.5 Max VCC VCC+0.25 +0.8 –300 2.5 10.0 ±10 – 0.4 700 10 15 12 15 Unit V V V µA µA µA µA V V mW pF pF pF pF VIL –0.3 IIL Iin Vin = 0V, VCC = 5.25V –10 Vin = 0 to 5.25V, VCC = 0 – – ITSI VOH VOL PD Cin Vin = 0.4 to 2.4V, VCC = 5.25V – ILOAD = –100µA, VCC = 4.75V 2.4 ILOAD = 1.6mA, VCC = 4.75V – VCC = 5.25V Vin = 0, TA = +25°C, f = 1MHz – – – – – Dynamic Operating Characteristics: (VCC = 5V ±5%, TA = 0° to +70°C unless otherwise specified) Parameter Cycle Time ∅o(in) Low Time ∅o(in) High Time ∅o Neg to ∅1 Pos Delay ∅o Neg to ∅2 Neg Delay ∅o Pos to ∅1 Neg Delay ∅o Pos to ∅2 Pos Delay ∅α(in) Rise and Fall Time ∅1(OUT) Pulse Width ∅2(OUT) Pulse Width Delay Between ∅1 and ∅2 ∅1 and ∅2 Rise and Fall Times Symbol TCYC TL∅o TH∅o T01+ T02– T01– T02+ T PWHO T PWHO TD TR, TF Load = 1TTL load +30pF, Note 3 Note 2 Note 2 Load = 100pF Load = 100pF Load = 100pF Load = 100pF Test Conditions Min 1.00 480 460 10 5 5 15 0 T LOo–20 T LOo–40 5 – Max 40 – – 70 65 65 75 30 T LO o T LOo–10 – 25 Unit µs ns ns ns ns ns ns ns ns ns ns ns TRO, TFO Note 3 1 2 Note 2. Measured at 50% points. Note 3. Measured between 10% and 90% points. Dynamic Operating Characteristics (Cont’d): (VCC = 5V ±5%, TA = 0 to +70°C unless otherwise specified) Parameter R/W Setup Time R/W Hold Time Address Setup Time Address Hold Time Read Access Time Read Data Setup Time Read Data Hold Time Write Data Setup Time Write Data Hold Time Sync Setup Time Sync Hold Time RDY Setup Time Symbol TRWS TRWH TADS TADH TACC TDSU THR TMDS THW TSYS TSYH TRS Note 4 Test Conditions Min – 30 – 30 – 100 10 20 60 – 30 200 Max 225 – 225 – 650 – – 175 150 350 – – Unit ns ns ns ns ns ns ns ns ns ns ns ns Note 4. RDY must never switch states within TRS to end of ∅2. Pin Connection Diagram RES VSS RDY VCC AB 0 AB 1 AB 2 AB 3 AB 4 1 2 3 4 5 6 7 8 9 28 Ø 2 (Out) 27 Ø 0 (In) 26 R/W 25 DB 0 24 DB 1 23 DB 2 22 DB 3 21 DB 4 20 DB 5 19 DB 6 18 DB 7 17 AB 12 16 AB 11 15 AB 10 AB 5 10 AB 6 11 AB 7 12 AB 8 13 AB 9 14 14 1 15 28 1.469 (37.32) Max .250 (6.35) .540 (13.7) .100 (2.54) 1.300 (33.02) .122 (3.1) Min .600 (15.24)
NTE6507 价格&库存

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