NTE74C14

NTE74C14 Integrated Circuit TTL− CMOS Hex Schmitt Trigger 14−Lead DIP Description: The NTE74C14 Hex Schmitt Trigger is a monolithic complementary MOS (CMOS) integrated circuit constructed with N− and P−channel enhancement transistors. The positive and negative going threshold voltages, VT+ an VT− show low variation with respect to temperature (typ. 0.0005V/°C at VCC = 10V) and hysteresis, VT+ − VT− ≥ 0.2 VCC is guaranteed. All inputs are protected from damage due to static discharge by diode clamps to VCC and GND. Features: D Wide Supply Range: 3V to 15V D High Noise Immunity: 0.7 VCC (typ) D Low Power TTL Compatibility: 0.4 VCC (typ) 0.2 VCC Guaranteed D Hysteresis: 0.4 VCC (typ) 0.2 VCC Guaranteed Absolute Maximum Ratings: (Note 1) Voltage at Any Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3V to VCC +0.3V Power Dissipation, PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 700mW Operating VCC Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 15V Absolute Maximum VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18V Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40° to +85°C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65° to +150°C Lead Temperature (During Soldering, 10sec), TL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +260°C Note 1. “Absolute Maximum Ratings” are those values beyond which th safety of the device cannot be guaranteed. Except for “Operating Temperature Range”, they are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation. DC Electrical Characteristics: (TA = −40° to +85°C unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit VCC = 5V 3.0 3.6 4.3 V VCC = 10V 6.0 6.8 8.6 V VCC = 15V 9.0 10.0 12.9 V VCC = 5V 0.7 1.4 2.0 V VCC = 10V 1.4 3.2 4.0 V VCC = 15V 2.1 5.0 6.0 V 1.0 2.2 3.6 V VCC = 10V 2.0 3.6 7.2 V VCC = 15V 3.0 5.0 10.8 V VCC = 5V, IO = −10μA 4.5 − − V VCC = 10V, IO = −10μA 9.0 − − V VCC = 5V, IO = −10μA − − 0.5 V VCC = 10V, IO = −10μA − − 1.0 V CMOS to CMOS Positive Going Threshold Voltage Negative Going Threshold Voltage Hysteresis VT+ VT− VT+−VT− VCC = 5V Logical “1” Output Voltage Logical “0” Output Voltage VOUT(1) VOUT(0) Logical “1” Input Current IIN(1) VCC = 15V, VIN = 15V − 0.005 1.0 μA Logical “0” Input Current IIN(0) VCC = 15V, VIN = 0V −1.0 −0.005 − μA Supply Current ICC VCC = 15V, VIN = 0V/15V − 0.05 15 μA VCC = 5V, VIN = 2.5V, Note 2 − 20 − μA VCC = 10V, VIN = 5V, Note 2 − 200 − μA VCC = 15V, VIN = 7.5V, Note 2 − 600 − μA CMOS/LPTTL Interface Logical “1” Input Voltage VIN(1) VCC = 5V 4.3 − − V Logical “0” Input Voltage VIN(0) VCC = 5V − − 0.7 V Logical “1” Output Voltage VOUT(1) VCC = 4.75V, IO = −360μA 2.4 − − V Logical “0” Output Voltage VOUT(0) VCC = 4.75V, IO = 360μA − − 0.4 V VOUT = 0V, TA = +25°C −1.75 −3.3 − mA −8.0 −15 − mA VOUT = VCC, TA = +25°C 1.75 3.3 − mA 8.0 15 − mA Output Drive (Short Circuit Current) Output Source Current (P−Channel) ISOURCE VCC = 5V VCC = 10V Output Sink Current (N−Channel) ISINK VCC = 5V VCC = 10V Note 2. Only one of the six inputs is at 1/2 VCC; the others are either at VCC or GND. AC Electrical Characteristics: (TA = +25°, CL = 50pF, Note 3 unless otherwise specified) Parameter Propagation Delay Time from Input to Output Symbol Test Conditions Min Typ Max Unit − 220 400 ns VCC = 10V − 80 200 ns tpd0, tpd1 VCC = 5V Input Capacitance CIN Any Input (Note 4) − 5.0 − pF Power Dissipation Capacitance CPD Per Gate (Note 5) − 45 − pF Note 3. AC Parameters are guaranteed by DC correlated testing. Note 4. Capacitance is guaranteed by periodic testing. Note 5. CPD determines the no load AC power consumption of any CMOS device. Pin Connection Diagram 1A 1 14 VCC 1Y 2 2A 3 13 6A 12 6Y 2Y 4 11 5A 3A 5 10 5Y 3Y 6 9 4A GND 7 8 4Y 14 8 1 7 .785 (19.95) Max .300 (7.62) .200 (5.08) Max .100 (2.45) .600 (15.24) .099 (2.5) Min