NTE857M

NTE857M NTE857SM Integrated Circuit Low–Noise JFET–Input Operational Amplifier Description: The NTE857M and NTE857SM are low–noise JFET input operational amplifiers combining two state–of–the–art linear technologies on a single monolithic integrated circuit. Each internally compensated operational amplifier has well matched high voltage JFET input devices for low input offset voltage. The BIFET technology provides wide bandwidths and fast slew rates with low input bias currents, input offset currents, and supply currents. Moreover, these devices exhibit low–noise and low harmonic distortion making them ideal for use in high–fidelity audio amplifier applications. Features: D Available in Two Different Package Types: 8–Lead Mini DIP (NTE857M) SOIC–8 Surface Mount (NTE857SM) D Low Input Noise Voltage: 18nV√Hz Typ D Low Harmonic Distortion: 0.01% Typ D Low Input Bias and Offset Currents D High Input Impedance: 1012Ω Typ D High Slew Rate: 13V/µs Typ D Wide Gain Bandwidth: 4MHz Typ D Low Supply Current: 1.4mA per Amp Absolute Maximum Ratings: Supply Voltage VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +18V VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18V Differential Input Voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30V Input Voltage Range (Note 1), VIDR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15V Output Short–Circuit Duration (Note 2), tS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Power Dissipation, PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 680mW Derate Above TA = +47°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mW/°C Operating Ambient Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +70°C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65° to +150°C Note 1. The magnitude of the input voltage must not exceed the magnitude of the supply voltage or 15V, whichever is less. Note 2. The output may be shorted to GND or either supply. Temperature and/or supply voltages must be limited to ensure that power dissipation ratungs are not exceeded. Electrical Characteristics: (VCC = +15V, VEE = –15V, TA = +25°C unless otherwise specified) Parameter Input Offset Voltage Average Temperature Coefficient of Input Offset Voltage Input Offset Current Input Bias Current Input Resistance Symbol VIO RS ≤ 10k, VCM = 0 TA = 0 to +70°C ∆VIO/∆T TA = 0 to +70°C IIO IIB VCM = 0, Note 3 VCM = 0, Note 3 TA = 0 to +70°C TA = 0 to +70°C ri Common Mode Input Voltage Range VICR Large–Signal Voltage Gain AVOL Output Voltage Swing (Peak–to–Peak) Test Conditions VO VO = ±10V, RL ≤ 2k TA = 0 to +70°C RL = 10k RL ≥ 10k TA = 0 to +70°C RL ≥ 2k Min Typ Max Unit – 3 10 mV – – 13 mV – 10 – µV/°C – 5 50 pA – – 2 nA – 30 200 pA – – 7 nA – 1012 – Ω ±10 +15, –12 – V 25 150 – V/mV 15 – – V/mV 24 28 – V 24 – – V 20 – – V Common Mode Rejection Ratio CMRR RS ≤ 10k 70 100 – dB Supply Voltage Rejection Ratio PSRR RS ≤ 10k 70 100 – dB Supply Current (Each Amplifier) ID – 1.4 2.5 mA Unity Gain Bandwidth BW – 4 – MHz Slew Rate SR – 13 – V/µs Rise Time tr – 0.1 – µs VIN = 20mV, RL = 2k, CL = 100pF – 10 – % Overshoot Factor VIN = 10V, RL = 2k, CL = 100pF Equivalent Input Noise Voltage en RS = 100Ω, f = 1000Hz – 18 – nV/√Hz Equivalent Input Noise Current in RS = 100Ω, f = 1000Hz – 0.01 – pA/√Hz THD VO(RMS) = 10V, RS ≤ 1k, RL ≥ 2k, f = 1000Hz – 0.01 – % AV = 100 – 120 – dB Total Harmonic Distortion Channel Separation Note 3. Input Bias currents of JFET input operational amplifiers approximately double for every 10°C rise in Junction Temperature. To maintain Junction Temperature as close to Ambient Temperature as possible, pulse techniques must be used during test. Pin Connection Diagram Offset Null 1 8 N.C. Inverting Input (1) 2 7 VCC Non–Inverting Input (1) 3 6 Output VEE 4 5 Offset Null NTE857M 8 5 .260 (6.6) 1 4 .390 (9.9) Max .300 (7.62) .155 (3.93) .100 (2.54) .145 (3.68) .300 (7.62) NTE857SM .192 (4.9) 8 5 .236 (5.99) .154 (3.91) 1 .050 (1.27) 4 016 (.406) 061 (1.53) .006 (.152) NOTE: Pin1 on Beveled Edge .198 (5.03)