74ABT273AD,118

INTEGRATED CIRCUITS 74ABT273A Octal D-type flip-flop Product specification IC23 Data Handbook
     1995 Sep 06 Philips Semiconductors Product specification Octal D-type flip-flop 74ABT273A FEATURES DESCRIPTION • Eight edge-triggered D-type flip-flops • Buffered common clock • Buffered asynchronous Master Reset • Power-up reset • See 74ABT377 for clock enable version • See 74ABT373 for transparent latch version • See 74ABT374 for 3-State version • ESD protection exceeds 2000 V per Mil Std 833 Method 3015 and The 74ABT273A has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output. All outputs will be forced Low independent of Clock or Data inputs by a Low voltage level on the MR input. The device is useful for applications where the true output only is required and the CP and MR are common elements. 200 V per machine model. QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT tPLH tPHL Propagation delay CP to Qn CL = 50pF; VCC = 5V 3.0 3.4 ns CIN Input capacitance VI = 0V or VCC 3.5 pF ICCH Total supply current Outputs High; VCC =5.5V 150 µA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 20-Pin Plastic DIP –40°C to +85°C 74ABT273A N 74ABT273A N SOT146-1 20-Pin plastic SO –40°C to +85°C 74ABT273A D 74ABT273A D SOT163-1 20-Pin Plastic SSOP Type II –40°C to +85°C 74ABT273A DB 74ABT273A DB SOT339-1 20-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT273A PW 7ABT273APW DH SOT360-1 PIN CONFIGURATION PIN DESCRIPTION MR 1 20 VCC Q0 2 19 Q7 D0 3 18 D7 D1 4 17 D6 Q1 5 16 Q6 Q2 6 15 Q5 D2 7 14 D5 D3 8 13 D4 Q3 9 12 Q4 11 CP GND 10 PIN NUMBER SYMBOL NAME AND FUNCTION 11 CP Clock pulse input (active rising edge) 3, 4, 7, 8, 13, 14, 17, 18 D0 - D7 Data inputs 2, 5, 6, 9, 12, 15, 16, 19 Q0 - Q7 Data outputs 1 MR 10 GND Ground (0V) 20 VCC Positive supply voltage Master Reset input (active-Low) SA00052 1995 Sep 06 2 853-1774 15704 Philips Semiconductors Product specification Octal D-type flip-flop 74ABT273A LOGIC SYMBOL (IEEE/IEC) LOGIC SYMBOL 3 1 4 7 8 13 14 17 18 R 11 C1 D0 D1 D2 D3 D4 D5 D6 D7 2 11 CP 4 5 1 MR 7 6 8 9 3 1D Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 13 12 14 15 17 16 18 19 2 5 6 9 12 15 16 19 SA00053 SA00054 LOGIC DIAGRAM D0 D1 3 D2 4 D3 7 D4 8 D5 13 D6 14 D7 17 18 11 CP D Q D CP D Q CP RD D Q CP RD D Q CP RD D Q CP RD D Q CP RD D Q CP RD Q CP RD RD 1 MR 5 2 Q1 Q0 6 9 Q2 Q3 12 Q4 15 Q5 16 Q6 19 Q7 SA00055 FUNCTION TABLE INPUTS OUTPUTS OPERATING MODE MR CP Dn Q0 - Q7 L X X L Reset (clear) H ↑ h H Load ”1” H ↑ l L Load ”0” H = High voltage level h = High voltage level one set-up time prior to the Low-to-High clock transition L = Low voltage level l = Low voltage level one set-up time prior to the Low-to-High clock transition X = Don’t care ↑ = Low-to-High clock transition 1995 Sep 06 3 Philips Semiconductors Product specification Octal D-type flip-flop 74ABT273A ABSOLUTE MAXIMUM RATINGS1, 2 SYMBOL VCC IIK PARAMETER CONDITIONS RATING UNIT -0.5 to +7.0 V -18 mA -1.2 to +7.0 V VO < 0 -50 mA output in Off or High state -0.5 to +5.5 V output in Low state 128 mA -65 to 150 °C DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current voltage3 VOUT DC output IOUT DC output current Tstg Storage temperature range NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC PARAMETER UNIT DC supply voltage Min Max 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level input voltage 0.8 V IOH High-level output current -32 mA IOL Low-level output current 64 mA 0 10 ns/V -40 +85 °C ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range 1995 Sep 06 2.0 4 V Philips Semiconductors Product specification Octal D-type flip-flop 74ABT273A DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Min VIK VOH Input clamp voltage High-level output voltage Tamb = -40°C to +85°C Tamb = +25°C VCC = 4.5V; IIK = -18mA Typ Max -0.9 -1.2 Min UNIT Max -1.2 VCC = 4.5V; IOH = -3mA; VI = VIL or VIH 2.5 2.9 2.5 VCC = 5.0V; IOH = -3mA; VI = VIL or VIH 3.0 3.4 3.0 VCC = 4.5V; IOH = -32mA; VI = VIL or VIH 2.0 2.4 2.0 V V VOL Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.42 0.55 0.55 V VRST Power-up output low voltage3 VCC = 5.5V; IO = 1mA; VI = GND or VCC 0.13 0.55 0.55 V II Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA IOFF Power-off leakage current VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA ICEX Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC 5.0 50 50 µA -70 -180 -180 mA VCC = 5.5V; Outputs High, VI = GND or VCC 150 250 250 µA VCC = 5.5V; Outputs Low, VI = GND or VCC 24 30 30 mA VCC = 5.5V; One data input at 3.4V, other inputs at VCC or GND 0.5 1.5 1.5 mA IO ICCH Output current1 Quiescent supply current ICCL ∆ICC Additional supply current per input pin2 VCC = 5.5V; VO = 2.5V -50 -50 NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER Tamb = +25°C VCC = +5.0V WAVEFORM Min Typ Tamb = -40°C to +85°C VCC = +5.0V ±0.5V Max Min UNIT Max fMAX Maximum clock frequency 1 250 350 tPLH tPHL Propagation delay CP to Qn 1 1.5 2.0 3.0 3.4 4.0 4.6 1.5 2.0 4.8 4.8 ns tPHL Propagation delay MR to Qn 2 2.5 4.5 6.0 2.5 6.6 ns 1995 Sep 06 5 250 MHz Philips Semiconductors Product specification Octal D-type flip-flop 74ABT273A AC SETUP REQUIREMENTS GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER Tamb = +25°C VCC = +5.0V WAVEFORM Tamb = -40°C to +85°C VCC = +5.0V ±0.5V Min Typ Min UNIT ts(H) ts(L) Setup time, High or Low Dn to CP 3 1.5 1.5 0.6 0.4 1.5 1.5 th(H) th(L) Hold time, High or Low Dn to CP 3 0.7 0.7 -0.5 -0.5 0.7 0.7 ns tw(H) tw(L) Clock pulse width High or Low 1 1.5 2.0 0.8 1.0 1.5 2.0 ns tw(L) Master Reset pulse width, Low 2 1.5 0.8 1.5 ns tREC Recovery time MR to CP 2 1.5 0.5 1.5 ns AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V The shaded areas indicate when the input is permitted to change for predictable output performance. 1/fMAX Dn CP VM VM tw(H) VM VM VM VM ts(H) th(H) ts(L) th(L) tw(L) tPLH tPHL Qn VM VM CP VM VM VM SF00191 SA00056 Waveform 3. Data Setup and Hold Times Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency MR VM VM tw(L) tREC VM CP tPHL Qn VM SF00158 Waveform 2. Master Reset Pulse Width, Master Reset to Output Delay and Master Reset to Clock Recovery Time 1995 Sep 06 6 Philips Semiconductors Product specification Octal D-type flip-flop 74ABT273A TEST CIRCUIT AND WAVEFORMS VCC 7.0V PULSE GENERATOR VOUT VIN tW 90% VM NEGATIVE PULSE 10% 0V tTLH (tR) tTHL (tF) CL AMP (V) VM 10% RL D.U.T. RT 90% tTLH (tR) RL tTHL (tF) 90% POSITIVE PULSE Test Circuit for 3-State Outputs AMP (V) 90% VM VM 10% 10% tW SWITCH POSITION 0V TEST SWITCH VM = 1.5V All open Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 74ABT Amplitude Rep. Rate tW tR tF 3.0V 1MHz 500ns 2.5ns 2.5ns SA00057 1995 Sep 06 7 Philips Semiconductors Product specification Octal D-type flip-flop 74ABT273A DIP20: plastic dual in-line package; 20 leads (300 mil) 1995 Sep 06 8 SOT146-1 Philips Semiconductors Product specification Octal D-type flip-flop 74ABT273A SO20: plastic small outline package; 20 leads; body width 7.5 mm 1995 Sep 06 9 SOT163-1 Philips Semiconductors Product specification Octal D-type flip-flop 74ABT273A SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm 1995 Sep 06 10 SOT339-1 Philips Semiconductors Product specification Octal D-type flip-flop 74ABT273A TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm 1995 Sep 06 11 SOT360-1 Philips Semiconductors Product specification Octal D-type flip-flop 74ABT273A DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Philips Semiconductors and Philips Electronics North America Corporation register eligible circuits under the Semiconductor Chip Protection Act.  Copyright Philips Electronics North America Corporation 1995 All rights reserved. Printed in U.S.A.