74ABT377AD,112

INTEGRATED CIRCUITS 74ABT377A Octal D-type flip-flop with enable Product specification Replaces data sheet 74ABT377 of 1995 Sep 06 IC23 Data Handbook
     1997 Feb 26 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74ABT377A FEATURES DESCRIPTION • Ideal for addressable register applications • 8-bit positive edge-triggered register • Enable for address and data synchronization applications • Output capability: +64mA/-32mA • Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17 • ESD protection exceeds 2000V per MIL STD 883 Method 3015 The 74ABT377A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT377A has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) input is Low. The register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output. and 200V per Machine Model • Power-up reset The E input must be stable one setup time prior to the Low-to-High clock transition for predictable operation. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS Tamb = 25°C; GND = 0V TYPICAL UNIT tPLH tPHL Propagation delay CP to Qn CL = 50pF; VCC = 5V 3.1 3.6 ns CIN Input capacitance VI = 0V or VCC 4 pF ICCH Total current supply Outputs High; VCC = 5.5V 500 nA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 20-Pin Plastic DIP –40°C to +85°C 74ABT377A N 74ABT377A N SOT146-1 20-Pin plastic SO –40°C to +85°C 74ABT377A D 74ABT377A D SOT163-1 20-Pin Plastic SSOP Type II –40°C to +85°C 74ABT377A DB 74ABT377A DB SOT339-1 20-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT377A PW 74ABT377PWA DH SOT360-1 PIN CONFIGURATION LOGIC SYMBOL E 1 20 VCC Q0 2 19 Q7 D0 3 18 D7 D1 4 17 D6 Q1 5 16 Q6 Q2 6 15 Q5 D2 7 14 D5 D3 8 13 D4 9 12 Q4 Q3 GND 10 4 7 8 13 14 17 18 D0 D1 D2 D3 D4 D5 D6 D7 11 CP 1 OE Q0 Q1 Q2 Q3 2 5 6 9 Q4 Q5 Q6 Q7 12 15 16 19 11 CP SA00155 1997 Feb 26 3 SA00152 2 853-1457 17800 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74ABT377A LOGIC SYMBOL (IEEE/IEC) PIN DESCRIPTION PIN NUMBER 1 G1 11 SYMBOL FUNCTION Enable input (active–Low) 1 E 3, 4, 7, 8, 13, 14, 17, 18 D0-D7 Data inputs 2, 5, 6, 9, 12, 15, 16, 19 Q0-Q7 Data outputs 11 CP IC2 3 2 2D Clock Pulse input (active rising edge) 4 5 7 6 10 GND Ground (0V) 8 9 20 VCC Positive supply voltage 13 12 14 15 17 16 18 19 SA00157 LOGIC DIAGRAM D0 D1 3 D2 4 D4 D3 7 D5 13 8 D6 14 D7 17 18 1 E D Q D CP CP Q D CP Q D CP Q D CP Q D CP Q D CP Q D CP Q CP 11 2 Q0 5 Q1 6 9 Q2 Q3 12 Q4 15 Q5 16 Q6 19 Q7 SA00158 1997 Feb 26 3 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74ABT377A FUNCTION TABLE INPUTS H h L l X ↑ = = = = = = OUTPUTS OPERATING MODE E CP Dn Qn l ↑ h H Load “1” l ↑ l L Load “0” h ↑ X no change H X X no change High voltage level High voltage level one set-up time prior to the Low-to-High clock transition Low voltage level Low voltage level one set-up time prior to the Low-to-High clock transition Don’t care Low-to-High clock transition Hold (do nothing) ABSOLUTE MAXIMUM RATINGS1, 2 PARAMETER SYMBOL VCC IIK CONDITIONS RATING UNIT –0.5 to +7.0 V –18 mA –1.2 to +7.0 V VO < 0 –50 mA DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current VOUT DC output voltage3 output in Off or High state –0.5 to +5.5 V IOUT DC output current output in Low state 128 mA Tstg Storage temperature range –65 to 150 °C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER LIMITS DC supply voltage UNIT MIN MAX 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current 64 mA 0 5 ns/V –40 +85 °C ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range 1997 Feb 26 2.0 4 V Philips Semiconductors Product specification Octal D-type flip-flop with enable 74ABT377A DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN VIK VOH Input clamp voltage High–level output voltage Tamb = –40°C to +85°C Tamb = +25°C VCC = 4.5V; IIK = –18mA TYP MAX –0.9 –1.2 MIN UNIT MAX –1.2 V VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 2.9 2.5 V VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 3.4 3.0 V VCC = 4.5V; IOH = –32mA; VI = VIL or VIH 2.0 2.4 2.0 V VOL Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.42 0.55 0.55 V VRST Power-up output low voltage3 VCC = 5.5V; IO = 1mA; VI = GND or VCC 0.13 0.55 0.55 V II Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA VCC = 5.5V; VO = 5.5V; VI = GND or VCC 5.0 50 50 µA –100 –180 –180 mA VCC = 5.5V; Outputs High, VI = GND or VCC 0.5 250 250 µA VCC = 5.5V; Outputs Low, VI = GND or VCC 24 30 30 mA VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND 0.5 1.5 1.5 mA IOFF Power-off leakage current ICEX Output High leakage current IO ICCH Output current1 Quiescent supply current ICCL ∆ICC VCC = 5.5V; VO = 2.5V Additional supply current per input pin2 –50 –50 NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS1 SYMBOL fMAX PARAMETER Maximum clock frequency tPLH Propagation delay tPHL CP to Qn NOTE: 1. Limits may vary among suppliers. 1997 Feb 26 Tamb = -40 to +85oC VCC = +5.0V +0.5V Tamb = +25oC VCC = +5.0V WAVEFORM MIN TYP 1 150 250 1 1.8 2.2 3.1 3.6 5 MAX MIN MAX 150 4.0 4.7 1.8 2.2 UNIT MHz 4.8 4.9 ns Philips Semiconductors Product specification Octal D-type flip-flop with enable 74ABT377A AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER +25oC Tamb = -40 to +85oC VCC = +5.0V +0.5V Tamb = VCC = +5.0V WAVEFORM MIN TYP MIN UNIT ts(H) ts(L) Setup time, High or Low Dn to CP 2 1.5 1.5 0.7 0.5 1.5 1.5 ns th(H) th(L) Hold time, High or Low Dn to CP 2 1.0 1.0 –0.4 –0.6 1.0 1.0 ns ts(H) ts(L) Setup time, High or Low E to CP 2 2.0 2.0 1.1 1.0 2.0 2.0 ns th(H) th(L) Hold time, High or Low E to CP 2 1.0 1.0 –0.9 –0.1 1.0 1.0 ns tw(H) tw(L) Clock Pulse width High or Low 1 1.5 2.0 0.7 1.0 1.5 2.0 ns AC WAVEFORMS ÉÉÉ ÉÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉ VM = 1.5V, VIN = GND to 3.0V Dn 1/fMAX VM VM th CP VM tW(H) tW(L) tPHL Qn ts VM E tPLH VM VM VM VM th(L) VM ts(L) CP SA00159 Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width and Maximum Clock Frequency VM th(H) ts(H) VM NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. SA00160 Waveform 2. Data and Enable Setup and Hold Times 1997 Feb 26 VM 6 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74ABT377A TEST CIRCUIT AND WAVEFORM VCC 7.0V PULSE GENERATOR VIN tW 90% VOUT VM NEGATIVE PULSE 10% 0V tTLH (tR) tTHL (tF) CL AMP (V) VM 10% RL D.U.T. RT 90% tTLH (tR) RL tTHL (tF) 90% POSITIVE PULSE Test Circuit for 3-State Outputs AMP (V) 90% VM VM 10% 10% tW SWITCH POSITION 0V TEST SWITCH VM = 1.5V All open Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 74ABT Amplitude Rep. Rate tW tR tF 3.0V 1MHz 500ns 2.5ns 2.5ns SA00057 1997 Feb 26 7 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74ABT377A DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.  Copyright Philips Electronics North America Corporation 1997 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381
     1997 Feb 26 8 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74ABT377 DIP20: plastic dual in-line package; 20 leads (300 mil) 1995 Sep 06 9 SOT146-1 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74ABT377 SO20: plastic small outline package; 20 leads; body width 7.5 mm 1995 Sep 06 10 SOT163-1 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74ABT377 SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm 1995 Sep 06 11 SOT339-1 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74ABT377 TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm 1995 Sep 06 12 SOT360-1