74AHC139D

74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer Rev. 02 — 9 May 2008 Product data sheet 1. General description The 74AHC139; 74AHCT139 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC139; 74AHCT139 is a high-speed, dual 2-to-4 line decoder/demultiplexer. This device has two independent decoders, each accepting two binary weighted inputs (nA0 and nA1) and providing four mutually exclusive active LOW outputs (nY0 to nY3). Each decoder has an active LOW enable input (nE). When nE is HIGH, every output is forced HIGH. The enable input can be used as the data input for a 1-to-4 demultiplexer application. The 74AHC139; 74AHCT139 is identical to the HEF4556 of the HE4000B family. 2. Features I I I I Balanced propagation delays All inputs have Schmitt-trigger actions Inputs accept voltages higher than VCC Input levels: N For 74AHC139: CMOS level N For 74AHCT139: TTL level I ESD protection: N HBM EIA/JESD22-A114E exceeds 2000 V N MM EIA/JESD22-A115-A exceeds 200 V N CDM EIA/JESD22-C101C exceeds 1000 V I Multiple package options I Specified from −40 °C to +85 °C and from −40 °C to +125 °C 3. Ordering information Table 1. Ordering information Package Temperature range Name 74AHC139 74AHC139D 74AHC139PW −40 °C to +125 °C −40 °C to +125 °C SO16 TSSOP16 plastic small outline package; 16 leads; body width 3.9 mm plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT109-1 SOT403-1 Description Version Type number NXP Semiconductors 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer Table 1. Ordering information …continued Package Temperature range Name Description plastic small outline package; 16 leads; body width 3.9 mm plastic thin shrink small outline package; 16 leads; body width 4.4 mm Version SOT109-1 SOT403-1 Type number 74AHCT139 74AHCT139D 74AHCT139PW −40 °C to +125 °C −40 °C to +125 °C SO16 TSSOP16 4. Functional diagram 1 1E 1Y0 2 3 1A0 1A1 1Y1 1Y2 1Y3 2Y0 14 13 2A0 2A1 2E 15 mna779 4 5 6 7 12 11 10 9 2 3 1 DX 0 01 G 3 1 2 0 3 DX 0 01 G 3 1 2 0 3 4 5 6 7 2 3 1 1 2 EN X/Y 0 1 2 3 X/Y 0 1 2 EN 1 2 3 4 5 6 7 12 11 10 9 14 13 15 12 11 10 9 2Y1 2Y2 2Y3 14 13 15 (a) a = demultiplexer and b = decoder (b) mna781 Fig 1. Logic symbol Fig 2. IEC logic symbol 1Y0 2 3 1A0 1A1 DECODER 1Y1 1Y2 1Y3 1 1E 4 5 6 7 2Y0 12 14 13 2A0 2A1 DECODER 2Y1 11 2Y2 10 2Y3 15 2E mna780 9 Fig 3. Functional diagram 74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 9 May 2008 2 of 14 NXP Semiconductors 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer 5. Pinning information 5.1 Pinning 1E 1A0 1A1 1Y0 1Y1 1Y2 1Y3 GND 1 2 3 4 16 VCC 15 2E 14 2A0 13 2A1 139 5 6 7 8 001aad029 12 2Y0 11 2Y1 10 2Y2 9 2Y3 Fig 4. Pin configuration 5.2 Pin description Table 2. Symbol 1E 1A0 1A1 1Y0 1Y1 1Y2 1Y3 GND 2Y3 2Y2 2Y1 2Y0 2A1 2A0 2E VCC Pin description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Description enable input (active LOW) address input address input output output output output ground (0 V) output output output output address input address input enable input (active LOW) supply voltage 74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 9 May 2008 3 of 14 NXP Semiconductors 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer 6. Functional description Table 3. Control nE H L Function table[1] Input nA0 X L H L H [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care. Output nA1 X L L H H nY0 H L H H H nY1 H H L H H nY2 H H H L H nY3 H H H H L 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC VI IIK IOK IO ICC IGND Tstg Ptot [1] [2] Parameter supply voltage input voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation Conditions Min −0.5 −0.5 Max +7.0 +7.0 +20 +25 +75 +150 500 Unit V V mA mA mA mA mA °C mW VI < −0.5 V VO < −0.5 V or VO > VCC + 0.5 V VO = −0.5 V to (VCC + 0.5 V) [1] [1] −20 −20 −25 −75 −65 Tamb = −40 °C to +125 °C [2] - The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SO16 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K. For TSSOP16 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K. 74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 9 May 2008 4 of 14 NXP Semiconductors 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer 8. Recommended operating conditions Table 5. 74AHC139 VCC VI VO Tamb ∆t/∆V supply voltage input voltage output voltage ambient temperature input transition rise and fall rate VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V 74AHCT139 VCC VI VO Tamb ∆t/∆V supply voltage input voltage output voltage ambient temperature input transition rise and fall rate VCC = 4.5 V to 5.5 V 4.5 0 0 −40 5.0 +25 5.5 5.5 VCC +125 20 V V V °C ns/V 2.0 0 0 −40 5.0 +25 5.5 5.5 VCC +125 100 20 V V V °C ns/V ns/V Operating conditions Conditions Min Typ Max Unit Symbol Parameter 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 74AHC139 VIH HIGH-level input voltage VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VIL LOW-level input voltage VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VOH HIGH-level VI = VIH or VIL output voltage IO = −50 µA; VCC = 2.0 V IO = −50 µA; VCC = 3.0 V IO = −50 µA; VCC = 4.5 V IO = −4.0 mA; VCC = 3.0 V IO = −8.0 mA; VCC = 4.5 V VOL LOW-level VI = VIH or VIL output voltage IO = 50 µA; VCC = 2.0 V IO = 50 µA; VCC = 3.0 V IO = 50 µA; VCC = 4.5 V IO = 4.0 mA; VCC = 3.0 V IO = 8.0 mA; VCC = 4.5 V 74AHC_AHCT139_2 Conditions Min 1.5 2.1 3.85 1.9 2.9 4.4 2.58 3.94 - 25 °C Typ 2.0 3.0 4.5 0 0 0 Max 0.5 0.9 1.65 0.1 0.1 0.1 0.36 0.36 −40 °C to +85 °C −40 °C to +125 °C Unit Min 1.5 2.1 3.85 1.9 2.9 4.4 2.48 3.80 Max 0.5 0.9 1.65 0.1 0.1 0.1 0.44 0.44 Min 1.5 2.1 3.85 1.9 2.9 4.4 2.40 3.70 Max 0.5 0.9 1.65 0.1 0.1 0.1 0.55 0.55 V V V V V V V V V V V V V V V V © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 9 May 2008 5 of 14 NXP Semiconductors 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter II ICC CI CO input leakage current Conditions Min VI = 5.5 V or GND; VCC = 0 V to 5.5 V 25 °C Typ 3 4 Max 0.1 4.0 10 −40 °C to +85 °C −40 °C to +125 °C Unit Min Max 1.0 40 10 Min Max 2.0 80 10 µA µA pF pF supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V input capacitance output capacitance HIGH-level input voltage LOW-level input voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VCC or GND 74AHCT139 VIH VIL VOH 2.0 0.8 2.0 0.8 2.0 0.8 V V HIGH-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = −50 µA IO = −8.0 mA LOW-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 50 µA IO = 8.0 mA input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V 4.4 3.94 - 4.5 0 - 0.1 0.36 0.1 4.0 1.35 4.4 3.80 - 0.1 0.44 1.0 40 1.5 4.4 3.70 - 0.1 0.55 2.0 80 1.5 V V V V µA µA mA VOL II ICC ∆ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V additional per input pin; supply current VI = VCC − 2.1 V; other pins at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V input capacitance output capacitance VI = VCC or GND CI CO - 3 4 10 - - 10 - - 10 - pF pF 74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 9 May 2008 6 of 14 NXP Semiconductors 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter 74AHC139 tpd propagation nAn to nYn; see Figure 5 delay VCC = 3.0 V to 3.6 V CL = 15 pF CL = 50 pF VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF nE to nYn; see Figure 6 VCC = 3.0 V to 3.6 V CL = 15 pF CL = 50 pF VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF CPD power fi = 1 MHz; VI = GND to VCC dissipation capacitance propagation nAn to nYn; see Figure 5 delay CL = 15 pF CL = 50 pF nE to nYn; see Figure 6 CL = 15 pF CL = 50 pF CPD power fi = 1 MHz; VI = GND to VCC dissipation capacitance [3] [2] [3] [2] [2] Conditions Min 25 °C Typ[1] Max −40 °C to +85 °C −40 °C to +125 °C Unit Min Max Min Max - 5.5 7.9 3.9 5.6 11.0 14.5 7.2 9.2 1.0 1.0 1.0 1.0 13.0 16.5 8.5 10.5 1.0 1.0 1.0 1.0 14.0 18.5 9.0 11.5 ns ns ns ns - 4.8 6.9 3.4 4.9 26 9.2 12.7 6.3 8.3 - 1.0 1.0 1.0 1.0 - 11.0 14.5 7.5 9.5 - 1.0 1.0 1.0 1.0 - 11.5 16.0 8.0 10.5 - ns ns ns ns pF 74AHCT139; VCC = 4.5 V to 5.5 V tpd [2] - 4.7 6.5 3.6 5.2 23 7.2 9.2 6.3 8.3 - 1.0 1.0 1.0 1.0 - 8.5 10.5 7.5 9.5 - 1.0 1.0 1.0 1.0 - 9.0 11.5 8.0 10.5 - ns ns ns ns pF [1] [2] [3] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). tpd is the same as tPLH and tPHL. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. 74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 9 May 2008 7 of 14 NXP Semiconductors 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer 11. Waveforms VI nAn input GND t PHL VOH nYn output VOL mna782 VM t PLH VM Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 5. Address input to output propagation delays VI nE input GND tPHL VOH nYn output VOL mna783 VM tPLH VM Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Table 8. Type Enable input to output propagation delays Measurement points Input VM 0.5 × VCC 1.5 V Output VM 0.5 × VCC 0.5 × VCC 74AHC139 74AHCT139 74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 9 May 2008 8 of 14 NXP Semiconductors 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer VI negative pulse GND tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW VCC G VI VO VM VI positive pulse GND VM DUT RT CL 001aah768 Test data is given in Table 9. Definitions test circuit: RT = termination resistance should be equal to output impedance Zo of the pulse generator. CL = load capacitance including jig and probe capacitance. Fig 7. Table 9. Type Load circuitry for measuring switching times Test data Input VI tr, tf ≤ 3.0 ns ≤ 3.0 ns VCC 3.0 V Load CL 15 pF, 50 pF 15 pF, 50 pF tPLH, tPHL tPLH, tPHL Test 74AHC139 74AHCT139 74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 9 May 2008 9 of 14 NXP Semiconductors 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer 12. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE vMA Z 16 9 Q A2 pin 1 index θ Lp 1 e bp 8 wM L detail X A1 (A 3) A 0 2.5 scale 5 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07 JEDEC MS-012 JEITA EUROPEAN PROJECTION A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3 θ 0.010 0.057 0.069 0.004 0.049 0.019 0.0100 0.39 0.014 0.0075 0.38 0.244 0.041 0.228 0.028 0.004 0.012 8 o 0 o ISSUE DATE 99-12-27 03-02-19 Fig 8. Package outline SOT109-1 (SO16) © NXP B.V. 2008. All rights reserved. 74AHC_AHCT139_2 Product data sheet Rev. 02 — 9 May 2008 10 of 14 NXP Semiconductors 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 D E A X c y HE vMA Z 16 9 Q A2 pin 1 index A1 θ Lp L (A 3) A 1 e bp 8 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.40 0.06 θ 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 Fig 9. Package outline SOT403-1 (TSSOP16) © NXP B.V. 2008. All rights reserved. 74AHC_AHCT139_2 Product data sheet Rev. 02 — 9 May 2008 11 of 14 NXP Semiconductors 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer 13. Abbreviations Table 10. Acronym CDM CMOS DUT ESD HBM LSTTL MM Abbreviations Description Charged Device Model Complementary Metal-Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Low-power Schottky Transistor-Transistor Logic Machine Model 14. Revision history Table 11. Revision history Release date 20080509 Data sheet status Product data sheet Change notice Supersedes 74AHC_AHCT139_1 Document ID 74AHC_AHCT139_2 Modifications: • • • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Table 6: the conditions for input leakage current have been changed. Product specification - 74AHC_AHCT139_1 19990901 74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 9 May 2008 12 of 14 NXP Semiconductors 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer 15. Legal information 15.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 15.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 9 May 2008 13 of 14 NXP Semiconductors 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 9 May 2008 Document identifier: 74AHC_AHCT139_2