74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
Rev. 02 — 9 May 2008 Product data sheet
1. General description
The 74AHC257; 74AHCT257 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC257; 74AHCT257 has four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (S). The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data inputs from source 1 (1I1 to 4I1) are selected when input S is HIGH. Data appears at the outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs. The 74AHC257; 74AHCT257 is the logic implementation of a 4-pole 2-position switch, where the position of the switch is determined by the logic levels applied to input S. The outputs are forced to a high-impedance OFF-state when OE is HIGH. The logic equations for the outputs are: 1Y = OE × (1I1 × S + 1I0 × S) 2Y = OE × (2I1 × S + 2I0 × S) 3Y = OE × (3I1 × S + 3I0 × S) 4Y = OE × (4I1 × S + 4I0 × S) The 74AHC257; 74AHCT257 is identical to the 74AHC258; 74AHCT258, but has non-inverting (true) outputs.
2. Features
I I I I I Balanced propagation delays All inputs have Schmitt-trigger actions Non-inverting data path Inputs accept voltages higher than VCC Input levels: N For 74AHC257: CMOS level N For 74AHCT257: TTL level I ESD protection: N HBM EIA/JESD22-A114E exceeds 2000 V N MM EIA/JESD22-A115-A exceeds 200 V N CDM EIA/JESD22-C101C exceeds 1000 V I Multiple package options I Specified from −40 °C to +85 °C and from −40 °C to +125 °C
NXP Semiconductors
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
3. Ordering information
Table 1. Ordering information Package Temperature range Name 74AHC257 74AHC257D 74AHC257PW 74AHCT257 74AHCT257D 74AHCT257PW −40 °C to +125 °C −40 °C to +125 °C SO16 TSSOP16 plastic small outline package; 16 leads; body width 3.9 mm plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT109-1 SOT403-1 −40 °C to +125 °C −40 °C to +125 °C SO16 TSSOP16 plastic small outline package; 16 leads; body width 3.9 mm plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT109-1 SOT403-1 Description Version Type number
4. Functional diagram
2 3 5 6 11 10 14 13
1I0 1I1
2I0 2I1
3I0 3I1
4I0 4I1
1S
SELECTOR
15 OE
3-STATE MULTIPLEXER OUTPUTS 1Y 4 2Y 7 3Y 9 4Y 12
mgr280
Fig 1.
Functional diagram
74AHC_AHCT257_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
2 of 16
NXP Semiconductors
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
1 15 1 2 3 5 6 11 10 14 13 15 1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1 OE
mga835
G1
EN
S 1Y 4
2 3 5
1 1
MUX
4
2Y
7
7 6 11 9 10
3Y
9
4Y
12
14 12 13
001aad467
Fig 2.
Logic symbol
Fig 3.
IEC logic symbol
1I0 1Y 1I1
2I0 2Y 2I1
3I0 3Y 3I1
4I0 4Y 4I1
OE
S
001aad468
Fig 4.
Logic diagram
74AHC_AHCT257_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
3 of 16
NXP Semiconductors
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
5. Pinning information
5.1 Pinning
S 1I0 1I1 1Y 2I0 2I1 2Y GND
1 2 3 4 5 6 7 8
001aad499
16 VCC 15 OE 14 4I0 13 4I1 12 4Y 11 3I0 10 3I1 9 3Y
257
Fig 5.
Pin configuration SO16 and TSSOP16
5.2 Pin description
Table 2. Symbol S 1I0 1I1 1Y 2I0 2I1 2Y GND 3Y 3I1 3I0 4Y 4I1 4I0 OE VCC Pin description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Description common data select input data input from source 0 data input from source 1 multiplexer output data input from source 0 data input from source 1 multiplexer output ground (0 V) multiplexer output data input from source 1 data input from source 0 multiplexer output data input from source 1 data input from source 0 output enable input (active LOW) supply voltage
74AHC_AHCT257_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
4 of 16
NXP Semiconductors
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
6. Functional description
Table 3. Control OE H L S X H L Function table[1] Input nI0 X X X L H
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Output nI1 X L H X X nY Z L H L H
7. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC VI IIK IOK IO ICC IGND Tstg Ptot
[1] [2]
Parameter supply voltage input voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation
Conditions
Min −0.5 −0.5
Max +7.0 +7.0 +20 +25 +75 +150 500
Unit V V mA mA mA mA mA °C mW
VI < −0.5 V VO < −0.5 V or VO > VCC + 0.5 V VO = −0.5 V to (VCC + 0.5 V)
[1] [1]
−20 −20 −25 −75 −65
Tamb = −40 °C to +125 °C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SO16 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K. For TSSOP16 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K.
74AHC_AHCT257_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
5 of 16
NXP Semiconductors
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
8. Recommended operating conditions
Table 5. Symbol 74AHC257 VCC VI VO Tamb ∆t/∆V 74AHCT257 VCC VI VO Tamb ∆t/∆V supply voltage input voltage output voltage ambient temperature input transition rise and fall rate VCC = 4.5 V to 5.5 V 4.5 0 0 −40 5.0 +25 5.5 5.5 VCC +125 20 V V V °C ns/V supply voltage input voltage output voltage ambient temperature input transition rise and fall rate VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V 2.0 0 0 −40 5.0 +25 5.5 5.5 VCC +125 100 20 V V V °C ns/V ns/V Operating conditions Parameter Conditions Min Typ Max Unit
9. Static characteristics
Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 74AHC257 VIH HIGH-level input voltage VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VIL LOW-level input voltage VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VOH HIGH-level VI = VIH or VIL output voltage IO = −50 µA; VCC = 2.0 V IO = −50 µA; VCC = 3.0 V IO = −50 µA; VCC = 4.5 V IO = −4.0 mA; VCC = 3.0 V IO = −8.0 mA; VCC = 4.5 V VOL LOW-level VI = VIH or VIL output voltage IO = 50 µA; VCC = 2.0 V IO = 50 µA; VCC = 3.0 V IO = 50 µA; VCC = 4.5 V IO = 4.0 mA; VCC = 3.0 V IO = 8.0 mA; VCC = 4.5 V
74AHC_AHCT257_2
Conditions Min 1.5 2.1 3.85 1.9 2.9 4.4 2.58 3.94 -
25 °C Typ 2.0 3.0 4.5 0 0 0 Max 0.5 0.9 1.65 0.1 0.1 0.1 0.36 0.36
−40 °C to +85 °C −40 °C to +125 °C Unit Min 1.5 2.1 3.85 1.9 2.9 4.4 2.48 3.80 Max 0.5 0.9 1.65 0.1 0.1 0.1 0.44 0.44 Min 1.5 2.1 3.85 1.9 2.9 4.4 2.40 3.70 Max 0.5 0.9 1.65 0.1 0.1 0.1 0.55 0.55 V V V V V V V V V V V V V V V V
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
6 of 16
NXP Semiconductors
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter II IOZ input leakage current Conditions Min VI = 5.5 V or GND; VCC = 0 V to 5.5 V 25 °C Typ Max 0.1 ±0.25 −40 °C to +85 °C −40 °C to +125 °C Unit Min Max 1.0 ±2.5 Min Max 2.0 ±10.0 µA µA
OFF-state VI = VIH or VIL; output current VO = VCC or GND; VCC = 5.5 V supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V input capacitance output capacitance HIGH-level input voltage LOW-level input voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VCC or GND
ICC CI CO
-
3 4
4.0 10 -
-
40 10 -
-
80 10 -
µA pF pF
74AHCT257 VIH VIL VOH 2.0 0.8 2.0 0.8 2.0 0.8 V V
HIGH-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = −50 µA IO = −8.0 mA LOW-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 50 µA IO = 8.0 mA input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V
4.4 3.94 -
4.5 0 -
0.1 0.36 0.1 ±0.25
4.4 3.80 -
0.1 0.44 1.0 ±2.5
4.4 3.70 -
0.1 0.55 2.0 ±10.0
V V V V µA µA
VOL
II IOZ
OFF-state VI = VIH or VIL; output current VO = VCC or GND per input pin; other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V additional per input pin; supply current VI = VCC − 2.1 V; other pins at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V input capacitance output capacitance VI = VCC or GND
ICC ∆ICC
-
-
4.0 1.35
-
40 1.5
-
80 1.5
µA mA
CI CO
-
3 4
10 -
-
10 -
-
10 -
pF pF
74AHC_AHCT257_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
7 of 16
NXP Semiconductors
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
10. Dynamic characteristics
Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8. Symbol Parameter 74AHC257 tpd propagation nI0, nI1 to nY; see Figure 6 delay VCC = 3.0 V to 3.6 V CL = 15 pF CL = 50 pF VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF S to nY; see Figure 6 VCC = 3.0 V to 3.6 V CL = 15 pF CL = 50 pF VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF ten enable time OE to nY; see Figure 7 VCC = 3.0 V to 3.6 V CL = 15 pF CL = 50 pF VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF tdis disable time OE to nY; see Figure 7 VCC = 3.0 V to 3.6 V CL = 15 pF CL = 50 pF VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF CPD power fi = 1 MHz; VI = GND to VCC dissipation 4 outputs switching via capacitance input S 1 output switching via input I
[5] [4] [3] [2] [2]
Conditions Min
25 °C Typ[1] Max
−40 °C to +85 °C −40 °C to +125 °C Unit Min Max Min Max
-
4.2 6.0 2.9 4.2
9.3 12.8 5.9 7.9
1.0 1.0 1.0 1.0
11.0 14.5 7.0 9.0
1.0 1.0 1.0 1.0
12.0 16.0 7.5 11.5
ns ns ns ns
-
5.2 7.4 3.5 5.0
11.0 14.5 6.8 8.8
1.0 1.0 1.0 1.0
13.0 16.5 8.0 10.0
1.0 1.0 1.0 1.0
14.0 18.5 8.5 12.5
ns ns ns ns
-
4.5 6.4 3.2 4.5
10.5 14.0 6.8 8.8
1.0 1.0 1.0 1.0
12.5 16.0 8.0 10.0
1.0 1.0 1.0 1.0
13.5 17.5 8.5 12.5
ns ns ns ns
-
5.1 7.2 3.4 4.9 45 15
9.5 12.0 6.5 7.9 -
1.0 1.0 1.0 1.0 -
11.0 13.5 7.0 9.0 -
1.0 1.0 1.0 1.0 -
11.5 14.5 8.5 9.5 -
ns ns ns ns pF pF
74AHC_AHCT257_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
8 of 16
NXP Semiconductors
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8. Symbol Parameter Conditions Min 74AHCT257; VCC = 4.5 V to 5.5 V tpd propagation nI0, nI1 to nY; see Figure 6 delay CL = 15 pF CL = 50 pF S to nY; see Figure 6 CL = 15 pF CL = 50 pF ten enable time OE to nY; see Figure 7 CL = 15 pF CL = 50 pF tdis disable time OE to nY; see Figure 7 CL = 15 pF CL = 50 pF CPD power fi = 1 MHz; VI = GND to VCC dissipation 4 outputs switching via capacitance input S 1 output switching via input I
[1] [2] [3] [4] [5]
[5] [4] [3] [2] [2]
25 °C Typ[1] Max
−40 °C to +85 °C −40 °C to +125 °C Unit Min Max Min Max
-
3.7 4.9 5.1 6.4 3.9 5.1 4.5 6.5 51 15
6.5 8.5 9.0 10.5 8.0 10.0 7.5 9.5 -
1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 -
8.0 10.0 10.5 12.5 9.0 11.0 8.0 10.5 -
1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 -
9.0 11.0 11.5 13.5 10.0 12.0 8.5 11.5 -
ns ns ns ns ns ns ns ns pF pF
Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs.
74AHC_AHCT257_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
9 of 16
NXP Semiconductors
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
11. Waveforms
VI nI0, nI1, S input GND t PHL VOH nY output VOL VM
mna486
VM
t PLH
Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6.
Data inputs and common data select input to output propagation delays
VI OE input GND t PLZ VCC Qn output LOW-to-OFF OFF-to-LOW VOL t PHZ VOH Qn output HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled outputs enabled
mna813
VM
t PZL
VM VX t PZH VY VM
Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load.
Fig 7. Table 8. Type
Enable and disable times Measurement points Input VM 0.5 × VCC 1.5 V Output VM 0.5 × VCC 0.5 × VCC VX VOL + 0.3 V VOL + 0.3 V VY VOH − 0.3 V VOH − 0.3 V
74AHC257 74AHCT257
74AHC_AHCT257_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
10 of 16
NXP Semiconductors
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
VI negative pulse 0V
tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW VM VM
VI positive pulse 0V
VCC
VCC
G
VI
VO
RL
S1
DUT
RT CL
open
001aad983
Test data is given in Table 9. Definitions test circuit: RT = termination resistance should be equal to output impedance Zo of the pulse generator. CL = load capacitance including jig and probe capacitance. RL = load resistance. S1 = test selection switch.
Fig 8. Table 9. Type
Test circuitry for measuring switching times Test data Input VI tr, tf ≤ 3.0 ns ≤ 3.0 ns VCC 3.0 V Load CL 15 pF, 50 pF 15 pF, 50 pF RL 1 kΩ 1 kΩ S1 position tPHL, tPLH open open tPZH, tPHZ GND GND tPZL, tPLZ VCC VCC
74AHC257 74AHCT257
74AHC_AHCT257_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
11 of 16
NXP Semiconductors
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
12. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
D
E
A X
c y HE vMA
Z 16 9
Q A2 pin 1 index θ Lp 1 e bp 8 wM L detail X A1 (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07 JEDEC MS-012 JEITA EUROPEAN PROJECTION A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3 θ
0.010 0.057 0.069 0.004 0.049
0.019 0.0100 0.39 0.014 0.0075 0.38
0.244 0.041 0.228
0.028 0.004 0.012
8 o 0
o
ISSUE DATE 99-12-27 03-02-19
Fig 9.
Package outline SOT109-1 (SO16)
© NXP B.V. 2008. All rights reserved.
74AHC_AHCT257_2
Product data sheet
Rev. 02 — 9 May 2008
12 of 16
NXP Semiconductors
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c y HE vMA
Z
16
9
Q A2 pin 1 index A1 θ Lp L (A 3) A
1
e bp
8
wM detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.40 0.06 θ 8 o 0
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18
Fig 10. Package outline SOT403-1 (TSSOP16)
74AHC_AHCT257_2 © NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
13 of 16
NXP Semiconductors
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
13. Abbreviations
Table 10. Acronym CDM CMOS DUT ESD HBM LSTTL MM Abbreviations Description Charged Device Model Complementary Metal-Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Low-power Schottky Transistor-Transistor Logic Machine Model
14. Revision history
Table 11. Revision history Release date 20080509 Data sheet status Product data sheet Change notice Supersedes 74AHC_AHCT257_1 Document ID 74AHC_AHCT257_2 Modifications:
• • •
The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Table 6: the conditions for input leakage current have been changed. Product specification -
74AHC_AHCT257_1
20000403
74AHC_AHCT257_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
14 of 16
NXP Semiconductors
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
15. Legal information
15.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
15.3 Disclaimers
General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
74AHC_AHCT257_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
15 of 16
NXP Semiconductors
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
17. Contents
1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Contact information. . . . . . . . . . . . . . . . . . . . . 15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 9 May 2008 Document identifier: 74AHC_AHCT257_2