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74AHC1G07; 74AHCT1G07
Buffer with open-drain output
Rev. 7 — 18 November 2014
Product data sheet
1. General description
74AHC1G07 and 74AHCT1G07 are high-speed Si-gate CMOS devices. They provide a
non-inverting buffer.
The output of these devices is open-drain and can be connected to other open-drain
outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. For
digital operation this device must have a pull-up resistor to establish a logic HIGH-level.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
2. Features and benefits
High noise immunity
Low power dissipation
SOT353-1 and SOT753 package options
ESD protection:
HBM JESD22-A114E: exceeds 2000 V
MM JESD22-A115-A: exceeds 200 V
CDM JESD22-C101C: exceeds 1000 V
Specified from 40 C to +125 C
3. Ordering information
Table 1.
Ordering information
Type number
74AHC1G07GW
Package
Temperature range
Name
Description
Version
40 C to +125 C
TSSOP5
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
SOT353-1
40 C to +125 C
SC-74A
plastic surface-mounted package; 5 leads
SOT753
74AHCT1G07GW
74AHC1G07GV
74AHCT1G07GV
74AHC1G07; 74AHCT1G07
NXP Semiconductors
Buffer with open-drain output
4. Marking
Table 2.
Marking codes
Type number
Marking[1]
74AHC1G07GW
AS
74AHC1G07GV
A07
74AHCT1G07GW
CS
74AHCT1G07GV
C07
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
<
$
<
$
Logic symbol
$
*1'
PQD
PQD
Fig 1.
<
Fig 2.
IEC logic symbol
Fig 3.
PQD
Logic diagram
6. Pinning information
6.1 Pinning
$+&*
$+&7*
QF
$
*1'
9&&
<
DDI
Fig 4.
Pin configuration
6.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
n.c.
1
not connected
A
2
data input
GND
3
ground (0 V)
Y
4
data output
VCC
5
supply voltage
74AHC_AHCT1G07
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 18 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
2 of 12
74AHC1G07; 74AHCT1G07
NXP Semiconductors
Buffer with open-drain output
7. Functional description
Table 4.
Function table
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state
Input
Output
A
Y
L
L
H
Z
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
VCC
supply voltage
VI
input voltage
IIK
input clamping current
VI < 0.5 V
IOK
output clamping current
VO < 0.5 V
IO
output current
VO > 0.5 V
output voltage
VO
Conditions
[1]
Min
Max
Unit
0.5
+7.0
V
0.5
+7.0
V
20
-
mA
-
20
mA
-
25
mA
active mode
[1]
0.5
+7.0
V
high-impedance mode
[1]
0.5
+7.0
V
ICC
supply current
-
75
mA
IGND
ground current
75
-
mA
Tstg
storage temperature
65
+150
C
Ptot
total power dissipation
-
250
mW
Tamb = 40 C to +125 C
[2]
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
For both TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VCC
supply voltage
VI
input voltage
VO
output voltage
Tamb
ambient temperature
t/V
input transition rise
and fall rate
74AHC_AHCT1G07
Product data sheet
Conditions
74AHC1G07
74AHCT1G07
Unit
Min
Typ
Max
Min
Typ
Max
2.0
5.0
5.5
4.5
5.0
5.5
V
0
-
5.5
0
-
5.5
V
active mode
0
-
VCC
0
-
VCC
V
high-impedance mode
0
-
6.0
0
-
6.0
V
40
+25
+125
40
+25
+125
C
VCC = 3.3 V 0.3 V
-
-
100
-
-
-
ns/V
VCC = 5.0 V 0.5 V
-
-
20
-
-
20
ns/V
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 18 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
3 of 12
74AHC1G07; 74AHCT1G07
NXP Semiconductors
Buffer with open-drain output
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
VCC = 2.0 V
1.5
-
-
1.5
-
1.5
-
V
VCC = 3.0 V
2.1
-
-
2.1
-
2.1
-
V
VCC = 5.5 V
3.85
-
-
3.85
-
3.85
-
V
For type 74AHC1G07
VIH
VIL
VOL
HIGH-level
input voltage
LOW-level
input voltage
VCC = 2.0 V
-
-
0.5
-
0.5
-
0.5
V
VCC = 3.0 V
-
-
0.9
-
0.9
-
0.9
V
VCC = 5.5 V
-
-
1.65
-
1.65
-
1.65
V
LOW-level
VI = VIH or VIL
output voltage
IO = 50 A; VCC = 2.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 50 A; VCC = 3.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 50 A; VCC = 4.5 V
-
0
0.1
-
0.1
-
0.1
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.36
-
0.44
-
0.55
V
IO = 8.0 mA; VCC = 4.5 V
-
-
0.36
-
0.44
-
0.55
V
-
-
0.1
-
1.0
-
2.0
A
10.0
A
II
input leakage
current
VI = 5.5 V or GND;
VCC = 0 V to 5.5 V
IOZ
OFF-state
VI = VIH or VIL; VO = VCC or
output current GND; VCC = 5.5 V
-
-
0.25
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
1.0
-
10
-
20
A
CI
input
capacitance
-
1.5
10
-
10
-
10
pF
2.5
For type 74AHCT1G07
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
2.0
-
-
2.0
-
2.0
-
V
VIL
LOW-level
input voltage
VCC = 4.5 V to 5.5 V
-
-
0.8
-
0.8
-
0.8
V
VOL
LOW-level
VI = VIH or VIL; VCC = 4.5 V
output voltage
IO = 50 A
-
0
0.1
-
0.1
-
0.1
V
IO = 8.0 mA
-
-
0.36
-
0.44
-
0.55
V
-
-
0.1
-
1.0
-
2.0
A
OFF-state
VI = VIH or VIL; VO = VCC or
output current GND; VCC = 5.5 V
-
-
0.25
10.0
A
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
1.0
-
10
-
20
A
ICC
additional
per input pin; VI = 3.4 V;
supply current other inputs at VCC or GND;
IO = 0 A; VCC = 5.5 V
-
-
1.35
-
1.5
-
1.5
mA
CI
input
capacitance
-
1.5
10
-
10
-
10
pF
II
input leakage
current
IOZ
74AHC_AHCT1G07
Product data sheet
VI = 5.5 V or GND;
VCC = 0 V to 5.5 V
2.5
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 18 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
4 of 12
74AHC1G07; 74AHCT1G07
NXP Semiconductors
Buffer with open-drain output
11. Dynamic characteristics
Table 8.
Dynamic characteristics
GND = 0 V; tr = tf = 3.0 ns. For test circuit see Figure 6.
Symbol
Parameter
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
-
3.5
5.6
1.0
6.3
1.0
7.0
ns
-
5.0
8.0
1.0
9.0
1.0
10.0
ns
CL = 15 pF
-
2.5
3.9
1.0
4.6
1.0
4.9
ns
CL = 50 pF
-
3.6
5.5
1.0
6.5
1.0
7.0
ns
-
5.8
7.9
1.0
8.4
1.0
8.9
ns
-
8.3
11.5
1.0
12.0
1.0
12.5
ns
-
4.2
5.1
1.0
5.6
1.0
6.1
ns
-
6.0
7.5
1.0
8.0
1.0
8.5
ns
-
5
-
-
-
-
-
pF
CL = 15 pF
-
2.8
4.6
1.0
5.3
1.0
5.6
ns
CL = 50 pF
-
4.0
6.5
1.0
7.5
1.0
8.0
ns
-
3.9
5.6
1.0
6.1
1.0
6.6
ns
-
5.5
8.0
1.0
8.5
1.0
9.0
ns
-
6.5
-
-
-
-
-
pF
For type 74AHC1G07
tPZL
OFF-state
to LOW
propagation
delay
A to Y; see Figure 5
VCC = 3.0 V to 3.6 V
[1]
CL = 15 pF
CL = 50 pF
VCC = 4.5 V to 5.5 V
tPLZ
LOW to
OFF-state
propagation
delay
[2]
A to Y; see Figure 5
VCC = 3.0 V to 3.6 V
[1]
CL = 15 pF
CL = 50 pF
VCC = 4.5 V to 5.5 V
[2]
CL = 15 pF
CL = 50 pF
CPD
power
dissipation
capacitance
per buffer;
CL = 50 pF; f = 1 MHz;
VI = GND to VCC
[3]
For type 74AHCT1G07
tPZL
tPLZ
OFF-state
to LOW
propagation
delay
LOW to
OFF-state
propagation
delay
A to Y; see Figure 5
VCC = 4.5 V to 5.5 V
[2]
A to Y; see Figure 5
VCC = 4.5 V to 5.5 V
[2]
CL = 15 pF
CL = 50 pF
CPD
power
dissipation
capacitance
per buffer;
CL = 50 pF; f = 1 MHz;
VI = GND to VCC
[1]
Typical values are measured at VCC = 3.3 V.
[2]
Typical values are measured at VCC = 5.0 V.
[3]
[3]
CPD is used to determine the dynamic power dissipation PD (W).
PD = CPD VCC2 fi + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts
74AHC_AHCT1G07
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 18 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
5 of 12
74AHC1G07; 74AHCT1G07
NXP Semiconductors
Buffer with open-drain output
12. Waveforms
9,
90
$LQSXW
*1'
W 3=/
W 3/=
9&&
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