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74AHCT1G14GW,125

74AHCT1G14GW,125

  • 厂商:

    NXP(恩智浦)

  • 封装:

    TSSOP5

  • 描述:

    NOW NEXPERIA 74AHCT1G14GW - INVE

  • 数据手册
  • 价格&库存
74AHCT1G14GW,125 数据手册
74AHC1G14; 74AHCT1G14 Inverting Schmitt trigger Rev. 8 — 13 January 2016 Product data sheet 1. General description 74AHC1G14 and 74AHCT1G14 are high-speed Si-gate CMOS devices. They provide an inverting buffer function with Schmitt trigger action. These devices are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V. 2. Features and benefits  Symmetrical output impedance  High noise immunity  ESD protection:  HBM JESD22-A114E: exceeds 2000 V  MM JESD22-A115-A: exceeds 200 V  CDM JESD22-C101C: exceeds 1000 V  Low power dissipation  Balanced propagation delays  SOT353-1 and SOT753 package options  Specified from 40 C to +125 C 3. Applications  Wave and pulse shapers  Astable multivibrators  Monostable multivibrators 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC1G14GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 40 C to +125 C SC-74A plastic surface-mounted package; 5 leads SOT753 74AHCT1G14GW 74AHC1G14GV 74AHCT1G14GV 74AHC1G14; 74AHCT1G14 NXP Semiconductors Inverting Schmitt trigger 5. Marking Table 2. Marking codes Type number Marking code[1] 74AHC1G14GW AF 74AHCT1G14GW CF 74AHC1G14GV A14 74AHCT1G14GV C14 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. Functional diagram $  <    PQD Fig 1. Logic symbol $ < PQD PQD Fig 2. IEC logic symbol Fig 3. Logic diagram 7. Pinning information 7.1 Pinning $+&* $+&7* QF  $  *1'   9&&  < DDI Fig 4. Pin configuration 7.2 Pin description Table 3. Pin description Symbol Pin Description n.c. 1 not connected A 2 data input GND 3 ground (0 V) Y 4 data output VCC 5 supply voltage 74AHC_AHCT1G14 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 — 13 January 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 2 of 17 74AHC1G14; 74AHCT1G14 NXP Semiconductors Inverting Schmitt trigger 8. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level Input Output A Y L H H L 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCC VI supply voltage 0.5 +7.0 V input voltage 0.5 +7.0 V IIK input clamping current VI < 0.5 V 20 - mA IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V - 20 mA 0.5 V < VO < VCC + 0.5 V [1] IO output current - 25 mA ICC supply current - 75 mA IGND ground current 75 - mA Tstg storage temperature 65 +150 C - 250 mW total power dissipation Ptot Tamb = 40 C to +125 C [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For both TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. 10. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74AHC1G14 74AHCT1G14 Unit Min Typ Max Min Typ Max 2.0 5.0 5.5 4.5 5.0 5.5 V input voltage 0 - 5.5 0 - 5.5 V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C VCC supply voltage VI 74AHC_AHCT1G14 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 — 13 January 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 3 of 17 74AHC1G14; 74AHCT1G14 NXP Semiconductors Inverting Schmitt trigger 11. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max HIGH-level VI = VT+ or VT output voltage IO = 50 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 50 A; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V IO = 50 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V IO = 8.0 mA; VCC = 4.5 V 3.94 - - 3.8 - 3.70 - V LOW-level VI = VT+ or VT output voltage IO = 50 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 A; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V - - 0.1 - 1.0 - 2.0 A For type 74AHC1G14 VOH VOL II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 A CI input capacitance - 1.5 10 - 10 - 10 pF 4.4 4.5 - 4.4 - 4.4 - V 3.94 - - 3.8 - 3.70 - V - 0 0.1 - 0.1 - 0.1 V - - 0.36 - 0.44 - 0.55 V - - 0.1 - 1.0 - 2.0 A For type 74AHCT1G14 VOH HIGH-level VI = VT+ or VT; VCC = 4.5 V output voltage IO = 50 A IO = 8.0 mA VOL LOW-level VI = VT+ or VT; VCC = 4.5 V output voltage IO = 50 A IO = 8.0 mA II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 A ICC additional per input pin; VI = 3.4 V; supply current other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.35 - 1.5 - 1.5 mA CI input capacitance - 1.5 10 - 10 - 10 pF 74AHC_AHCT1G14 Product data sheet VI = 5.5 V or GND; VCC = 0 V to 5.5 V All information provided in this document is subject to legal disclaimers. Rev. 8 — 13 January 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 4 of 17 74AHC1G14; 74AHCT1G14 NXP Semiconductors Inverting Schmitt trigger 11.1 Transfer characteristics Table 8. Transfer characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). See Figure 7 and Figure 8. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 3.0 V - - 2.2 - 2.2 - 2.2 V VCC = 4.5 V - - 3.15 - 3.15 - 3.15 V For type 74AHC1G14 VT+ VT VH positive-going threshold voltage negative-going threshold voltage hysteresis voltage VCC = 5.5 V - - 3.85 - 3.85 - 3.85 V VCC = 3.0 V 0.9 - - 0.9 - 0.9 - V VCC = 4.5 V 1.35 - - 1.35 - 1.35 - V VCC = 5.5 V 1.65 - - 1.65 - 1.65 - V VCC = 3.0 V 0.3 - 1.2 0.3 1.2 0.25 1.2 V VCC = 4.5 V 0.4 - 1.4 0.4 1.4 0.35 1.4 V VCC = 5.5 V 0.5 - 1.6 0.5 1.6 0.45 1.6 V For type 74AHCT1G14 VT+ VT VH positive-going threshold voltage VCC = 4.5 V - - 2.0 - 2.0 - 2.0 V VCC = 5.5 V - - 2.0 - 2.0 - 2.0 V negative-going threshold voltage VCC = 4.5 V 0.5 - - 0.5 - 0.5 - V VCC = 5.5 V 0.6 - - 0.6 - 0.6 - V hysteresis voltage VCC = 4.5 V 0.4 - 1.4 0.4 1.4 0.35 1.4 V VCC = 5.5 V 0.4 - 1.6 0.4 1.6 0.35 1.6 V 74AHC_AHCT1G14 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 — 13 January 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 5 of 17 74AHC1G14; 74AHCT1G14 NXP Semiconductors Inverting Schmitt trigger 12. Dynamic characteristics Table 9. Dynamic characteristics GND = 0 V; tr = tf  3.0 ns. For waveform see Figure 5. For test circuit see Figure 6. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max CL = 15 pF - 4.2 12.8 1.0 15.0 1.0 16.5 ns CL = 50 pF - 6.0 16.3 1.0 18.5 1.0 20.5 ns - 3.2 8.6 1.0 10.0 1.0 11.0 ns - 4.6 10.6 1.0 12.0 1.0 13.5 ns - 12 - - - - - pF - 4.1 7.0 1.0 8.0 1.0 9.0 ns - 5.9 8.5 1.0 10.0 1.0 11.0 ns - 13 - - - - - pF For type 74AHC1G14 tpd propagation delay [1] A to Y; VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V [2] [3] CL = 15 pF CL = 50 pF CPD power dissipation capacitance per buffer; CL = 50 pF; f = 1 MHz; VI = GND to VCC [4] For type 74AHCT1G14 tpd propagation delay A to Y; VCC = 4.5 V to 5.5 V [1] [3] CL = 15 pF CL = 50 pF CPD power dissipation capacitance [4] per buffer; VI = GND to VCC [1] tpd is the same as tPLH and tPHL. [2] Typical values are measured at VCC = 3.3 V. [3] Typical values are measured at VCC = 5.0 V. [4] CPD is used to determine the dynamic power dissipation PD (W). PD = CPD  VCC2  fi + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts. 74AHC_AHCT1G14 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 — 13 January 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 6 of 17 74AHC1G14; 74AHCT1G14 NXP Semiconductors Inverting Schmitt trigger 13. Waveforms 90 $LQSXW 9&& W3+/ W3/+ 9, 38/6( *(1(5$725 90
74AHCT1G14GW,125 价格&库存

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