74AUP1Z125

74AUP1Z125 Low-power X-tal driver with enable and internal resistor Rev. 02 — 7 August 2008 Product data sheet 1. General description The 74AUP1Z125 combines the functions of the 74AUP1GU04 and 74AUP1G125 with enable circuitry and an internal bias resistor to provide a device optimized for use in crystal oscillator applications. When not in use the EN input can be driven HIGH, pulling up the X1 input and putting the device in a low power disable mode. Schmitt trigger action at the EN input makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF at output Y. The IOFF circuitry disables the output Y, preventing the damaging backflow current through the device when it is powered down. The integration of the two devices into the 74AUP1Z125 produces the benefits of a compact footprint, lower power dissipation and stable operation over a wide range of frequency and temperature. 2. Features I Wide supply voltage range from 0.8 V to 3.6 V I High noise immunity I ESD protection: N HBM JESD22-A114E Class 3A exceeds 5000 V N MM JESD22-A115-A exceeds 200 V N CDM JESD22-C101C exceeds 1000 V I Latch-up performance exceeds 100 mA per JESD 78 Class II I Inputs accept voltages up to 3.6 V I Low noise overshoot and undershoot < 10 % of VCC I IOFF circuitry provides partial Power-down mode operation at output Y I Multiple package options I Specified from −40 °C to +85 °C and −40 °C to +125 °C NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor 3. Ordering information Table 1. Ordering information Package Temperature range Name 74AUP1Z125GW 74AUP1Z125GM 74AUP1Z125GF −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C SC-88 XSON6 XSON6 Description plastic surface-mounted package; 6 leads Version SOT363 Type number plastic extremely thin small outline package; no leads; SOT886 6 terminals; body 1 × 1.45 × 0.5 mm plastic extremely thin small outline package; no leads; SOT891 6 terminals; body 1 × 1 × 0.5 mm 4. Marking Table 2. Marking Marking code 55 55 55 Type number 74AUP1Z125GW 74AUP1Z125GM 74AUP1Z125GF 5. Functional diagram VCC RPU X1 3 6 Y Rbias 4 X2 EN 1 001aaf141 RPU = pull-up resistance. Rbias = bias resistance. Fig 1. Logic symbol 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 2 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor 6. Pinning information 6.1 Pinning 74AUP1Z125 74AUP1Z125 EN GND 1 2 6 5 Y GND VCC X1 X1 3 001aaf142 EN 1 6 Y EN GND 74AUP1Z125 1 2 3 6 5 4 Y VCC X2 2 5 VCC 3 4 X2 X1 4 X2 001aaf143 001aaf144 Transparent top view Transparent top view Fig 2. Pin configuration SOT363 (SC-88) Fig 3. Pin configuration SOT886 (XSON6) Fig 4. Pin configuration SOT891 (XSON6) 6.2 Pin description Table 3. Symbol EN GND X1 X2 VCC Y Pin description Pin 1 2 3 4 5 6 Description enable input (active LOW) ground (0 V) data input unbuffered output supply voltage data output 7. Functional description Table 4. Input EN L L H H [1] Function table[1] Output X1 L H L H X2 H L H L Y H L Z Z H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 3 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK VI IOK VO IO ICC IGND Tstg Ptot [1] [2] Parameter supply voltage input clamping current input voltage output clamping current output voltage output current supply current ground current storage temperature total power dissipation Conditions VI < 0 V [1] Min −0.5 −50 −0.5 −50 [1] Max +4.6 +4.6 +4.6 ±20 50 +150 250 Unit V mA V mA V mA mA mA °C mW VO < 0 V Active mode and Power-down mode VO = 0 V to VCC −0.5 −50 −65 Tamb = −40 °C to +125 °C [2] - The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SC-88 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K. For XSON6 packages: above 45 °C the value of Ptot derates linearly with 2.4 mW/K. 9. Recommended operating conditions Table 6. Symbol VCC VI VO Tamb ∆t/∆V Recommended operating conditions Parameter supply voltage input voltage output voltage ambient temperature input transition rise and fall rate VCC = 0.8 V to 3.6 V Conditions Min 0.8 0 0 −40 Max 3.6 3.6 VCC +125 200 Unit V V V °C ns/V 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 4 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 °C VIH HIGH-level input voltage X1 input VCC = 0.8 V to 3.6 V EN input VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VIL LOW-level input voltage X1 input VCC = 0.8 V to 3.6 V EN input VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VOH HIGH-level output voltage Y output; VI at X1 input = VIH or VIL IO = −20 µA; VCC = 0.8 V to 3.6 V IO = −1.1 mA; VCC = 1.1 V IO = −1.7 mA; VCC = 1.4 V IO = −1.9 mA; VCC = 1.65 V IO = −2.3 mA; VCC = 2.3 V IO = −3.1 mA; VCC = 2.3 V IO = −2.7 mA; VCC = 3.0 V IO = −4.0 mA; VCC = 3.0 V X2 output; VI = GND or VCC IO = −20 µA; VCC = 0.8 V to 3.6 V IO = −1.1 mA; VCC = 1.1 V IO = −1.7 mA; VCC = 1.4 V IO = −1.9 mA; VCC = 1.65 V IO = −2.3 mA; VCC = 2.3 V IO = −3.1 mA; VCC = 2.3 V IO = −2.7 mA; VCC = 3.0 V IO = −4.0 mA; VCC = 3.0 V VCC − 0.1 1.11 1.32 2.05 1.9 2.72 2.6 V V V V V V V V 0.75 × VCC VCC − 0.1 1.11 1.32 2.05 1.9 2.72 2.6 V V V V V V V V 0.75 × VCC 0.30 × VCC V 0.35 × VCC V 0.7 0.9 V V 0.25 × VCC V 0.70 × VCC 0.65 × VCC 1.6 2.0 V V V V 0.75 × VCC V Conditions Min Typ Max Unit 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 5 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOL LOW-level output voltage Conditions Y output; VI at X1 input = VIH or VIL IO = 20 µA; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V X2 output; VI = GND or VCC IO = 20 µA; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V II input leakage current X1 input VI = EN = VCC; VCC = 0 V to 3.6 V EN input VI = GND to 3.6 V; VCC = 0 V to 3.6 V Ipu IOZ IOFF ∆IOFF ICC ∆ICC pull-up current OFF-state output current power-off leakage current additional power-off leakage current supply current additional supply current X1 input; EN = VCC VI = GND; VCC = 0.8 V to 3.6 V Y output; VO = 0 V to 3.6 V; VCC = 0 V to 3.6 V; EN = VCC VI or VO = 0 V to 3.6 V; VCC = 0 V VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V EN input VI = VCC − 0.6 V; IO = 0 A; VCC = 3.3 V CI input capacitance X1 input VCC = 0 V to 3.6 V; VI = GND or VCC EN input VCC = 0 V to 3.6 V; VI = GND or VCC 0.8 pF 1.3 pF 40 µA [1] [1] Min - Typ - Max 0.1 0.3 × VCC 0.31 0.31 0.31 0.44 0.31 0.44 0.1 0.3 × VCC 0.31 0.31 0.31 0.44 0.31 0.44 ±0.1 ±0.1 Unit V V V V V V V V V V V V V V V V µA µA - - 15 ±0.1 ±0.2 ±0.2 75 µA µA µA µA µA 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 6 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter CO output capacitance Conditions X2 output VO = GND; VCC = 0 V Y output VO = GND; VCC = 0 V gfs forward transconductance see Figure 10 and Figure 11 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V Rbias bias resistance EN = GND; fi = 0 Hz; VI = 0 V or VCC; See Figure 5; for frequency behavior see Figure 6 X1 input VCC = 0.8 V to 3.6 V EN input VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VIL LOW-level input voltage X1 input VCC = 0.8 V to 3.6 V EN input VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 0.30 × VCC V 0.35 × VCC V 0.7 0.9 V V 0.25 × VCC V 0.70 × VCC 0.65 × VCC 1.6 2.0 V V V V 0.75 × VCC V 0.2 3.9 7.9 18 20.5 1.08 1.62 9.9 17.7 24.3 30.7 32.4 3.08 mA/V mA/V mA/V mA/V mA/V mA/V MΩ 1.7 pF 1.5 pF Min Typ Max Unit Tamb = −40 °C to +85 °C VIH HIGH-level input voltage 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 7 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOH HIGH-level output voltage Conditions Y output; VI at X1 input = VIH or VIL IO = −20 µA; VCC = 0.8 V to 3.6 V IO = −1.1 mA; VCC = 1.1 V IO = −1.7 mA; VCC = 1.4 V IO = −1.9 mA; VCC = 1.65 V IO = −2.3 mA; VCC = 2.3 V IO = −3.1 mA; VCC = 2.3 V IO = −2.7 mA; VCC = 3.0 V IO = −4.0 mA; VCC = 3.0 V X2 output; VI = GND or VCC IO = −20 µA; VCC = 0.8 V to 3.6 V IO = −1.1 mA; VCC = 1.1 V IO = −1.7 mA; VCC = 1.4 V IO = −1.9 mA; VCC = 1.65 V IO = −2.3 mA; VCC = 2.3 V IO = −3.1 mA; VCC = 2.3 V IO = −2.7 mA; VCC = 3.0 V IO = −4.0 mA; VCC = 3.0 V VOL LOW-level output voltage Y output; VI at X1 input = VIH or VIL IO = 20 µA; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V X2 output; VI = GND or VCC IO = 20 µA; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V 0.1 0.3 × VCC 0.37 0.35 0.33 0.45 0.33 0.45 V V V V V V V V 0.1 0.3 × VCC 0.37 0.35 0.33 0.45 0.33 0.45 V V V V V V V V VCC − 0.1 0.7 × VCC 1.03 1.30 1.97 1.85 2.67 2.55 V V V V V V V V VCC − 0.1 0.7 × VCC 1.03 1.30 1.97 1.85 2.67 2.55 V V V V V V V V Min Typ Max Unit 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 8 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter II input leakage current Conditions X1 input VI = EN = VCC; VCC = 0 V to 3.6 V EN input VI = GND to 3.6 V; VCC = 0 V to 3.6 V Ipu IOZ IOFF ∆IOFF ICC ∆ICC pull-up current OFF-state output current power-off leakage current additional power-off leakage current supply current additional supply current X1 input; EN = VCC VI = GND; VCC = 0.8 V to 3.6 V Y output; VO = 0 V to 3.6 V; VCC = 0 V to 3.6 V; EN = VCC VI or VO = 0 V to 3.6 V; VCC = 0 V VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V EN input VI = VCC − 0.6 V; IO = 0 A; VCC = 3.3 V gfs forward transconductance see Figure 10 and Figure 11 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V Rbias bias resistance EN = GND; fi = 0 Hz; VI = 0 V or VCC; See Figure 5; for frequency behavior see Figure 6 1.8 7.5 15.0 17.8 1.07 10.8 21.2 29.9 38.0 39.2 3.11 mA/V mA/V mA/V mA/V mA/V mA/V MΩ 50 µA [1] [1] Min - Typ - Max ±0.5 ±0.5 Unit µA µA - - 15 ±0.5 ±0.5 ±0.6 75 µA µA µA µA µA 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 9 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = −40 °C to +125 °C VIH HIGH-level input voltage X1 input VCC = 0.8 V to 3.6 V EN input VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VIL LOW-level input voltage X1 input VCC = 0.8 V to 3.6 V EN input VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VOH HIGH-level output voltage Y output; VI at X1 input = VIH or VIL IO = −20 µA; VCC = 0.8 V to 3.6 V IO = −1.1 mA; VCC = 1.1 V IO = −1.7 mA; VCC = 1.4 V IO = −1.9 mA; VCC = 1.65 V IO = −2.3 mA; VCC = 2.3 V IO = −3.1 mA; VCC = 2.3 V IO = −2.7 mA; VCC = 3.0 V IO = −4.0 mA; VCC = 3.0 V X2 output; VI = GND or VCC IO = −20 µA; VCC = 0.8 V to 3.6 V IO = −1.1 mA; VCC = 1.1 V IO = −1.7 mA; VCC = 1.4 V IO = −1.9 mA; VCC = 1.65 V IO = −2.3 mA; VCC = 2.3 V IO = −3.1 mA; VCC = 2.3 V IO = −2.7 mA; VCC = 3.0 V IO = −4.0 mA; VCC = 3.0 V VCC − 0.11 0.6 × VCC 0.93 1.17 1.77 1.67 2.40 2.30 V V V V V V V V VCC − 0.11 0.6 × VCC 0.93 1.17 1.77 1.67 2.40 2.30 V V V V V V V V 0.25 × VCC V 0.30 × VCC V 0.7 0.9 V V 0.25 × VCC V 0.75 × VCC 0.70 × VCC 1.6 2.0 V V V V 0.75 × VCC V Conditions Min Typ Max Unit 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 10 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOL LOW-level output voltage Conditions Y output; VI = VIH or VIL IO = 20 µA; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V X2 output; VI = GND or VCC IO = 20 µA; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V II input leakage current X1 input VI = EN = VCC; VCC = 0 V to 3.6 V EN input VI = GND to 3.6 V; VCC = 0 V to 3.6 V Ipu IOZ IOFF ∆IOFF ICC ∆ICC pull-up current OFF-state output current power-off leakage current additional power-off leakage current supply current additional supply current X1 input; EN = VCC VI = GND; VCC = 0.8 V to 3.6 V Y output; VO = 0 V to 3.6 V; VCC = 0 V to 3.6 V; EN = VCC VI or VO = 0 V to 3.6 V; VCC = 0 V VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V EN input VI = VCC − 0.6 V; IO = 0 A; VCC = 3.3 V 75 µA [1] [1] Min - Typ - Max 0.11 0.41 0.39 0.36 0.50 0.36 0.50 0.11 0.41 0.39 0.36 0.50 0.36 0.50 ±0.75 ±0.75 Unit V V V V V V V V V V V V V V µA µA 0.33 × VCC V 0.33 × VCC V - - 15 ±0.75 ±0.75 ±0.75 75 µA µA µA µA µA 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 11 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter gfs forward transconductance Conditions see Figure 10 and Figure 11 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V Rbias bias resistance EN = GND; fi = 0 Hz; VI = 0 V or VCC; See Figure 5; for frequency behavior see Figure 6 1.8 6.9 13.4 15.8 1.07 10.8 21.2 29.9 38.0 39.2 3.11 mA/V mA/V mA/V mA/V mA/V mA/V MΩ Min Typ Max Unit [1] Only for output Y and input EN. Rbias VCC II VI X1 X2 VO 001aai359 VO – VI R bias = ------------------II Fig 5. Test circuit for measuring bias resistance 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 12 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor 20 Rbias (MΩ) 16 (1) 001aai159 12 8 (2) 4 (3) 0 1.0 1.5 2.0 2.5 3.0 3.5 VCC (V) (1) fi = 30 kHz. (2) fi = 1 MHz. (3) fi = 10 MHz. Fig 6. Typical bias resistance versus supply voltage 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 13 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9. Symbol Parameter Conditions Min CL = 5 pF tpd propagation delay X1 to X2; see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V X1 to Y; see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V ten enable time EN to Y; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V tdis disable time EN to Y; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V [4] [3] [2] [2] 25 °C Typ[1] Max −40 °C to +125 °C Min Max (85 °C) Max (125 °C) Unit 0.9 0.7 0.5 0.4 0.3 2.8 2.2 1.9 1.6 1.4 3.1 2.5 2.1 1.8 1.7 2.5 2.0 1.9 1.4 1.7 6.2 2.3 1.7 1.4 1.1 1.0 18.5 5.9 4.2 3.5 2.9 2.6 31.2 6.1 4.3 3.6 2.9 2.6 11.1 4.5 3.3 3.2 2.3 2.6 4.4 3.1 2.6 2.0 1.8 12.5 7.7 6.2 4.8 4.1 13.8 8.2 6.5 4.8 4.1 9.0 6.4 6.0 4.4 4.4 0.9 0.6 0.5 0.4 0.3 3.2 2.6 2.2 1.9 1.7 2.9 2.3 2.0 1.7 1.7 2.9 2.3 2.0 1.7 1.7 4.8 3.4 2.9 2.3 2.1 14.8 9.1 7.8 6.2 4.7 16.3 9.7 7.6 5.8 4.7 9.4 6.7 6.4 4.7 4.9 5.3 3.8 3.2 2.6 2.4 16.3 10.1 8.6 6.9 5.2 18.0 10.7 8.4 6.4 5.2 10.4 7.4 7.1 5.2 5.4 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 14 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor Table 8. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9. Symbol Parameter Conditions Min CL = 10 pF tpd propagation delay X1 to X2; see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V X1 to Y; see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V ten enable time EN to Y; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V tdis disable time EN to Y; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V [4] [3] [2] [2] 25 °C Typ[1] Max −40 °C to +125 °C Min Max (85 °C) Max (125 °C) Unit 1.2 1.0 0.8 0.6 0.5 3.2 2.1 1.9 2.1 1.8 3.6 2.3 2.0 1.8 1.7 3.4 2.1 2.2 1.6 2.1 9.6 3.1 2.3 1.9 1.5 1.3 21.4 6.7 4.9 4.1 3.4 3.1 34.4 6.9 5.0 4.2 3.4 3.2 13.0 5.7 4.2 4.3 3.1 3.8 6.1 4.0 3.3 2.7 2.4 14.3 8.9 6.9 5.4 4.8 15.5 9.3 7.2 5.5 4.9 10.4 7.6 7.3 5.3 6.0 1.2 0.9 0.7 0.6 0.5 3.6 3.0 2.6 2.3 2.1 3.4 2.2 1.9 1.7 1.7 3.4 2.2 1.9 1.7 1.7 6.8 4.6 3.8 3.1 2.7 16.2 10.1 8.0 6.6 5.6 16.0 9.6 7.9 6.4 5.5 10.8 8.0 7.6 5.5 6.5 7.5 5.1 4.2 3.5 3.0 17.9 11.2 8.8 7.3 6.2 17.6 10.6 8.7 7.1 6.1 11.9 8.8 8.4 6.1 7.2 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 15 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor Table 8. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9. Symbol Parameter Conditions Min CL = 15 pF tpd propagation delay X1 to X2; see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V X1 to Y; see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V ten enable time EN to Y; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V tdis disable time EN to Y; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V [4] [3] [2] [2] 25 °C Typ[1] Max −40 °C to +125 °C Min Max (85 °C) Max (125 °C) Unit 1.6 1.3 1.0 0.8 0.7 3.6 3.0 2.2 2.0 2.0 4.0 3.0 2.3 2.0 2.0 4.3 3.0 3.0 2.1 2.9 13.0 3.8 2.8 2.3 1.9 1.6 24.2 7.5 5.4 4.6 3.9 3.6 37.5 7.7 5.5 4.7 3.9 3.6 14.8 6.8 5.1 5.4 3.9 5.1 7.9 4.9 4.0 3.2 2.9 16.1 9.7 7.7 6.1 5.4 17.2 10.0 7.9 6.2 5.5 11.2 8.1 8.0 6.1 7.2 1.4 1.1 0.9 0.8 0.7 4.0 3.3 2.9 2.6 2.3 3.7 2.5 2.1 2.0 1.9 3.7 2.5 2.1 2.0 1.9 8.8 5.7 4.7 3.7 3.3 17.6 10.6 9.0 7.3 5.9 17.5 10.2 9.2 7.4 6.0 12.4 8.9 9.3 7.3 7.9 9.7 6.3 5.2 4.1 3.7 19.4 11.7 9.9 8.1 6.5 19.3 11.3 10.2 8.2 6.6 13.7 9.8 10.3 8.1 8.7 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 16 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor Table 8. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9. Symbol Parameter Conditions Min CL = 30 pF tpd propagation delay X1 to X2; see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V X1 to Y; see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V ten enable time EN to Y; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V tdis disable time EN to Y; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V [4] [3] [2] [2] 25 °C Typ[1] Max −40 °C to +125 °C Min Max (85 °C) Max (125 °C) Unit 2.4 2.0 1.7 1.4 1.2 4.8 4.0 2.9 2.7 2.7 5.2 4.0 3.0 2.7 2.7 6.0 4.4 5.1 3.6 5.2 23.2 6.0 4.2 3.6 2.9 2.5 32.6 9.6 6.9 5.9 5.0 4.7 47.1 9.9 7.1 6.0 5.0 4.8 20.3 10.2 7.8 8.8 6.3 8.8 13.1 7.6 6.1 4.8 4.3 21.0 12.4 9.8 7.5 6.8 21.0 12.4 9.9 7.7 6.8 15.3 11.2 12.5 8.6 11.5 2.2 1.8 1.5 1.3 1.1 5.0 4.3 3.8 3.3 3.1 4.8 3.1 2.8 2.6 2.6 4.8 3.1 2.8 2.6 2.6 14.8 9.0 7.2 5.7 5.1 21.7 13.5 10.7 8.2 7.7 21.7 13.5 10.7 8.1 7.7 16.5 12.3 13.3 9.5 13.0 16.3 9.9 8.0 6.3 5.7 23.9 14.9 11.8 9.1 8.5 23.9 14.9 11.8 9.0 8.5 18.2 13.6 14.7 10.5 14.3 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 17 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor Table 8. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9. Symbol Parameter Conditions Min CL = 5 pF, 10 pF, 15 pF and 30 pF CPD power dissipation capacitance fi = 1 MHz; EN = GND; VI = GND to VCC VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V [1] [2] [3] [4] [5] All typical values are measured at nominal VCC. tpd is the same as tPLH and tPHL. ten is the same as tPZH and tPZL. tdis is the same as tPHZ and tPLZ. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. Feedback current is included in CPD. [5][6] 25 °C Typ[1] Max −40 °C to +125 °C Min Max (85 °C) Max (125 °C) Unit - 7.1 12.9 19.2 19.9 21.6 24.3 - - - - pF pF pF pF pF pF [6] 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 18 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor 12. Waveforms VI X1 input GND VM VM t PHL VOH t PLH X2, Y output VOL VM VM 001aaf145 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage drop that occur with the output load. Fig 7. Table 9. VCC The input (X1) to output (X2, Y) propagation delays Measurement points Output VM 0.5 × VCC Input VM 0.5 × VCC VI VCC tr = tf ≤ 3.0 ns Supply voltage 0.8 V to 3.6 V VI EN input GND tPLZ VCC Y output LOW-to-OFF OFF-to-LOW VM VOL tPHZ VOH Y output HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled outputs enabled 001aaf146 VM tPZL VX tPZH VY VM Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage drop that occur with the output load. Fig 8. Table 10. VCC Enable and disable times Measurement points Input VM 0.5 × VCC 0.5 × VCC 0.5 × VCC Output VM 0.5 × VCC 0.5 × VCC 0.5 × VCC VX VOL + 0.1 V VOL + 0.15 V VOL + 0.3 V VY VOH − 0.1 V VOH − 0.15 V VOH − 0.3 V © NXP B.V. 2008. All rights reserved. Supply voltage 0.8 V to 1.6 V 1.65 V to 2.7 V 3.0 V to 3.6 V 74AUP1Z125_2 Product data sheet Rev. 02 — 7 August 2008 19 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor VCC VEXT 5 kΩ G VI VO DUT RT CL RL 001aac521 Test data is given in Table 11. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 9. Table 11. VCC Load circuitry for switching times Test data Load CL RL[1] 5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ VEXT tPLH, tPHL open tPZH, tPHZ GND tPZL, tPLZ 2 × VCC Supply voltage 0.8 V to 3.6 V [1] For measuring enable and disable times RL = 5 kΩ, for measuring propagation delays, setup and hold times and pulse width RL = 1 MΩ. 30 gfs (mA/V) 20 Rbias 001aad074 VCC 10 0.47 µF X 1 X2 100 µF Vi Io 0 0 001aai360 1 2 3 VCC (V) 4 ∆I O g fs = --------∆V I fi = 1 kHz. VO is constant. Tamb = 25 °C. Fig 10. Test set-up for measuring forward transconductance Fig 11. Typical forward transconductance as a function of supply voltage 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 20 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor 13. Application information Crystal controlled oscillator circuits are widely used in clock pulse generators because of their excellent frequency stability and wide operating frequency range. The use of the 74AUP1Z125 provides the additional advantages of low power dissipation, stable operation over a wide range of frequency and temperature and a very small footprint. This application information describes crystal characteristics, design and testing of crystal oscillator circuits based on the 74AUP1Z125. 13.1 Crystal characteristics Figure 12 is the equivalent circuit of a quartz crystal. The reactive and resistive component of the impedance of the crystal alone and the crystal with a series and a parallel capacitance is shown in Figure 13. C1 C0 L1 R1 mnb102 Fig 12. Equivalent circuit of a crystal 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 21 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor C1 C0 L1 + resistance (1) R1 0 fr fa R1 f reactance ∞ − + C1 RL (2) resistance C0 L1 R1 0 fL fa f reactance ∞ CL − + C1 (3) CL Rp resistance C0 L1 R1 − 0 fr fL fa f reactance ∞ mnb104 (1) (a) = resonance (2) (b) = anti-resonance (3) (c) = load resonance Fig 13. Reactance and resistance characteristics of a crystal 13.1.1 Design Figure 14 shows the recommended way to connect a crystal to the 74AUP1Z125. This circuit is basically a Pierce oscillator circuit in which the crystal is operating at its fundamental frequency and is tuned by the parallel load capacitance of C1 and C2. C1 and C2 are in series with the crystal. They should be approximately equal. R1 is the drive-limiting resistor and is set to approximately the same value as the reactance of C1 at the crystal frequency (R1 = XC1). This will result in an input to the crystal of 50 % of the rail-to-rail output of X2. This keeps the drive level into the crystal within drive specifications (the designer should verify this). Overdriving the crystal can cause damage. The internal bias resistor provides negative feedback and sets a bias point of the inverter near mid-supply, operating the 74AUP1GU04 in the high gain linear region. To calculate the values of C1 and C2, the designer can use the formula: C1 × C2 C L = ------------------- + C s C1 + C2 CL is the load capacitance as specified by the crystal manufacturer, Cs is the stray capacitance of the circuit (for the 74AUP1Z125 this is equal to an input capacitance of 1.5 pF). 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 22 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor 74AUP1GU04 portion 74AUP1G125 portion system load Rbias Y X1 Xtal X2 R1 C2 C1 Csys Rsys 001aai549 Fig 14. Crystal oscillator configuration 13.1.2 Testing After the calculations are performed for a particular crystal, the oscillator circuit should be tested. The following simple checks will verify the prototype design of a crystal controlled oscillator circuit. Perform them after laying out the board: • Test the oscillator over worst-case conditions (lowest supply voltage, worst-case crystal and highest operating temperature). Adding series and parallel resistors can simulate a worse case crystal. • Insure that the circuit does not oscillate without the crystal. • Check the frequency stability over a supply range greater than that which is likely to occur during normal operation. • Check that the start-up time is within system requirements. As the 74AUP1Z125 isolates the system loading, once the design is optimized, the single layout may work in multiple applications for any given crystal. 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 23 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor 14. Package outline Plastic surface-mounted package; 6 leads SOT363 D B E A X y HE vMA 6 5 4 Q pin 1 index A A1 1 e1 e 2 bp 3 wM B detail X Lp c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT363 REFERENCES IEC JEDEC JEITA SC-88 EUROPEAN PROJECTION ISSUE DATE 04-11-08 06-03-16 Fig 15. Package outline SOT363 (SC-88) 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 24 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm SOT886 b 1 2 3 4× L1 L (2) e 6 e1 5 e1 4 6× (2) A A1 D E terminal 1 index area 0 DIMENSIONS (mm are the original dimensions) UNIT mm A (1) max 0.5 A1 max 0.04 b 0.25 0.17 D 1.5 1.4 E 1.05 0.95 e 0.6 e1 0.5 L 0.35 0.27 L1 0.40 0.32 1 scale 2 mm Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT886 REFERENCES IEC JEDEC MO-252 JEITA EUROPEAN PROJECTION ISSUE DATE 04-07-15 04-07-22 Fig 16. Package outline SOT886 (XSON6) 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 25 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm SOT891 1 2 b 3 4× (1) L1 e L 6 e1 5 e1 4 6× (1) A A1 D E terminal 1 index area 0 1 scale DIMENSIONS (mm are the original dimensions) UNIT mm A max 0.5 A1 max 0.04 b 0.20 0.12 D 1.05 0.95 E 1.05 0.95 e 0.55 e1 0.35 L 0.35 0.27 L1 0.40 0.32 2 mm Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION SOT891 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 05-04-06 07-05-15 Fig 17. Package outline SOT891 (XSON6) 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 26 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor 15. Abbreviations Table 12. Acronym CDM CMOS DUT ESD HBM MM Abbreviations Description Charged Device Model Complementary Metal-Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model 16. Revision history Table 13. Revision history Release date 20080807 Data sheet status Product data sheet Change notice Supersedes 74AUP1Z125_1 Document ID 74AUP1Z125_2 Modifications: • • • • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Section 2 “Features”: Removed: Low static power consumption; ICC 0.9 µA maximum. Section 10 “Static characteristics”: Removed: Feedback current (Ifbck). Changed: Maximum supply current (ICC). Added: forward transconductance and bias resistance. • 74AUP1Z125_1 Section 11 “Dynamic characteristics”: Changed: Typical power dissipation capacitance. Product data sheet - 20060803 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 27 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor 17. Legal information 17.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 17.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 17.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 17.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 18. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74AUP1Z125_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 7 August 2008 28 of 29 NXP Semiconductors 74AUP1Z125 Low-power X-tal driver with enable and internal resistor 19. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 13.1 13.1.1 13.1.2 14 15 16 17 17.1 17.2 17.3 17.4 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . 14 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Application information. . . . . . . . . . . . . . . . . . 21 Crystal characteristics . . . . . . . . . . . . . . . . . . 21 Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 24 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 27 Legal information. . . . . . . . . . . . . . . . . . . . . . . 28 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 28 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Contact information. . . . . . . . . . . . . . . . . . . . . 28 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 7 August 2008 Document identifier: 74AUP1Z125_2