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74CBTLVD3244PW,118

74CBTLVD3244PW,118

  • 厂商:

    NXP(恩智浦)

  • 封装:

    TSSOP20

  • 描述:

    IC BUS SWITCH 4 X 1:1 20TSSOP

  • 数据手册
  • 价格&库存
74CBTLVD3244PW,118 数据手册
74CBTLVD3244 8-bit level-shifting bus switch with 4-bit output enables Rev. 2 — 16 December 2011 Product data sheet 1. General description The 74CBTLVD3244 is a dual 4-pole, single-throw bus switch. The device features two output enable inputs (nOE) that each control four switch channels. The switches are disabled when the associated nOE input is HIGH. Schmitt trigger action at control inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits  Supply voltage range from 3.0 V to 3.6 V  High noise immunity  Complies with JEDEC standard:  JESD8-B/JESD36 (3.0 V to 3.6 V)  ESD protection:  HBM JESD22-A114F exceeds 2000 V  CDM AEC-Q100-011 revision B exceeds 1000 V  5  switch connection between two ports  Rail to rail switching on data I/O ports  CMOS low power consumption  Latch-up performance exceeds 250 mA per JESD78B Class I level A  IOFF circuitry provides partial Power-down mode operation  Multiple package options  Specified from 40 C to +85 C and 40 C to +125 C 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74CBTLVD3244DS Name 40 C to +125 C SSOP20[1] 74CBTLVD3244PW 40 C to +125 C TSSOP20 74CBTLVD3244BQ [1] Description Version plastic shrink small outline package; 20 leads; body width 3.9 mm; lead pitch 0.635 mm SOT724-1 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 40 C to +125 C DHVQFN20 plastic dual-in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5  4.5  0.85 mm SOT764-1 Also known as QSOP20 package 4. Functional diagram 1OE 1A1 1A2 1A3 1A4 2 4 6 8 1 18 14 12 1B2 1B3 1B4 2A1 2A2 2A3 2A4 11 2OE 16 1B1 13 15 17 19 9 7 5 3 2B1 2B2 2B3 2B4 001aan303 Fig 1. Logic symbol 74CBTLVD3244 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 2 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables 1A1 1B1 1A4 1B4 1OE 2A1 2B1 2A4 2B4 2OE 001aan196 Fig 2. Logic diagram 5. Pinning information 5.1 Pinning 74CBTLVD3244 74CBTLVD3244 1OE 1A1 2B4 1A2 2B3 1A3 2B2 1A4 2B1 1 2 3 4 5 6 7 8 1OE 1 20 VCC 20 VCC 1A1 2 19 2OE 19 2OE 2B4 3 18 1B1 18 1B1 1A2 4 17 2A4 17 2A4 2B3 5 16 1B2 16 1B2 1A3 6 15 2A3 15 2A3 2B2 7 14 1B3 14 1B3 1A4 8 13 2A2 13 2A2 2B1 9 12 1B4 GND 10 11 2A1 12 1B4 9 GND 10 11 2A1 aaa-000025 Fig 3. aaa-000026 Pin configuration for TSSOP20 (SOT360-1) 74CBTLVD3244 Product data sheet Fig 4. Pin configuration for SSOP20 (SOT724-1) All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 3 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables 1OE 1 terminal 1 index area 20 VCC 74CBTLVD3244 1A1 2 19 2OE 2B4 3 18 1B1 1A2 4 17 2A4 2B3 5 16 1B2 1A3 6 15 2A3 2B2 7 1A4 8 14 1B3 GND(1) 2A1 11 12 1B4 GND 10 2B1 9 13 2A2 Transparent top view aaa-000027 (1) This is not a supply pin, the substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad however if it is soldered the solder land should remain floating or be connected to GND. Fig 5. Pin configuration for DHVQFN20 (SOT764-1) 5.2 Pin description Table 2. Pin description Symbol Pin Description 1OE, 2OE 1, 19 output enable input (active LOW) 1A1 to 1A4 2, 4, 6, 8 data input/output (A port) 2B1 to 2B4 9, 7, 5, 3 data input/output (A port) GND 10 ground (0 V) 2A1 to 2A4 11, 13, 15, 17 data input/output (B port) 1B1 to 1B4 18, 16, 14, 12 data input/output (B port) VCC 20 positive supply voltage 6. Functional description Table 3. Function selection[1] Input Input/output nOE nAn, nBn L nAn = nBn H Z [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. 74CBTLVD3244 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 4 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VCC supply voltage Min Max Unit 0.5 +4.6 V [1] 0.5 +4.6 V [1] 0.5 VCC + 0.5 V VI input voltage VSW switch voltage enable and disable mode IIK input clamping current VI/O < 0.5 V 50 - mA ISK switch clamping current VI < 0.5 V 50 - mA ISW switch current VSW = 0 V to VCC - 128 mA ICC supply current - +100 mA IGND ground current 100 - mA Tstg storage temperature 65 +150 C - 500 mW total power dissipation Ptot [1] [2] Tamb = 40 C to +125 C [2] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SSOP20 and TSSOP20 packages: above 60 C the value of Ptot derates linearly at 5.5 mW/K. For DHVQFN20 packages: above 60 C the value of Ptot derates linearly at 4.5 mW/K. 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VCC supply voltage VI input voltage VSW switch voltage Tamb ambient temperature t/V [1] Conditions enable and disable mode input transition rise and fall rate [1] VCC = 3.0 V to 3.6 V Min Max Unit 3.0 3.6 V 0 3.6 V 0 VCC V 40 +125 C 0 200 ns/V Applies to control signal levels. 9. Static characteristics Table 6. Static characteristics At recommended operating conditions voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit Conditions Typ[1] Max Min Max 2.0 - - 2.0 - V VIH HIGH-level input voltage VIL LOW-level input VCC = 3.0 V to 3.6 V voltage - - 0.9 - 0.9 V II input leakage current pin nOE; VI = GND to VCC; VCC = 3.6 V - - 1 - 20 A Vpass pass voltage VI = VCC; see Figure 8 to Figure 12 - - - - - V 74CBTLVD3244 Product data sheet VCC = 3.0 V to 3.6 V Min All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 5 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables Table 6. Static characteristics …continued At recommended operating conditions voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit Conditions Min Typ[1] Max Min Max IS(OFF) OFF-state VCC = 3.6 V; see Figure 6 leakage current - - 1 - 20 A IS(ON) ON-state VCC = 3.6 V; see Figure 7 leakage current - - 1 - 20 A IOFF power-off VI or VO = 0 V to 3.6 V; leakage current VCC = 0 V - - 10 - 50 A ICC supply current VI = VCC; IO = 0 A; VCC = 3.6 V; VSW = GND or VCC - - 20 - 50 A VI = GND; IO = 0 A; VCC = 3.6 V; VSW = GND or VCC - - 100 - 150 A - - 300 - 2000 A ICC additional supply current pin nOE; VI = VCC  0.6 V; VSW = GND or VCC; VCC = 3.6 V CI input capacitance pin nOE; VCC = 3.3 V; VI = 0 V to 3.3 V - 0.9 - - - pF CS(OFF) OFF-state capacitance VCC = 3.3 V; VI = 0 V to 3.3 V - 2.5 - - - pF CS(ON) ON-state capacitance VCC = 3.3 V; VI = 0 V to 3.3 V - 9.0 - - - pF [1] All typical values are measured at Tamb = 25 C. [2] One input at 3 V, other inputs at VCC or GND. [2] 9.1 Test circuits VCC VCC nOE VIH A Vl nOE VIL Is nBn nAn Is Is A A GND VO Vl nAn nBn GND VO 001aam032 001aam033 VI = VCC or GND and VO = GND or VCC. Fig 6. VI = VCC or GND and VO = open circuit. Test circuit for measuring OFF-state leakage current (one switch) 74CBTLVD3244 Product data sheet Fig 7. Test circuit for measuring ON-state leakage current (one switch) All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 6 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables 9.2 Typical pass voltage graphs 001aam102 1.90 Vpass (V) 1.85 20 μA 1.90 Vpass (V) 1.85 1.80 100 μA 1.80 001aam103 20 μA 100 μA 1.75 1.75 1.70 1.70 2 mA 1.65 4 mA 2 mA 1.65 4 mA 1.60 1.55 3.0 3.2 1.60 3.4 3.6 1.55 3.0 3.2 3.4 3.6 VCC (V) Fig 8. VCC (V) Pass voltage versus supply voltage; Tamb = 125 C (typical) Fig 9. 001aam104 1.90 Vpass (V) 1.85 20 μA 1.90 Vpass (V) 1.85 1.80 100 μA 1.80 Pass voltage versus supply voltage; Tamb = 85 C (typical) 001aam105 20 μA 100 μA 1.75 1.75 1.70 1.70 2 mA 2 mA 4 mA 1.65 1.65 1.60 1.55 3.0 4 mA 1.60 3.2 3.4 3.6 1.55 3.0 3.2 3.4 3.6 VCC (V) VCC (V) Fig 10. Pass voltage versus supply voltage; Tamb = 25 C (typical) 74CBTLVD3244 Product data sheet Fig 11. Pass voltage versus supply voltage; Tamb = 0 C (typical) All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 7 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables 001aam106 1.90 Vpass (V) 1.85 1.80 20 μA 1.75 100 μA 1.70 1.65 2 mA 4 mA 1.60 1.55 3.0 3.2 3.4 3.6 VCC (V) Fig 12. Pass voltage versus supply voltage; Tamb = 40 C (typical) 74CBTLVD3244 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 8 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables 9.3 ON resistance Table 7. Resistance RON At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Figure 13. Symbol Parameter RON Tamb = 40 C to +85 C Conditions Tamb = 40 C to +125 C Unit Min Typ[1] Max Min Max ISW = 64 mA; VI = 0 V - 3.7 7.0 - 10.0  ISW = 24 mA; VI = 0 V - 3.7 7.0 - 10.0  ISW = 15 mA; VI = 1.2 V - 4.7 10.0 - 12.0  ON resistance VCC = 3.0 V to 3.6 V [1] Typical values are measured at Tamb = 25 C and nominal VCC. [2] Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is determined by the lower of the voltages of the two (A or B) terminals. 9.4 ON resistance test circuit VSW V VCC nOE VIL nAn Vl nBn GND ISW 001aam034 RON = VSW / ISW. Fig 13. Test circuit for measuring ON resistance (one switch) 74CBTLVD3244 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 9 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables 10. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; for test circuit see Figure 16 Symbol Parameter Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit Conditions VCC = 3.0 V to 3.6 V enable time ten disable time Max Min Max - - 0.11 - 0.22 ns 1.5 2.8 5.0 1.5 6.0 ns 0.8 3.1 7.0 0.8 8.0 ns [4] nOE to nAn or nBn; see Figure 15 VCC = 3.0 V to 3.6 V tdis Typ[1] [2][3] propagation delay nAn to nBn or nBn to nAn; see Figure 14 tpd Min [5] nOE to nAn or nBn; see Figure 15 VCC = 3.0 V to 3.6 V [1] All typical values are measured at Tamb = 25 C and at nominal VCC. [2] The propagation delay is the calculated RC time constant of the on-state resistance of the switch and the load capacitance, when driven by an ideal voltage source (zero output impedance). [3] tpd is the same as tPLH and tPHL. [4] ten is the same as tPZH and tPZL. [5] tdis is the same as tPHZ and tPLZ. 11. Waveforms VI nAn, nBn input VM VM GND tPHL tPLH VOH nBn, nAn output VM VM VOL 001aak881 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 14. The data input (nAn, nBn) to output (nBn, nAn) propagation delay times Table 9. Measurement points Supply voltage Input VCC VM VI tr = tf VM VX VY 3.0 V to 3.6 V 0.5VCC VCC  2.0 ns 0.9 V VOL + 0.15 V VOH  0.15 V 74CBTLVD3244 Product data sheet Output All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 10 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables VI VM VM nOE input GND tPZL tPLZ 1.8 V output LOW to OFF OFF to LOW VM VX VOL tPZH tPHZ VOH VY output HIGH to OFF OFF to HIGH GND VM outputs enabled outputs disabled outputs enabled aaa-000029 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 15. Enable and disable times 74CBTLVD3244 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 11 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VEXT VCC VI RL VO G DUT RT RL CL 001aae331 Test data is given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 16. Test circuit for measuring switching times Table 10. Test data Supply voltage Load VCC CL RL tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 3.0 V to 3.6 V 30 pF 1 k open GND 3.6 V 74CBTLVD3244 Product data sheet VEXT All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 12 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables 11.1 Additional dynamic characteristics Table 11. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise specified); tr = tf 2.5 ns. Symbol Parameter f(3dB) Tamb = 25 C Conditions 3 dB frequency response VCC = 3.3 V; RL = 50 ; see Figure 17 [1] Typical values are measured at Tamb = 25 C and VCC = 3.3 V. [2] fi is biased at 0.5VCC. [2] Unit Min Typ Max - 575 - MHz 11.2 Test circuits VCC 0.5 VCC nOE VIL RL nBn fi nAn GND dB aaa-000028 nOE connected to GND; Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads 3 dB. Fig 17. Test circuit for measuring the frequency response when channel is in ON-state 74CBTLVD3244 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 13 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables 12. Package outline SSOP20: plastic shrink small outline package; 20 leads; body width 3.9 mm; lead pitch 0.635 mm D E SOT724-1 A X c y HE v M A Z 11 20 A2 A (A3) A1 θ Lp L 10 1 e 1/2 e bp detail X w M 0 2.5 5 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e HE L Lp v w y Z(1) θ mm 1.73 0.25 0.10 1.55 1.40 0.25 0.31 0.20 0.25 0.18 8.8 8.6 4.0 3.8 0.635 6.2 5.8 1 0.89 0.41 0.25 0.18 0.1 1.67 1.28 8o o 0 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION SOT724-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 01-07-04 03-02-18 MO-137 Fig 18. Package outline SOT724-1 (SSOP20) 74CBTLVD3244 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 14 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 E D A X c HE y v M A Z 11 20 Q A2 (A 3) A1 pin 1 index A θ Lp L 1 10 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 Fig 19. Package outline SOT360-1 (TSSOP20) 74CBTLVD3244 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 15 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT764-1 20 terminals; body 2.5 x 4.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 9 y y1 C v M C A B w M C b L 1 10 Eh e 20 11 19 12 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.30 0.18 c D (1) Dh E (1) Eh 0.2 4.6 4.4 3.15 2.85 2.6 2.4 1.15 0.85 e 0.5 e1 L v w y y1 3.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT764-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 20. Package outline SOT764-1 (DHVQFN20) 74CBTLVD3244 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 16 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables 13. Abbreviations Table 12. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes 74CBTLVD3244 v.2 20111216 Product data sheet - 74CBTLVD3244 v.1 - - Modifications: 74CBTLVD3244 v.1 74CBTLVD3244 Product data sheet • Legal pages updated. 20110715 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 17 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. 15.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia accepts no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 74CBTLVD3244 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 18 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com 74CBTLVD3244 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 16 December 2011 © Nexperia B.V. 2017. All rights reserved 19 of 20 74CBTLVD3244 Nexperia 8-bit level-shifting bus switch with 4-bit output enables 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 9.1 9.2 9.3 9.4 10 11 11.1 11.2 12 13 14 15 15.1 15.2 15.3 15.4 16 17 © General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Typical pass voltage graphs . . . . . . . . . . . . . . . 7 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 9 ON resistance test circuit . . . . . . . . . . . . . . . . . 9 Dynamic characteristics . . . . . . . . . . . . . . . . . 10 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Additional dynamic characteristics . . . . . . . . . 13 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Contact information. . . . . . . . . . . . . . . . . . . . . 19 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Nexperia B.V. 2017. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 16 December 2011
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