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74F125D

74F125D

  • 厂商:

    NXP(恩智浦)

  • 封装:

    SOIC14_150MIL

  • 描述:

    74F125D

  • 数据手册
  • 价格&库存
74F125D 数据手册
INTEGRATED CIRCUITS 74F125, 74F126 Quad buffers (3-State) Product specification IC15 Data Handbook       1989 March 28 Philips Semiconductors Product specification Quad buffers (3-State) 74F125, 74F126 FEATURE ORDERING INFORMATION • High impedance NPN base inputs for reduced loading (20µA in High and Low states) TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F125 5.0ns 23mA 74F126 5.0ns 26mA DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C PKG DWG # 14-pin plastic DIP N74F125N, N74F126N SOT27-1 14-pin plastic SO N74F125D, N74F126D SOT108-1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW Data inputs 1.0/0.033 20µA/20µA OE0–OE3 Output Enable inputs (active Low), 74F125 1.0/0.033 20µA/20µA OE0–OE3 Output Enable inputs (active High), 74F126 1.0/0.033 20µA/20µA Data outputs 750/106.7 15mA/64mA D0–D3 Q0–Q3 NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. PIN CONFIGURATIONS 74F126 74F125 OE0 1 14 VCC OE0 1 14 VCC D0 2 13 OE3 D0 2 13 OE3 Q0 3 12 D3 Q0 3 12 D3 OE1 4 11 Q3 OE1 4 11 Q3 D1 5 10 OE2 D1 5 10 OE2 Q1 6 9 D2 Q1 6 9 D2 GND 7 8 Q2 GND 7 8 Q2 SF00117 SF00118 LOGIC SYMBOLS 74F126 74F125 2 5 9 D0 D1 D2 12 D3 1 OE0 1 OE0 4 OE1 4 OE1 10 OE2 10 OE2 13 OE3 13 OE3 VCC = Pin 14 GND = Pin 7 Q0 Q0 Q1 3 6 8 Q1 11 VCC = Pin 14 GND = Pin 7 SF00119 March 28, 1989 2 5 9 12 D0 D1 D2 D3 Q0 Q0 Q1 Q1 3 6 8 11 SF00120 2 853–0341 96146 Philips Semiconductors Product specification Quad buffers (3-State) 74F125, 74F126 IEC/IEEE SYMBOLS 74F125 1 74F126 1 EN 1 2 1 EN 3 3 2 4 4 6 6 5 5 10 10 8 8 9 9 13 13 11 11 12 12 SF00121 SF00122 LOGIC DIAGRAMS 74F125 74F126 1 1 OE0 OE0 3 2 D0 3 2 Q0 D0 4 Q0 4 OE1 OE1 6 5 D1 6 5 Q1 D1 10 Q1 10 OE2 OE2 8 9 D2 8 9 Q2 D2 13 Q2 13 OE3 OE3 11 12 D3 11 12 Q3 D3 VCC = Pin 14 GND = Pin 7 Q3 VCC = Pin 14 GND = Pin 7 SF00123 SF00124 FUNCTION TABLE, 74F125 FUNCTION TABLE, 74F126 I NPUTS OUTPUT I NPUTS OUTPUT OEn Dn Qn OEn Dn Qn L L H L H X L H Z H H L L H X L H Z NOTES TO THE FUNCTION TABLES: H = High voltage level L = Low voltage level X = Don’t care Z = High impedance “off” state ABSOLUTE MAXIMUM RATINGS (Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) RATING UNIT VCC Supply voltage PARAMETER –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to VCC V IOUT Current applied to output in Low output state Tamb Operating free-air temperature range Tstg Storage temperature range SYMBOL March 28, 1989 3 128 mA 0 to +70 °C –65 to +150 °C Philips Semiconductors Product specification Quad buffers (3-State) 74F125, 74F126 RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER UNIT MIN NOM MAX 5.0 5.5 VCC Supply voltage 4.5 V VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –15 mA IOL Low-level output current 64 mA Tamb Operating free air temperature range +70 °C V 0 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL LIMITS TEST CONDITIONS1 PARAMETER MIN VOH O = 3mA IOH O =–3mA VCC = MIN, VIL = MAX, MAX VIH = MIN High level output voltage High-level IOH = 15mA O =–15mA TYP2 ±10%VCC 2.4 ±5%VCC 2.7 ±10%VCC 2.0 V ±5%VCC 2.0 V V 3.3 ±10%VCC VCC = MIN, VIL = MAX, MAX VIH = MIN UNIT MAX V 0.55 V 0.42 0.55 V –0.73 –1.2 V VCC = 0.0V, VI = 7.0V 100 µA High-level input current VCC = MAX, VI = 2.7V 20 µA IIL Low-level input current VCC = MAX, VI = 0.5V –20 µA IOZH Off-state output current, High-level voltage applied VCC = MAX, VO = 2.7V 50 µA IOZL Off-state output current, Low-level voltage applied VCC = MAX, VO = 0.5V –50 µA IOS Short circuit output current3 VOL O Low level output voltage Low-level IOH O = MAX VIK Input clamp voltage VCC = MIN, II = IIK II Input current at maximum input voltage IIH VCC = MAX –225 mA OEn = GND, Dn = 4.5V –100 17 24 mA OEn = Dn = GND 28 40 mA ICCZ OEn = Dn = 4.5V 25 35 mA ICCH OEn = Dn = 4.5V 20 30 mA OEn = 4.5V, Dn = GND 32 48 mA OEn = GND, Dn = 4.5V 26 39 mA ICCH 74F125 ICC Supply current (total) 74F126 ±5%VCC ICCL ICCL VCC = MAX VCC = MAX ICCZ NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. March 28, 1989 4 Philips Semiconductors Product specification Quad buffers (3-State) 74F125, 74F126 AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL TEST CONDITION PARAMETER VCC = +5.0V ± 10% Tamb = 0°C to +70°C CL = 50pF, RL = 500Ω VCC = +5.0V Tamb = +25°C CL = 50pF, RL = 500Ω UNIT MIN TYP MAX MIN MAX Waveform 1 2.0 3.0 4.0 5.5 6.0 7.5 2.0 3.0 6.5 8.0 ns Waveform 2 Waveform 3 3.5 4.0 5.5 6.0 7.5 8.0 3.5 4.0 8.5 9.0 ns tPLH tPHL Propagation delay Dn to Qn tPZH tPZL Output Enable time to High or Low level tPHZ tPLZ Output Disable time from High or Low level Waveform 2 Waveform 3 1.5 1.5 3.5 3.5 5.0 5.5 1.5 1.5 6.0 6.0 ns tPLH tPHL Propagation delay Dn to Qn Waveform 1 2.0 3.0 4.0 5.5 6.5 8.0 2.0 3.0 7.0 8.5 ns tPZH tPZL Output Enable time to High or Low level Waveform 2 Waveform 3 4.0 4.0 6.0 6.0 7.5 8.0 3.5 3.5 8.5 8.5 ns tPHZ tPLZ Output Disable time from High or Low level Waveform 2 Waveform 3 2.0 3.0 4.5 5.5 6.5 7.5 2.0 3.0 7.5 8.0 ns 74F125 74F126 AC WAVEFORMS For all waveforms, VM = 1.5V. OEn Dn VM VM VM tPLH Qn tPZL tPHL VM Qn VM SF00125 SF00127 VM OEn Qn tPHZ VM VOH–0.3V 0V SF00126 Waveform 2. 3-State Output Enable Time to High Level and Output Disable Time from High Level March 28, 1989 VM Waveform 3. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level OEn tPZH tPLZ VOL+0.3V Waveform 1. Propagation Delay for Input to Output VM VM OEn 5 Philips Semiconductors Product specification Quad buffers (3-State) 74F125, 74F126 TEST CIRCUIT AND WAVEFORM VCC 7.0V VIN RL VOUT PULSE GENERATOR tw 90% NEGATIVE PULSE VM CL AMP (V) VM 10% D.U.T. RT 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V RL AMP (V) 90% 90% Test Circuit for Open Collector Outputs POSITIVE PULSE VM VM 10% TEST tPLZ tPZL All other SWITCH closed closed open DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 10% tw SWITCH POSITION 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00128 March 28, 1989 6 Philips Semiconductors Product specification Quad buffers (3-State) 74F125, 74F126 DIP14: plastic dual in-line package; 14 leads (300 mil) 1989 March 28 7 SOT27-1 Philips Semiconductors Product specification Quad buffers (3-State) 74F125, 74F126 SO14: plastic small outline package; 14 leads; body width 3.9 mm 1989 March 28 8 SOT108-1 Philips Semiconductors Product specification Quad buffers (3-State) 74F125, 74F126 NOTES 1989 March 28 9 Philips Semiconductors Product specification Quad buffers (3-State) 74F125, 74F126 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.  Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number:       yyyy mmm dd 10 Date of release: 10-98 9397-750-05073
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