74F656A

74F656A Octal buffer/driver with parity; non-inverting; 3-state Rev. 05 — 25 March 2010 Product data sheet 1. General description The 74F656A is an octal buffer and line driver with parity generation/checking. The 74F656A can be used as memory address driver, clock driver and bus-oriented transmitter/receiver. The inclusion of parity generation/checking improves PCB density. 2. Features Combines 74F244 and 74F280A functions in one device High impedance NPN base inputs for reduced input current (40 μA in HIGH and LOW states) IIL = 20 μA compared to 600 μA in FAST family specification For applications with high output drive and light bus loading Non-inverting 3-state output sink capability IOL = 64 mA and source IOH = 15 mA Inputs and outputs on separate sides simplifies board layout Combined functions reduce part count and enhance system performance Industrial temperature range available (−40 °C to +85 °C) 3. Ordering information Table 1. Ordering information Package Temperature range N74F656AD I74F656AD 0 °C to 70 °C −40 °C to +85 °C Name SO24 Description plastic small outline package; 24 leads; body width 7.5 mm Version SOT137-1 Type number NXP Semiconductors 74F656A Octal buffer/driver with parity; non-inverting; 3-state 4. Functional diagram 2K 3 P3 3, 5, 6, 7, 8, 9, 10, 11, 12 3, 5, 6, 7, 8, 9, 10, 11, 12 1 2 ≥1 EN4 [EVEN] [ODD] 21 22 4 D0 3 1 2 23 PI OE0 OE1 OE2 5 D1 6 D2 7 D3 8 D4 9 D5 10 D6 11 D7 ΣE ΣO 21 22 23 4 5 6 7 8 9 10 11 Z5 Z6 Z7 Z8 Z9 Z10 Z11 Z12 4 20 19 18 17 16 15 14 13 001aal256 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 20 19 18 17 16 15 14 13 001aal255 Fig 1. Logic symbol Fig 2. IEC logic symbol 74F656A_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 25 March 2010 2 of 14 NXP Semiconductors 74F656A Octal buffer/driver with parity; non-inverting; 3-state PI 3 21 ΣE ΣO 22 D0 4 20 Q0 D1 5 19 Q1 D2 6 18 Q2 D3 7 17 Q3 D4 8 16 Q4 D5 9 15 Q5 D6 10 14 Q6 D7 OE0 OE1 OE2 11 1 2 23 13 Q7 001aal253 Fig 3. 74F656A_5 Logic diagram © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 25 March 2010 3 of 14 NXP Semiconductors 74F656A Octal buffer/driver with parity; non-inverting; 3-state 5. Pinning information 5.1 Pinning 74F656A OE0 OE1 PI D0 D1 D2 D3 D4 D5 1 2 3 4 5 6 7 8 9 24 VCC 23 OE2 22 ΣO 21 ΣE 20 Q0 19 Q1 18 Q2 17 Q3 16 Q4 15 Q5 14 Q6 13 Q7 001aal254 D6 10 D7 11 GND 12 Fig 4. Pin configuration 5.2 Pin description Table 2. Symbol OE0 OE1 PI D0 to D7 GND Q0 to Q7 ΣE ΣO OE2 VCC [1] Pin description Pin 1 2 3 4, 5, 6, 7, 8, 9, 10, 11 12 20, 19, 18, 17, 16, 15, 14, 13 21 22 23 24 Description output enable input (active LOW) output enable input (active LOW) parity input data input ground (0 V) data output even parity output odd parity output output enable input (active LOW) supply voltage 750/106.7 750/106.7 750/106.7 1.0/0.033 15 mA/64 mA 15 mA/64 mA 15 mA/64 mA 20 μA/20 μA Unit load HIGH/LOW 1.0/0.033 1.0/0.033 1.0/0.033 2.0/0.066 Load value[1] HIGH/LOW 20 μA/20 μA 20 μA/20 μA 20 μA/20 μA 40 μA/40 μA One FAST Unit Load (UL) is defined as 20 μA in HIGH state, 0.6 μA in LOW state. 74F656A_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 25 March 2010 4 of 14 NXP Semiconductors 74F656A Octal buffer/driver with parity; non-inverting; 3-state 6. Functional description 6.1 Function table Table 3. Input OE0 L L H X X [1] Function selection[1] Output OE1 L L X H X OE2 L L X X H Dn L H X X X Qn L H Z Z Z disabled transparent Status H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Table 4. Inputs Function parity outputs[1] State H H H Parity output ΣE ΣO L H Z H L Z Even number of inputs (0, 2, 4, 6, 8) Odd number of inputs (1, 3, 5, 7, 9) Any OEn [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. 74F656A_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 25 March 2010 5 of 14 NXP Semiconductors 74F656A Octal buffer/driver with parity; non-inverting; 3-state 7. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCC VI VO IIK IO Tamb Parameter supply voltage input voltage output voltage input clamping current output current ambient temperature output in HIGH-state VI < 0 V output in LOW-state in free-air commercial industrial Tstg [1] [2] [2] [1] [1] Conditions Min −0.5 −0.5 −0.5 −30 0 −40 −65 Max +7.0 +7.0 VCC +5 128 70 +85 +150 Unit V V V mA mA °C °C °C storage temperature The input and output voltage ratings may be exceeded if the input and output current ratings are observed. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 °C. 8. Recommended operating conditions Table 6. Symbol VCC VIH VIL IIK IOH IOL Recommended operating conditions Parameter supply voltage HIGH-level input voltage LOW-level input voltage input clamping current HIGH-level output current LOW-level output current Conditions Min 4.5 2.0 −15 Typ 5.0 Max 5.5 0.8 −18 64 Unit V V V mA mA mA 9. Static characteristics Table 7. Static characteristics Conditions Min VIK VOH input clamping voltage HIGH-level output voltage VCC = 4.5 V; IIK = −18 mA VCC = 4.5 V; VIL = 0.8 V; VIH = 2.0 V IOH = −3 mA VCC = ±10 % VCC = ±5 % IOH = −15 mA VCC = ±10 % 2.0 V 3.3 2.4 2.7 V V 25 °C Typ[1] Max −1.2 −0.73 −40 °C to +85 °C Unit Min −1.2 Max V Symbol Parameter 74F656A_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 25 March 2010 6 of 14 NXP Semiconductors 74F656A Octal buffer/driver with parity; non-inverting; 3-state Table 7. Static characteristics …continued Conditions VCC = 4.5 V; VIL = 0.8 V; VIH = 2.0 V IOL = 64 mA VCC = ±10 % VCC = ±5 % [2] Symbol Parameter VOL LOW-level output voltage 25 °C Min Typ[1] Max −40 °C to +85 °C Unit Min Max 0.42 50 78 83 - −100 - 0.55 0.55 100 40 20 80 40 −40 −20 50 −50 −225 80 110 90 V V μA μA μA μA μA μA μA μA μA mA mA mA mA II IIH input leakage current VCC = 0 V; VI = 7.0 V pin Dn pin PI, OEn VCC = 5.5 V; VI = 2.7 V; industrial pin Dn pin PI, OEn HIGH-level input current VCC = 5.5 V; VI = 2.7 V; commercial IIL LOW-level input current VCC = 5.5 V; VI = 0.5 V pin Dn pin PI, OEn IOZ OFF-state output current VCC = 5.5 V VO = 2.7 V VO = 0.5 V IO ICC output current supply current VCC = 5.5 V VCC = 5.5 V; VI = GND or VCC outputs HIGH-state outputs LOW-state outputs OFF-state - [1] [2] All typical values are measured at VCC = 5 V. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 10. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; for test circuit, see Figure 7. Symbol Parameter Conditions 25 °C; VCC = 5.0 V Min tPLH LOW to HIGH propagation delay Dn to Qn; see Figure 5 Dn to ΣE, ΣO; see Figure 5 tPHL HIGH to LOW propagation delay Dn to Qn; see Figure 5 Dn to ΣE, ΣO; see Figure 5 tPZH 74F656A_5 0 °C to 70 °C; −40 °C to +85 °C; Unit VCC = 5.0 V ± 0.5 V VCC = 5.0 V ± 0.5 V Min 2.0 5.5 2.5 5.5 3.5 Max 7.0 14.0 7.5 16.5 11.5 Min 2.0 4.5 2.5 5.5 3.0 Max 8.0 16.5 9.0 18.0 13.0 ns ns ns ns ns Typ Max 4.0 6.5 2.0 5.5 2.5 5.5 3.5 10.0 13.0 5.5 7.0 11.0 14.5 7.0 10.5 OFF-state to HIGH propagation delay OEn to Qn; see Figure 6 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 25 March 2010 7 of 14 NXP Semiconductors 74F656A Octal buffer/driver with parity; non-inverting; 3-state Table 8. Dynamic characteristics …continued GND = 0 V; for test circuit, see Figure 7. Symbol Parameter Conditions 25 °C; VCC = 5.0 V Min tPZL tPHZ tPLZ OFF-state to LOW propagation delay HIGH to OFF-state propagation delay LOW to OFF-state propagation delay OEn to Qn; see Figure 6 OEn to Qn; see Figure 6 OEn to Qn; see Figure 6 4.0 1.5 2.0 Typ Max 8.0 4.5 5.0 11.0 8.0 8.0 0 °C to 70 °C; −40 °C to +85 °C; Unit VCC = 5.0 V ± 0.5 V VCC = 5.0 V ± 0.5 V Min 4.5 1.5 2.0 Max 12.0 9.0 9.0 Min 4.0 1.5 1.5 Max 13.5 10.0 10.0 ns ns ns 11. Waveforms VI Dn GND tPLH tPHL VM VM VOH ΣE, ΣO, Qn VOL 001aal257 VM VM VM = 1.5 V Fig 5. Propagation delay input Dn to output Qn, ΣE, ΣO VI OEn input GND tPLZ 3.5 V output LOW-to-OFF OFF-to-LOW VOL tPHZ VOH output HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled outputs enabled 001aal293 VM tPZL VM VOL + 0.3 V tPZH VOH − 0.3 V VM VM = 1.5 V VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. 3-state output enable and disable times 74F656A_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 25 March 2010 8 of 14 NXP Semiconductors 74F656A Octal buffer/driver with parity; non-inverting; 3-state VI negative pulse 0V tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW 001aac221 90 % VM VCC VI VO DUT RT CL RL RL VEXT G VI positive pulse 0V VM 10 % mna616 a. Input pulse definition Test data and VEXT levels are given in Table 9. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. b. Test circuit RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = Test voltage for switching times. Fig 7. Table 9. Input VI 3.0 V Test circuit for measuring switching times Test data Load fI 1 MHz tW 500 ns tr, tf ≤ 2.5 ns CL 50 pF RL 500 Ω VEXT tPHL, tPLH open tPZH, tPHZ open tPZL, tPLZ 7.0 V 74F656A_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 25 March 2010 9 of 14 NXP Semiconductors 74F656A Octal buffer/driver with parity; non-inverting; 3-state 12. Package outline SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 D E A X c y HE vMA Z 24 13 Q A2 A1 pin 1 index Lp L 1 e bp 12 wM detail X (A 3) θ A 0 5 scale 10 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.1 A1 0.3 0.1 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 15.6 15.2 0.61 0.60 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.05 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) θ o 0.9 0.4 0.012 0.096 0.004 0.089 0.019 0.013 0.014 0.009 0.419 0.043 0.055 0.394 0.016 0.035 0.004 0.016 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT137-1 REFERENCES IEC 075E05 JEDEC MS-013 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 8. 74F656A_5 Package outline SOT137-1 (SO24) © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 25 March 2010 10 of 14 NXP Semiconductors 74F656A Octal buffer/driver with parity; non-inverting; 3-state 13. Abbreviations Table 10. Acronym DUT ESD HBM MM PCB Abbreviations Description Device Under Test ElectroStatic Discharge Human Body Model Machine Model Printed-Circuit Board 14. Revision history Table 11. Revision history Release date 20100325 20100205 Data sheet status Product data sheet Product data sheet Change notice Supersedes 74F656A_4 74F656A_3 Document ID 74F656A_5 74F656A_4 Modifications: • • • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. DIP 24 (SOT222-1) package removed from Section 3 “Ordering information” and Section 12 “Package outline” Product specification Product specification 74F656A_2 - 74F656A_3 74F656A_2 20000630 19910717 74F656A_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 25 March 2010 11 of 14 NXP Semiconductors 74F656A Octal buffer/driver with parity; non-inverting; 3-state 15. Legal information 15.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer’s third party customer(s) (hereinafter both referred to as “Application”). It is customer’s sole responsibility to check whether the NXP Semiconductors product is suitable and fit for the Application planned. Customer has to do all necessary testing for the Application in order to avoid a default of the Application and the product. NXP Semiconductors does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 15.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be 74F656A_5 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 25 March 2010 12 of 14 NXP Semiconductors 74F656A Octal buffer/driver with parity; non-inverting; 3-state 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74F656A_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 25 March 2010 13 of 14 NXP Semiconductors 74F656A Octal buffer/driver with parity; non-inverting; 3-state 17. Contents 1 2 3 4 5 5.1 5.2 6 6.1 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 25 March 2010 Document identifier: 74F656A_5