74HC132; 74HCT132
Quad 2-input NAND Schmitt trigger
Rev. 4 — 1 December 2015
Product data sheet
1. General description
The 74HC132; 74HCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs
include clamp diodes. This enables the use of current limiting resistors to interface inputs
to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input
signals into sharply defined jitter-free output signals.
2. Features and benefits
Complies with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Applications
Wave and pulse shapers
Astable multivibrators
Monostable multivibrators
74HC132; 74HCT132
NXP Semiconductors
Quad 2-input NAND Schmitt trigger
4. Ordering information
Table 1.
Ordering information
Type number
74HC132D
Package
Temperature range
Name
Description
Version
40 C to +125 C
SO14
plastic small outline package; 14 leads; body width
3.9 mm
SOT108-1
40 C to +125 C
SSOP14
plastic shrink small outline package; 14 leads; body
width 5.3 mm
SOT337-1
40 C to +125 C
TSSOP14
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74HCT132D
74HC132DB
74HCT132DB
74HC132PW
74HCT132PW
5. Functional diagram
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Logic symbol
74HC_HCT132
Product data sheet
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PQD
Fig 1.
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PQD
Fig 2.
IEC logic symbol
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 1 December 2015
PQD
Fig 3.
Logic diagram (one
Schmitt trigger)
© NXP Semiconductors N.V. 2015. All rights reserved.
2 of 19
74HC132; 74HCT132
NXP Semiconductors
Quad 2-input NAND Schmitt trigger
6. Pinning information
6.1 Pinning
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PQD
Fig 4.
Pin configuration SO14 and (T)SSOP14
6.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
1A to 4A
1, 4, 9, 12
data input
1B to 4B
2, 5, 10, 13
data input
1Y to 4Y
3, 6, 8, 11
data output
GND
7
ground (0 V)
VCC
14
supply voltage
7. Functional description
Table 3.
Function table[1]
Input
Output
nA
nB
L
L
H
L
H
H
H
L
H
H
H
L
[1]
nY
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
74HC_HCT132
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 1 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
3 of 19
74HC132; 74HCT132
NXP Semiconductors
Quad 2-input NAND Schmitt trigger
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
Min
Max
Unit
0.5
+7
V
-
20
mA
-
20
mA
-
25
mA
50
mA
IIK
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
[1]
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
[1]
IO
output current
0.5 V < VO < VCC + 0.5 V
ICC
supply current
-
IGND
ground current
50
-
mA
Tstg
storage temperature
65
+150
C
-
500
mW
total power dissipation
Ptot
[2]
SO14, and (T)SSOP14 packages
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
For SO14 package: Ptot derates linearly with 8 mW/K above 70 C.
For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
9. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
VCC
supply voltage
Conditions
74HC132
74HCT132
Unit
Min
Typ
Max
Min
Typ
Max
2.0
5.0
6.0
4.5
5.0
5.5
V
VI
input voltage
0
-
VCC
0
-
VCC
V
VO
output voltage
0
-
VCC
0
-
VCC
V
Tamb
ambient temperature
40
+25
+125
40
+25
+125
C
74HC_HCT132
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 1 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
4 of 19
74HC132; 74HCT132
NXP Semiconductors
Quad 2-input NAND Schmitt trigger
10. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
IO = 20 A; VCC = 2.0 V
1.9
2.0
-
1.9
-
1.9
-
V
IO = 20 A; VCC = 4.5 V
4.4
4.5
-
4.4
-
4.4
-
V
74HC132
VOH
VOL
HIGH-level
output voltage
LOW-level
output voltage
VI = VT+ or VT
IO = 20 A; VCC = 6.0 V
5.9
6.0
-
5.9
-
5.9
-
V
IO = 4.0 mA; VCC = 4.5 V
3.98
4.32
-
3.84
-
3.7
-
V
IO = 5.2 mA; VCC = 6.0 V
5.48
5.81
-
5.34
-
5.2
-
V
IO = 20 A; VCC = 2.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 20 A; VCC = 4.5 V
-
0
0.1
-
0.1
-
0.1
V
IO = 20 A; VCC = 6.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 4.0 mA; VCC = 4.5 V
-
0.15
0.26
-
0.33
-
0.4
V
IO = 5.2 mA; VCC = 6.0 V
VI = VT+ or VT
-
0.16
0.26
-
0.33
-
0.4
V
II
input leakage
current
VI = VCC or GND;
VCC = 6.0 V
-
-
±0.1
-
±1.0
-
±1.0
A
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
2.0
-
20
-
40
A
CI
input
capacitance
-
3.5
-
-
-
-
-
pF
IO = 20 A
4.4
4.5
-
4.4
-
4.4
-
V
IO = 4.0 mA
3.98
4.32
-
3.84
-
3.7
-
V
74HCT132
VOH
VOL
HIGH-level
output voltage
LOW-level
output voltage
VI = VT+ or VT; VCC = 4.5 V
VI = VT+ or VT; VCC = 4.5 V
IO = 20 A;
-
0
0.1
-
0.1
-
0.1
V
IO = 4.0 mA;
-
0.15
0.26
-
0.33
-
0.4
V
II
input leakage
current
VI = VCC or GND;
VCC = 5.5 V
-
-
±0.1
-
±1.0
-
±1.0
A
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
2.0
-
20
-
40
A
ICC
additional
supply current
per input pin;
VI = VCC 2.1 V; IO = 0 A;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V
-
30
108
-
135
-
147
A
CI
input
capacitance
-
3.5
-
-
-
-
-
pF
74HC_HCT132
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 1 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
5 of 19
74HC132; 74HCT132
NXP Semiconductors
Quad 2-input NAND Schmitt trigger
11. Dynamic characteristics
Table 7.
Dynamic characteristics
GND = 0 V; CL = 50 pF; for load circuit see Figure 6.
Symbol Parameter
25 C
Conditions
40 C to +125 C Unit
Min
Typ
Max
Max
(85 C)
Max
(125 C)
-
36
125
155
190
VCC = 4.5 V
-
13
25
31
38
ns
VCC = 5.0 V; CL = 15 pF
-
11
-
-
-
ns
-
10
21
26
32
ns
VCC = 2.0 V
-
19
75
95
110
ns
VCC = 4.5 V
-
7
15
19
22
ns
-
6
13
16
19
ns
-
24
-
-
-
pF
-
20
33
41
50
ns
74HC132
propagation delay nA, nB to nY; see Figure 5
tpd
[1]
VCC = 2.0 V
VCC = 6.0 V
transition time
tt
[2]
see Figure 5
VCC = 6.0 V
power dissipation
capacitance
CPD
ns
per package; VI = GND to VCC
[3]
74HCT132
propagation delay nA, nB to nY; see Figure 5
tpd
[1]
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
transition time
tt
power dissipation
capacitance
CPD
-
17
-
-
-
ns
VCC = 4.5 V; see Figure 5
[2]
-
7
15
19
22
ns
per package;
VI = GND to VCC 1.5 V
[3]
-
20
-
-
-
pF
[1]
tpd is the same as tPHL and tPLH.
[2]
tt is the same as tTHL and tTLH.
[3]
CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
74HC_HCT132
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 1 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
6 of 19
74HC132; 74HCT132
NXP Semiconductors
Quad 2-input NAND Schmitt trigger
12. Waveforms
9,
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