74HC1G66GW

74HC1G66; 74HCT1G66 Single-pole single-throw analog switch Rev. 04 — 19 December 2008 Product data sheet 1. General description 74HC1G66 and 74HCT1G66 are high-speed Si-gate CMOS devices. They are single-pole single-throw analog switches. The switch has two input/output pins (Y and Z) and an active HIGH enable input pin (E). When pin E is LOW, the analog switch is turned off. The non-standard output currents are equal to those of the 74HC4066 and 74HCT4066. 2. Features I Wide supply voltage range from 2.0 V to 10.0 V for the 74HC1G66 I Very low ON resistance: N 45 Ω (typ.) at VCC = 4.5 V N 30 Ω (typ.) at VCC = 6.0 V N 25 Ω (typ.) at VCC = 9.0 V I High noise immunity I Low power dissipation I Multiple package options I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V I Specified from −40 °C to +85 °C and −40 °C to +125 °C 3. Ordering information Table 1. Ordering information Package Temperature range 74HC1G66GW 74HCT1G66GW 74HC1G66GV 74HCT1G66GV −40 °C to +125 °C SC-74A −40 °C to +125 °C Name TSSOP5 Description plastic thin shrink small outline package; 5 leads; body width 1.25 mm plastic surface-mounted package; 5 leads Version SOT353-1 SOT753 Type number NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch 4. Marking Table 2. Marking codes Marking HL TL H66 T66 Type number 74HC1G66GW 74HCT1G66GW 74HC1G66GV 74HCT1G66GV 5. Functional diagram E Z Y Y Z E 001aag487 001aah372 Fig 1. Logic symbol Fig 2. Logic diagram 6. Pinning information 6.1 Pinning 74HC1G66 74HCT1G66 Y Z 1 2 5 VCC GND 3 001aaf185 4 E Fig 3. Pin configuration SOT353-1 and SOT753 6.2 Pin description Table 3. Symbol Y Z GND E VCC Pin description Pin 1 2 3 4 5 Description independent input or output independent input or output ground (0 V) enable input (active HIGH) supply voltage 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 2 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch 7. Functional description Table 4. Input E L H [1] H = HIGH voltage level; L = LOW voltage level. Function table[1] Switch OFF ON 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK ISK ISW ICC IGND Tstg Ptot [1] [2] Parameter supply voltage input clamping current switch clamping current switch current supply current ground current storage temperature total power dissipation Conditions VI < −0.5 V or VI > VCC + 0.5 V VI < −0.5 V or VI > VCC + 0.5 V VSW > −0.5 V or VSW < VCC + 0.5 V [1] [1] Min −0.5 −50 −65 Max +11.0 ±20 ±20 ±25 50 +150 250 Unit V mA mA mA mA mA °C mW Tamb = −40 °C to +125 °C [2] - The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K. 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V).[1] Symbol Parameter VCC VI VSW Tamb ∆t/∆V supply voltage input voltage switch voltage ambient temperature input transition rise and fall rate VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VCC = 10.0 V [1] Conditions Min 2.0 0 0 −40 - 74HC1G66 Typ 5.0 +25 1.67 Max 10.0 VCC VCC +125 625 139 83 35 Min 4.5 0 0 −40 - 74HCT1G66 Typ 5.0 +25 1.67 Max 5.5 VCC VCC +125 139 - Unit V V V °C ns/V ns/V ns/V ns/V To avoid drawing VCC current out of pin Z, when switch current flows in pin Y, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into pin Z, no VCC current will flow out of terminal Y. In this case there is no limit for the voltage drop across the switch, but the voltage at pins Y and Z may not exceed VCC or GND. 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 3 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter 74HC1G66 VIH HIGH-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VCC = 9.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VCC = 9.0 V II input leakage current E; VI = VCC or GND VCC = 6.0 V VCC = 10.0 V IS(OFF) IS(ON) ICC OFF-state leakage current ON-state leakage current supply current Y or Z; VCC = 10 V; see Figure 4 Y or Z; VCC = 10 V; see Figure 5 E, Y or Z; VI = VCC or GND; VSW = GND or VCC VCC = 6.0 V VCC = 10.0 V CI CS(ON) input capacitance ON-state capacitance 1.0 2.0 1.5 8 10 20 20 40 µA µA pF pF 0.1 0.2 0.1 0.1 1.0 2.0 1.0 1.0 1.0 2.0 1.0 1.0 µA µA µA µA 1.5 3.15 4.2 6.3 1.2 2.4 3.2 4.7 0.8 2.1 2.8 4.3 0.5 1.35 1.8 2.7 1.5 3.15 4.2 6.3 0.5 1.35 1.8 2.7 V V V V V V V V Conditions −40 °C to +85 °C Min Typ[1] Max −40 °C to +125 °C Unit Min Max 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 4 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch Table 7. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter 74HCT1G66 VIH VIL II IS(OFF) IS(ON) ICC HIGH-level input voltage LOW-level input voltage input leakage current OFF-state leakage current ON-state leakage current supply current VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V E; VI = VCC or GND; VCC = 5.5 V Y or Z; VCC = 5.5 V; see Figure 4 Y or Z; VCC = 5.5 V; see Figure 5 E, Y or Z; VI = VCC or GND; VSW = GND or VCC; VCC = 4.5 V to 5.5 V VI = VCC − 2.1 V; VCC = 4.5 V to 5.5 V; IO = 0 A 2.0 0.1 1.6 1.2 0.1 0.1 0.1 1 0.8 1.0 1.0 1.0 10 2.0 0.8 1.0 1.0 1.0 20 V V µA µA µA µA Conditions −40 °C to +85 °C Min Typ[1] Max −40 °C to +125 °C Unit Min Max ∆ICC CI CS(ON) additional supply current input capacitance ON-state capacitance - 1.5 8 500 - - 850 - µA pF pF [1] Typical values are measured at Tamb = 25 °C. 10.1 Test circuits VCC VIL IS VI VCC VIH Y IS VO VI E Z GND E Z GND Y IS VO 001aag488 001aag489 VI = VCC or GND and VO = GND or VCC. VI = VCC or GND and VO = open circuit. Fig 4. Test circuit for measuring OFF-state leakage current Fig 5. Test circuit for measuring ON-state leakage current 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 5 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch 10.2 ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graph see Figure 7. Symbol Parameter Conditions −40 °C to +85 °C Min 74HC1G66[1] RON(peak) ON resistance (peak) VI = GND to VCC; see Figure 6 ISW = 0.1 mA; VCC = 2.0 V ISW = 1 mA; VCC = 4.5 V ISW = 1 mA; VCC = 6.0 V ISW = 1 mA; VCC = 9.0 V RON(rail) ON resistance (rail) VI = GND; see Figure 6 ISW = 0.1 mA; VCC = 2.0 V ISW = 1 mA; VCC = 4.5 V ISW = 1 mA; VCC = 6.0 V ISW = 1 mA; VCC = 9.0 V VI = VCC; see Figure 6 ISW = 0.1 mA; VCC = 2.0 V ISW = 1 mA; VCC = 4.5 V ISW = 1 mA; VCC = 6.0 V ISW = 1 mA; VCC = 9.0 V 74HCT1G66 RON(peak) ON resistance (peak) RON(rail) ON resistance (rail) VI = GND to VCC; see Figure 6 ISW = 1 mA; VCC = 4.5 V VI = GND; see Figure 6 ISW = 1 mA; VCC = 4.5 V VI = VCC; see Figure 6 ISW = 1 mA; VCC = 4.5 V [1] [2] −40 °C to +125 °C Min Max Unit Typ[2] Max - 42 31 23 75 29 23 18 75 35 27 21 118 105 88 95 82 70 106 94 78 - 142 126 105 115 100 80 128 113 95 Ω Ω Ω Ω Ω Ω Ω Ω Ω Ω Ω Ω - 42 29 35 118 95 106 - 142 115 128 Ω Ω Ω At supply voltages approaching 2 V, the ON resistance becomes extremely non-linear. Therefore it is recommended that these devices be used to transmit digital signals only, when using this supply voltage. Typical values are measured at Tamb = 25 °C. 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 6 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch 10.3 ON resistance test circuit and graphs mna081 80 RON (Ω) 60 VSW VCC VIH E Y GND Z 20 40 VCC = 4.5 V 6.0 V 9.0 V VI ISW 0 0 001aag490 2 4 6 8 V (V) 10 I RON = VSW / ISW. Tamb = 25 °C. Fig 6. Test circuit for measuring ON resistance Fig 7. Typical ON resistance as a function of input voltage 11. Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); CL = 50 pF; RL = 1 kΩ, unless otherwise specified; For test circuit see Figure 10. Symbol Parameter 74HC1G66 tpd propagation delay Y to Z or Z to Y; RL = ∞ Ω; see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VCC = 9.0 V ten enable time E to Y or Z; see Figure 9 VCC = 2.0 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V VCC = 9.0 V [2] [2] Conditions −40 °C to +85 °C Min Typ[1] Max −40 °C to +125 °C Unit Min Max - 8 3 2 1 50 16 11 13 9 75 15 13 10 125 25 21 16 - 90 18 15 12 150 30 26 20 ns ns ns ns ns ns ns ns ns 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 7 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch Table 9. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF; RL = 1 kΩ, unless otherwise specified; For test circuit see Figure 10. Symbol Parameter tdis disable time Conditions E to Y or Z; see Figure 9 VCC = 2.0 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V VCC = 9.0 V CPD power dissipation VI = GND to VCC capacitance propagation delay Y to Z or Z to Y; RL = ∞ Ω; see Figure 8 VCC = 4.5 V ten enable time E to Y or Z; see Figure 9 VCC = 4.5 V VCC = 5.0 V; CL = 15 pF tdis disable time E to Y or Z; see Figure 9 VCC = 4.5 V VCC = 5.0 V; CL = 15 pF CPD power dissipation VI = GND to VCC − 1.5 V capacitance All typical values are measured at Tamb = 25 °C. tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. CPD is used to determine the dynamic power dissipation PD (µW). PD = CPD × VCC2 × fi + Σ ((CL × CSW) × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; CSW = maximum switch capacitance in pF (see Table 7); VCC = supply voltage in Volt; Σ ((CL × CSW) × VCC2 × fo) = sum of outputs. [3] [2] [2] [3] [2] −40 °C to +85 °C Min Typ[1] 27 16 11 14 12 9 Max 190 38 33 16 - −40 °C to +125 °C Unit Min Max 225 45 38 20 ns ns ns ns ns pF 74HCT1G66 tpd [2] - 3 15 12 13 12 9 15 30 44 - - 18 36 53 - ns ns ns ns ns pF [1] [2] [3] 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 8 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch 11.1 Waveforms and test circuit VI Y or Z input GND t PLH VOH Z or Y output VOL mna667 VM t PHL VM Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 8. Input (Y or Z) to output (Z or Y) propagation delays VI E GND t PLZ VCC Y or Z output LOW-to-OFF OFF-to-LOW VOL t PHZ output HIGH-to-OFF OFF-to-HIGH VOH VY VM GND switch enabled switch disabled switch enabled mna668 VM t PZL VM VX t PZH Y or Z Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 9. Table 10. Type Enable and disable times Measurement points Input VM 0.5VCC 1.3 V Output VM 0.5VCC 1.3 V VX VOL + 10% VOL + 10% VY VOH − 10% VOH − 10% 74HC1G66 74HCT1G66 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 9 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch VI negative pulse 0V tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW VM VM VI positive pulse 0V VCC VCC G VI VO RL S1 DUT RT CL open 001aad983 Test data is given in Table 11. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 10. Test circuit for measuring switching times Table 11. Type 74HC1G66 74HCT1G66 [1] Test data Input VI GND to VCC GND to 3 V tr, tf[1] 6 ns 6 ns Load CL 50 pF, 15 pF 50 pF, 15 pF RL 1 kΩ, ∞ Ω 1 kΩ, ∞ Ω S1 position tPHL, tPLH open open tPZH, tPHZ GND GND tPZL, tPLZ VCC VCC There is no constraint on tr, tf with a 50% duty factor when measuring fmax. 11.2 Additional dynamic characteristics Table 12. Additional dynamic characteristics for 74HC1G66 and 74HCT1G66 GND = 0 V; tr = tf = 6.0 ns; CL = 50 pF; unless otherwise specified. All typical values are measured at Tamb = 25 °C. Symbol Parameter THD total harmonic distortion Conditions fi = 1 kHz; RL = 10 kΩ; see Figure 11 VCC = 4.5 V; VI = 4.0 V (p-p) VCC = 9.0 V; VI = 8.0 V (p-p) fi = 10 kHz; RL = 10 kΩ; see Figure 11 VCC = 4.5 V; VI = 4.0 V (p-p) VCC = 9.0 V; VI = 8.0 V (p-p) 0.12 0.06 % % 0.04 0.02 Min Typ Max Unit % % % 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 10 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch Table 12. Additional dynamic characteristics for 74HC1G66 and 74HCT1G66 …continued GND = 0 V; tr = tf = 6.0 ns; CL = 50 pF; unless otherwise specified. All typical values are measured at Tamb = 25 °C. Symbol Parameter f(−3dB) −3 dB frequency response Conditions RL = 50 Ω; CL = 10 pF; see Figure 12 and 13 VCC = 4.5 V VCC = 9.0 V αiso isolation (OFF-state) RL = 600 Ω; fi = 1 MHz; see Figure 14 and 15 VCC = 4.5 V VCC = 9.0 V −50 −50 dB dB 180 200 MHz MHz Min Typ Max Unit 11.3 Test circuits and graphs VCC VIH 10 µF VCC E 2RL Y/Z Z/Y VO 2RL CL fi D 001aai678 Fig 11. Test circuit for measuring total harmonic distortion VCC VIH 0.1 µF VCC E 2RL Y/Z Z/Y VO 2RL CL fi dB 001aai680 With fi = 1 MHz adjust the switch input voltage for a 0 dBm level at the switch output, (0 dBm = 1 mW into 50 Ω). Then Increase the input frequency until the dB meter reads −3 dB Fig 12. Test circuit for measuring the −3 dB frequency response 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 11 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch 5 mna083 (dB) 0 −5 10 102 103 104 105 fi (kHz) 106 Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 Ω; RSOURCE = 1 kΩ. Fig 13. Typical −3 dB frequency response VCC VIL 0.1 µF VCC E 2RL Y/Z Z/Y VO CL 2RL fi dB 001aai679 Adjust the switch input voltage for a 0 dBm level, (0 dBm = 1 mW into 600 Ω) Fig 14. Test circuit for measuring isolation (OFF-state) 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 12 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch 0 (dB) −20 mna082 −40 −60 −80 −100 10 102 103 104 105 fi (kHz) 106 Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 Ω; RSOURCE = 1 kΩ. Fig 15. Typical isolation (OFF-state) as a function of frequency 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 13 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch 12. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 D E A X c y HE vMA Z 5 4 A2 A1 (A3) θ A 1 e e1 bp 3 wM detail X Lp L 0 1.5 scale 3 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.1 0 A2 1.0 0.8 A3 0.15 bp 0.30 0.15 c 0.25 0.08 D(1) 2.25 1.85 E(1) 1.35 1.15 e 0.65 e1 1.3 HE 2.25 2.0 L 0.425 Lp 0.46 0.21 v 0.3 w 0.1 y 0.1 Z(1) 0.60 0.15 θ 7° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT353-1 REFERENCES IEC JEDEC MO-203 JEITA SC-88A EUROPEAN PROJECTION ISSUE DATE 00-09-01 03-02-19 Fig 16. Package outline SOT353-1 (TSSOP5) 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 14 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch Plastic surface-mounted package; 5 leads SOT753 D B E A X y HE vMA 5 4 Q A A1 c 1 2 3 detail X Lp e bp wM B 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 0.100 0.013 bp 0.40 0.25 c 0.26 0.10 D 3.1 2.7 E 1.7 1.3 e 0.95 HE 3.0 2.5 Lp 0.6 0.2 Q 0.33 0.23 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT753 REFERENCES IEC JEDEC JEITA SC-74A EUROPEAN PROJECTION ISSUE DATE 02-04-16 06-03-16 Fig 17. Package outline SOT753 (SC-74A) 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 15 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch 13. Abbreviations Table 13. Acronym CMOS ESD HBM MM TTL DUT Abbreviations Description Complementary Metal-Oxide Semiconductor ElectroStatic Discharge Human Body Model Machine Model Transistor-Transistor Logic Device Under Test 14. Revision history Table 14. Revision history Release date 20081219 Data sheet status Product data sheet Change notice Supersedes 74HC_HCT1G66_3 Document ID 74HC_HCT1G66_4 Modifications: • • • • • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Package SOT353 changed to SOT353-1 in Table 1 and Figure 16. Quick Reference Data and Soldering sections removed. Section 2 “Features” updated. Product specification Product specification Product specification 74HC_HCT1G66_2 74HC_HCT1G66_1 - 74HC_HCT1G66_3 74HC_HCT1G66_2 74HC_HCT1G66_1 20020515 20010302 19980803 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 16 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch 15. Legal information 15.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 15.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 19 December 2008 17 of 18 NXP Semiconductors 74HC1G66; 74HCT1G66 Single-pole single-throw analog switch 17. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 10.1 10.2 10.3 11 11.1 11.2 11.3 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 3 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ON resistance test circuit and graphs. . . . . . . . 7 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms and test circuit . . . . . . . . . . . . . . . . 9 Additional dynamic characteristics . . . . . . . . . 10 Test circuits and graphs . . . . . . . . . . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Contact information. . . . . . . . . . . . . . . . . . . . . 17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 19 December 2008 Document identifier: 74HC_HCT1G66_4