74HC1GU04

74HC1GU04 Inverter Rev. 05 — 10 July 2007 Product data sheet 1. General description The 74HC1GU04 is a high-speed Si-gate CMOS device. It provides an inverting single stage function. The standard output currents are half those of the 74HCU04. 2. Features I I I I I Symmetrical output impedance Wide operating voltage range from 2.0 V to 6.0 V Low power dissipation Balanced propagation delays SOT353-1 and SOT753 package options 3. Ordering information Table 1. Ordering information Package Temperature range 74HC1GU04GW 74HC1GU04GV −40 °C to +125 °C −40 °C to +125 °C Name TSSOP5 SC-74A Description plastic thin shrink small outline package; 5 leads; body width 1.25 mm plastic surface-mounted package; 5 leads Version SOT353-1 SOT753 Type number 4. Marking Table 2. Marking codes Marking HD HU4 Type number 74HC1GU04GW 74HC1GU04GV 5. Functional diagram 2 A Y 4 2 1 mna044 4 A Y mna045 mna043 Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram NXP Semiconductors 74HC1GU04 Inverter 6. Pinning information 6.1 Pinning 74HC1GU04 n.c. A 1 2 5 VCC GND 3 001aaf105 4 Y Fig 4. Pin configuration 6.2 Pin description Table 3. Symbol n.c. A GND Y VCC Pin description Pin 1 2 3 4 5 Description not connected data input ground (0 V) data output supply voltage 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level Input A L H Output Y H L 74HC1GU04_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 10 July 2007 2 of 12 NXP Semiconductors 74HC1GU04 Inverter 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK IOK IO ICC IGND Tstg Ptot [1] [2] Parameter supply voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation Conditions VI < −0.5 V or VI > VCC + 0.5 V VO < −0.5 V or VO > VCC + 0.5 V −0.5 V < VO < VCC + 0.5 V [1] [1] [1] Min −0.5 −25 −65 Max +7.0 ±20 ±20 ±12.5 25 +150 200 Unit V mA mA mA mA mA °C mW Tamb = −40 °C to +125 °C [2] - The input and output voltage ratings may be exceeded if the input and output current ratings are observed. Above 55 °C the value of Ptot derates linearity with 2.5 mW/K. 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol VCC VI VO Tamb ∆t/∆V Parameter supply voltage input voltage output voltage ambient temperature input transition rise and fall rate VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V Conditions Min 2.0 0 0 −40 Typ 5.0 +25 Max 6.0 VCC VCC +125 625 139 83 Unit V V V °C ns/V ns/V ns/V 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 °C. Symbol VIH Parameter HIGH-level input voltage Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V −40 °C to +85 °C Min 1.7 3.6 4.8 Typ 1.4 2.6 3.4 0.6 1.9 2.6 Max 0.3 0.9 1.2 −40 °C to +125 °C Min 1.7 3.6 4.8 Max 0.3 0.9 1.2 V V V V V V Unit 74HC1GU04_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 10 July 2007 3 of 12 NXP Semiconductors 74HC1GU04 Inverter Table 7. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 °C. Symbol VOH Parameter HIGH-level output voltage Conditions VI = VIH or VIL IO = −20 µA; VCC = 2.0 V IO = −20 µA; VCC = 4.5 V IO = −20 µA; VCC = 6.0 V IO = −2.0 mA; VCC = 4.5 V IO = −2.6 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 µA; VCC = 2.0 V IO = 20 µA; VCC = 4.5 V IO = 20 µA; VCC = 6.0 V IO = 2.0 mA; VCC = 4.5 V IO = 2.6 mA; VCC = 6.0 V II ICC CI input leakage current supply current input capacitance VI = VCC or GND; VCC = 6.0 V VI = VCC or GND; IO = 0 A; VCC = 6.0 V 0 0 0 0.15 0.16 5 0.2 0.5 0.5 0.33 0.33 1.0 10 0.2 0.5 0.5 0.4 0.4 1.0 20 V V V V V µA µA pF 1.8 4.0 5.5 4.13 5.63 2.0 4.5 6.0 4.32 5.81 1.8 4.0 5.5 3.7 5.2 V V V V V −40 °C to +85 °C Min Typ Max −40 °C to +125 °C Min Max Unit 11. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; tr = tf = 6.0 ns; For test circuit see Figure 6. All typical values are measured at Tamb = 25 °C. Symbol Parameter tpd Conditions [1] −40 °C to +85 °C Min Typ 10 7 6 5 14 Max 90 18 15 - −40 °C to +125 °C Unit Min Max 105 21 18 ns ns ns ns pF propagation delay A to Y; see Figure 5 VCC = 2.0 V; CL = 50 pF VCC = 4.5 V; CL = 50 pF VCC = 6.0 V; CL = 50 pF VCC = 5.0 V; CL = 15 pF [2] CPD power dissipation VI = GND to VCC capacitance tpd is the same as tPLH and tPHL. CPD is used to determine the dynamic power dissipation PD (µW). PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts. - [1] [2] 74HC1GU04_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 10 July 2007 4 of 12 NXP Semiconductors 74HC1GU04 Inverter 12. Waveforms A input VM(1) VI VCC tPHL tPLH PULSE GENERATOR VO DUT RT CL 50 pF Y output VM(1) mna046 mna034 VM(1) = 0.5 × VCC; VI = GND to VCC. Test data is given in Table 8. DUT = Device Under Test CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 5. Input to output propagation delays Fig 6. Load circuitry for switching times 13. Typical transfer characteristics mna047 mna048 1 2 10 5 ICC (mA) VO (V) ICC (mA) VO (V) 0.5 1 5 2.5 0 0 1 VI (V) 2 0 0 0 2.5 VI (V) 5 0 Fig 7. VCC = 2.0 V; IO = 0 A Fig 8. VCC = 4.5 V; IO = 0 A 74HC1GU04_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 10 July 2007 5 of 12 NXP Semiconductors 74HC1GU04 Inverter 20 mna049 6 ICC (mA) VO (V) Rbias = 560 kΩ VCC 10 3 0.47 µF input output 100 µF VI (f = 1 kHz) A IO GND mna050 0 0 3 VI (V) 6 0 Fig 9. VCC = 6.0 V; IO = 0 A Fig 10. Test set-up for measuring forward transfer conductance gfs = ∆IO/∆VI at VO is constant 14. Application information Some applications are: • Linear amplifier (see Figure 11) • In crystal oscillator design (see Figure 12) Remark: All values given are typical unless otherwise specified R2 R1 VCC 1 µF R2 R1 U04 ZL U04 C1 C2 out mna052 mna053 Maximum Vo(p-p) = VCC − 1.5 V centered at 0.5 × VCC. C1 = 47 pF (typ.) C2 = 22 pF (typ.) R1 = 1 MΩ to 10 MΩ (typ.) R2 optimum value depends on the frequency and required stability against changes in VCC or average minimum ICC (ICC is typically 2 mA at VCC = 3 V and f = 1 MHz). G ol G v = – --------------------------------------R1 1 + ------ ( 1 + G ol ) R2 Gol = open loop gain Gv = voltage gain R1 ≥ 3 kΩ, R2 ≤ 1 MΩ ZL > 10 kΩ; Gol = 20 (typ.) Typical unity gain bandwidth product is 5 MHz. Fig 11. Used as a linear amplifier Fig 12. Crystal oscillator configuration 74HC1GU04_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 10 July 2007 6 of 12 NXP Semiconductors 74HC1GU04 Inverter Table 9. External components for resonator (f < 1 MHz) All values given are typical and must be used as an initial set-up Frequency 10 kHz to 15.9 kHz 16 kHz to 24.9 kHz 25 kHz to 54.9 kHz 55 kHz to 129.9 kHz 130 kHz to 199.9 kHz 200 kHz to 349.9 kHz 350 kHz to 600 kHz Table 10. Frequency 3 kHz 6 kHz 10 kHz 14 kHz >14 kHz Optimum value for R2 R2 2.0 kΩ 8.0 kΩ 1.0 kΩ 4.7 kΩ 0.5 kΩ 2.0 kΩ 0.5 kΩ 1.0 kΩ Optimum for minimum required ICC minimum influence due to change in VCC minimum required ICC minimum influence by VCC minimum required ICC minimum influence by VCC minimum required ICC minimum influence by VCC replace R2 by C3 with a typical value of 35 pF R1 2.2 MΩ 2.2 MΩ 2.2 MΩ 2.2 MΩ 2.2 MΩ 2.2 MΩ 2.2 MΩ R2 220 kΩ 220 kΩ 100 kΩ 100 kΩ 47 kΩ 47 kΩ 47 kΩ C1 56 pF 56 pF 56 pF 47 pF 47 pF 47 pF 47 pF C2 20 pF 10 pF 10 pF 5 pF 5 pF 5 pF 5 pF 80 input capacitance (pF) 60 mna054 (1) (2) 40 (3) 20 0 0 2 4 6 VI (V) 8 (1) VCC = 2.0 V. (2) VCC = 4.5 V. (3) VCC = 6.0 V. Fig 13. Typical input capacitance as a function of the input voltage 74HC1GU04_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 10 July 2007 7 of 12 NXP Semiconductors 74HC1GU04 Inverter 15. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 D E A X c y HE vMA Z 5 4 A2 A1 (A3) θ A 1 e e1 bp 3 wM detail X Lp L 0 1.5 scale 3 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.1 0 A2 1.0 0.8 A3 0.15 bp 0.30 0.15 c 0.25 0.08 D(1) 2.25 1.85 E(1) 1.35 1.15 e 0.65 e1 1.3 HE 2.25 2.0 L 0.425 Lp 0.46 0.21 v 0.3 w 0.1 y 0.1 Z(1) 0.60 0.15 θ 7° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT353-1 REFERENCES IEC JEDEC MO-203 JEITA SC-88A EUROPEAN PROJECTION ISSUE DATE 00-09-01 03-02-19 Fig 14. Package outline SOT353-1 (TSSOP5) 74HC1GU04_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 10 July 2007 8 of 12 NXP Semiconductors 74HC1GU04 Inverter Plastic surface-mounted package; 5 leads SOT753 D B E A X y HE vMA 5 4 Q A A1 c 1 2 3 detail X Lp e bp wM B 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 0.100 0.013 bp 0.40 0.25 c 0.26 0.10 D 3.1 2.7 E 1.7 1.3 e 0.95 HE 3.0 2.5 Lp 0.6 0.2 Q 0.33 0.23 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT753 REFERENCES IEC JEDEC JEITA SC-74A EUROPEAN PROJECTION ISSUE DATE 02-04-16 06-03-16 Fig 15. Package outline SOT753 (SC-74A) 74HC1GU04_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 10 July 2007 9 of 12 NXP Semiconductors 74HC1GU04 Inverter 16. Revision history Table 11. Revision history Release date 20070710 Data sheet status Product data sheet Change notice Supersedes 74HC1GU04_4 Document ID 74HC1GU04_5 Modifications: • • • • • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Package SOT353 changed to SOT353-1 in Table 1 and Figure 14. Quick Reference Data and Soldering sections removed. Section 2 “Features” updated. Product specification Product specification Product specification Product specification 74HC1GU04_3 74HC1GU04_2 74HC1GU04_1 - 74HC1GU04_4 74HC1GU04_3 74HC1GU04_2 74HC1GU04_1 20020527 20020513 20010427 19981118 74HC1GU04_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 10 July 2007 10 of 12 NXP Semiconductors 74HC1GU04 Inverter 17. Legal information 17.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 17.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 17.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 17.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 18. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com 74HC1GU04_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 10 July 2007 11 of 12 NXP Semiconductors 74HC1GU04 Inverter 19. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 17 17.1 17.2 17.3 17.4 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional description . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 3 Static characteristics. . . . . . . . . . . . . . . . . . . . . 3 Dynamic characteristics . . . . . . . . . . . . . . . . . . 4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Typical transfer characteristics . . . . . . . . . . . . 5 Application information. . . . . . . . . . . . . . . . . . . 6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Contact information. . . . . . . . . . . . . . . . . . . . . 11 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 10 July 2007 Document identifier: 74HC1GU04_5