74HC238PW

74HC238; 74HCT238 3-to-8 line decoder/demultiplexer Rev. 03 — 16 July 2007 Product data sheet 1. General description 74HC238 and 74HCT238 are high-speed Si-gate CMOS devices and are pin compatible with Low-Power Schottky TTL (LSTTL). The 74HC238/74HCT238 decoders accept three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active HIGH outputs (Y0 to Y7). The 74HC238/74HCT238 features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the “238” to a 1-to-32 (5 lines to 32 lines) decoder with just four “238” ICs and one inverter. The “238” can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state. The 74HC238/74HCT238 is similar to the 74HC138/74HCT138 but has non-inverting outputs. 2. Features I I I I I I I Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Active HIGH mutually exclusive outputs Multiple package options Complies with JEDEC standard no. 7A ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V I Specified from −40 °C to +85 °C and from −40 °C to +125 °C NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer 3. Ordering information Table 1. Ordering information Package Temperature range Name 74HC238N 74HC238D 74HC238DB 74HC238PW 74HC238BQ −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C DIP16 SO16 SSOP16 TSSOP16 Description plastic dual in-line package; 16 leads (300 mil) plastic small outline package; 16 leads; body width 3.9 mm plastic shrink small outline package; 16 leads; body width 5.3 mm plastic thin shrink small outline package; 16 leads; body width 4.4 mm Version SOT38-4 SOT109-1 SOT338-1 SOT403-1 Type number DHVQFN16 plastic dual in-line compatible thermal enhanced very thin SOT763-1 quad flat package; no leads; 16 terminals; body 2.5 × 3.5 × 0.85 mm DIP16 SO16 SSOP16 TSSOP16 plastic dual in-line package; 16 leads (300 mil) plastic small outline package; 16 leads; body width 3.9 mm plastic shrink small outline package; 16 leads; body width 5.3 mm plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT38-4 SOT109-1 SOT338-1 SOT403-1 74HCT238N 74HCT238D −40 °C to +125 °C −40 °C to +125 °C 74HCT238DB −40 °C to +125 °C 74HCT238PW −40 °C to +125 °C 74HCT238BQ −40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin SOT763-1 quad flat package; no leads; 16 terminals; body 2.5 × 3.5 × 0.85 mm 4. Functional diagram 15 15 14 A0 A1 A2 1 2 3 TO 8 DECODER 3 13 ENABLE 12 EXITING 11 10 9 7 E1 E2 E3 4 5 6 001aag752 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 E1 E2 E3 4 5 6 A0 A1 A2 1 2 3 3 TO 8 DECODER ENABLE EXITING 14 13 12 11 10 9 7 001aag753 Fig 1. Logic symbol Fig 2. Functional diagram 74HC_HCT238_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 2 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer Y0 E1 E2 E3 Y1 Y2 Y3 Y4 Y5 A0 Y6 A1 A2 Y7 001aag754 Fig 3. Logic diagram 5. Pinning information 5.1 Pinning 74HC238 74HCT238 A0 A1 A2 E1 E2 E3 Y7 GND 1 2 3 4 5 6 7 8 001aag755 74HC238 74HCT238 16 VCC 15 Y0 A1 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6 A2 E1 E2 E3 Y7 2 3 4 5 6 7 8 GND Y6 9 GND(1) terminal 1 index area 16 VCC 15 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 A0 1 001aag756 Transparent top view (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as supply pin or input Fig 4. Pin configuration DIP16, SO16, (T)SSOP16 Fig 5. Pin configuration DHVQFN16 74HC_HCT238_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 3 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer 5.2 Pin description Table 2. Symbol A[0:2] E1 E2 E3 Y[0:7] GND VCC Pin description Pin 1, 2, 3 4 5 6 15, 14, 13, 12, 11, 10, 9, 7 8 16 Description address input enable input (active LOW) enable input (active LOW) enable input (active HIGH) output (active HIGH) ground (0 V) supply voltage 6. Functional description Table 3. Inputs E1 H X X L L L L L L L L [1] Function table[1] Outputs E2 X H X L L L L L L L L E3 X X L H H H H H H H H A0 X X X L H L H L H L H A1 X X X L L H H L L H H A2 X X X L L L L H H H H Y0 L L L H L L L L L L L Y1 L L L L H L L L L L L Y2 L L L L L H L L L L L Y3 L L L L L L H L L L L Y4 L L L L L L L H L L L Y5 L L L L L L L L H L L Y6 L L L L L L L L L H L Y7 L L L L L L L L L L H H = HIGH voltage level; L = LOW voltage level; X = don’t care. 74HC_HCT238_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 4 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK IOK IO ICC IGND Tstg Ptot Parameter supply voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation DIP16 package SO16, SSOP16, TSSOP16 and DHVQFN16 packages [1] [2] [3] [2] [3] Conditions VI < −0.5 V or VI > VCC + 0.5 V VO < −0.5 V or VO > VCC + 0.5 V −0.5 V < VO < VCC + 0.5 V [1] [1] Min −0.5 −50 −65 - Max +7 ±20 ±20 ±25 50 +150 750 500 Unit V mA mA mA mA mA °C mW mW The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For DIP16 packages: above 70 °C the value of Ptot derates linearly at 12 mW/K. For SO16 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K. For SSOP16 and TSSOP16 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K. For DHVQFN16 packages: above 60 °C the value of Ptot derates linearly at 4.5 mW/K. 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC VI VO Tamb ∆t/∆V supply voltage input voltage output voltage ambient temperature input transition rise and fall rate VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V Conditions Min 2.0 0 0 −40 74HC238 Typ 5.0 1.67 Max 6.0 VCC VCC +125 625 139 83 Min 4.5 0 0 −40 74HCT238 Typ 5.0 1.67 Max 5.5 VCC VCC +125 139 V V V °C ns/V ns/V ns/V Unit 74HC_HCT238_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 5 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 74HC238 VIH HIGH-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level VI = VIH or VIL output voltage IO = −20 µA; VCC = 2.0 V IO = −20 µA; VCC = 4.5 V IO = −20 µA; VCC = 6.0 V IO = −4.0 mA; VCC = 4.5 V IO = −5.2 mA; VCC = 6.0 V VOL LOW-level VI = VIH or VIL output voltage IO = 20 µA; VCC = 2.0 V IO = 20 µA; VCC = 4.5 V IO = 20 µA; VCC = 6.0 V IO = 4.0 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V II ICC CI input leakage current VI = VCC or GND; VCC = 6.0 V 1.5 3.15 4.2 1.9 4.4 5.9 1.2 2.4 3.2 0.8 2.1 2.8 2.0 4.5 6.0 0.5 1.35 1.8 0.1 0.1 0.1 0.26 0.26 ±0.1 8.0 1.5 3.15 4.2 1.9 4.4 5.9 3.84 5.34 0.5 1.35 1.8 0.1 0.1 0.1 0.33 0.33 ±1.0 80 1.5 3.15 4.2 1.9 4.4 5.9 3.7 5.2 0.5 1.35 1.8 0.1 0.1 0.1 0.4 0.4 ±1.0 160 V V V V V V V V V V V V V V V V µA µA pF Conditions Min 25 °C Typ Max −40 °C to +85 °C −40 °C to +125 °C Unit Min Max Min Max 3.98 4.32 5.48 5.81 0 0 0 0.15 0.16 3.5 supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V input capacitance HIGH-level input voltage LOW-level input voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V 74HCT238 VIH VIL VOH 2.0 1.6 1.2 0.8 2.0 0.8 2.0 0.8 V V HIGH-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = −20 µA IO = −4.0 mA LOW-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 20 µA IO = 4.0 mA input leakage current VI = VCC or GND; VCC = 5.5 V 4.4 4.5 0.1 0.26 ±0.1 4.4 3.84 - 0.1 0.33 ±1.0 4.4 3.7 - 0.1 0.4 ±1.0 V V V V µA 3.98 4.32 0 0.16 - VOL II 74HC_HCT238_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 6 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter ICC ∆ICC Conditions Min supply current VI = VCC or GND; VCC = 5.5 V; IO = 0 A additional per input pin; supply current VI = VCC − 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A An inputs E1, E2 inputs E3 input CI input capacitance 70 40 145 3.5 252 144 522 315 180 653 343 196 711 µA µA µA pF 25 °C Typ Max 8.0 −40 °C to +85 °C −40 °C to +125 °C Unit Min Max 80 Min Max 160 µA 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; test circuit see Figure 8. Symbol Parameter Conditions Min 74HC238 tpd propagation delay An to Yn; see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V E3 to Yn; see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V En to Yn or see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V tt transition time see Figure 6 and Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V CPD 74HC_HCT238_3 25 °C Typ Max −40 °C to +125 °C Max (85 °C) Max Unit (125 °C) [1] [1] 47 17 14 14 52 19 16 15 50 18 17 14 19 7 6 72 150 30 26 160 32 27 155 31 26 75 15 13 - 190 38 33 200 40 34 195 39 33 95 19 16 - 225 45 38 240 48 41 235 47 40 110 22 19 - ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns pF [1] [2] [3] power dissipation capacitance per package; VI = GND to VCC - © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 7 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer Table 7. Dynamic characteristics GND = 0 V; test circuit see Figure 8. Symbol Parameter Conditions Min 74HCT238 tpd propagation delay An to Yn; see Figure 6 VCC = 4.5 V VCC = 5.0 V; CL = 15 pF E3 to Yn; see Figure 6 VCC = 4.5 V VCC = 5.0 V; CL = 15 pF En to Yn or see Figure 7 VCC = 4.5 V VCC = 5.0 V; CL = 15 pF tt CPD transition time power dissipation capacitance VCC = 4.5 V; see Figure 6 and Figure 7 per package; VI = GND to VCC − 1.5 V [2] [1] [1] [1] 25 °C Typ Max −40 °C to +125 °C Max (85 °C) Max Unit (125 °C) - 19 18 20 20 20 21 7 76 35 37 35 15 - 44 46 44 19 - 53 56 53 22 - ns ns ns ns ns ns ns pF [3] [1] [2] [3] tpd is the same as tPHL and tPLH. tt is the same as tTHL and tTLH. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi × N + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑ (CL × VCC2 × fo) = sum of outputs. 11. Waveforms An, E3 input VM tPHL VY tPLH VM VX tTHL tTLH 001aag757 Yn output Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Input (An, E3) to output (Yn) propagation delays and output transition times 74HC_HCT238_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 8 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer E1, E2 input VM tPHL VY tPLH VM VX tTHL tTLH 001aag758 Yn output Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 7. Input (E1, E2) to output (Yn) propagation delays and output transition times Table 8. Type 74HC238 74HCT238 Measurement points Input VM 0.5VCC 1.3 V Output VM 0.5VCC 1.3 V VX 0.1VCC 0.1VCC VY 0.9VCC 0.9VCC 74HC_HCT238_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 9 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer VI negative pulse 0V tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW VM VM VI positive pulse 0V VCC VCC PULSE GENERATOR VI VO RL S1 DUT RT CL open 001aad983 Test data is given in Table 9. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch Fig 8. Load circuit for measuring switching times Table 9. Type 74HC238 74HCT238 Test data Input VI VCC 3V tr, tf 6 ns 6 ns Load CL 15 pF, 50 pF 15 pF, 50 pF RL 1 kΩ 1 kΩ S1 position tPHL, tPLH open open 74HC_HCT238_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 10 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer 12. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 D seating plane ME A2 A L A1 c Z e b1 b 16 9 b2 MH wM (e 1) pin 1 index E 1 8 0 5 scale 10 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.02 A2 max. 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 b2 1.25 0.85 0.049 0.033 c 0.36 0.23 0.014 0.009 D (1) 19.50 18.55 0.77 0.73 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.1 e1 7.62 0.3 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 0.76 0.03 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT38-4 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 95-01-14 03-02-13 Fig 9. Package outline SOT38-4 (DIP16) 74HC_HCT238_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 11 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE vMA Z 16 9 Q A2 pin 1 index θ Lp 1 e bp 8 wM L detail X A1 (A 3) A 0 2.5 scale 5 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07 JEDEC MS-012 JEITA EUROPEAN PROJECTION A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3 θ 0.010 0.057 0.069 0.004 0.049 0.019 0.0100 0.39 0.014 0.0075 0.38 0.244 0.041 0.228 0.028 0.004 0.012 8 o 0 o ISSUE DATE 99-12-27 03-02-19 Fig 10. Package outline SOT109-1 (SO16) 74HC_HCT238_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 12 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 D E A X c y HE vM A Z 16 9 Q A2 A1 pin 1 index Lp L 1 bp 8 wM detail X (A 3) θ A e 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 6.4 6.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.00 0.55 θ 8 o 0 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC MO-150 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 11. Package outline SOT338-1 (SSOP16) 74HC_HCT238_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 13 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 D E A X c y HE vMA Z 16 9 Q A2 pin 1 index A1 θ Lp L (A 3) A 1 e bp 8 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.40 0.06 θ 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 Fig 12. Package outline SOT403-1 (TSSOP16) 74HC_HCT238_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 14 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm D B A A A1 E c terminal 1 index area detail X terminal 1 index area e 2 L e1 b 7 vMCAB wM C y1 C C y 1 Eh 16 8 e 9 15 Dh 10 X 2.5 scale 5 mm 0 DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 3.6 3.4 Dh 2.15 1.85 E (1) 2.6 2.4 Eh 1.15 0.85 e 0.5 e1 2.5 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT763-1 REFERENCES IEC --JEDEC MO-241 JEITA --EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 13. Package outline SOT763-1 (DHVQFN16) 74HC_HCT238_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 15 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer 13. Abbreviations Table 10. Acronym CMOS DUT ESD HBM MM TTL Abbreviations Description Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model Transistor-Transistor Logic 14. Revision history Table 11. Revision history Release date 20070716 Data sheet status Product data sheet Change notice Supersedes 74HC_HCT238_CNV_2 Document ID 74HC_HCT238_3 Modifications: • • • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Added type number 74HC238BQ and 74HCT238BQ (DHVQFN16 package) Product specification - 74HC_HCT238_CNV_2 19970828 74HC_HCT238_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 16 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer 15. Legal information 15.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 15.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com 74HC_HCT238_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 16 July 2007 17 of 18 NXP Semiconductors 74HC238; 74HCT238 3-to-8 line decoder/demultiplexer 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Contact information. . . . . . . . . . . . . . . . . . . . . 17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 16 July 2007 Document identifier: 74HC_HCT238_3