74HC257D

74HC257; 74HCT257 Quad 2-input multiplexer; 3-state Rev. 05 — 13 January 2010 Product data sheet 1. General description The 74HC257; 74HCT257 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC257 and 74HCT257 have four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (S). The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data inputs from source 1 (1I1 to 4I1) are selected when S is HIGH. Data appears at the outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs. The 74HC257 and 74HCT257 are the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The outputs are forced to a high-impedance OFF-state when OE is HIGH. The logic equations for the outputs are: 1Y = OE • ( 1I1 • S • 1I0 • S ) 2Y = OE • ( 2I1 • S • 2I0 • S ) 3Y = OE • ( 3I1 • S • 3I0 • S ) 4Y = OE • ( 4I1 • S • 4I0 • S ) Except for their non-inverting (true) outputs the 74HC257; 74HCT257 are identical to the 74HC258. 2. Features Non-inverting data path 3-state outputs interface directly with system bus Complies with JEDEC standard no. 7A ESD protection: HBM JESD22-A114E exceeds 2 000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from −40 °C to +85 °C and from −40 °C to +125 °C NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state 3. Ordering information Table 1. Ordering information Package Temperature range 74HC257N 74HCT257N 74HC257D 74HCT257D 74HC257DB 74HCT257DB 74HC257PW 74HCT257PW −40 °C to +125 °C TSSOP16 −40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT338-1 SOT403-1 −40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 −40 °C to +125 °C Name DIP16 Description plastic dual in-line package; 16 leads (300 mil) Version SOT38-4 Type number 4. Functional diagram 1 15 1 2 3 5 6 11 10 14 13 15 1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1 OE mga835 G1 EN S 1Y 4 2 3 5 1 1 MUX 4 2Y 7 7 6 11 9 10 3Y 9 4Y 12 14 12 13 001aad467 Fig 1. Logic symbol Fig 2. IEC logic symbol 74HC_HCT257_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 13 January 2010 2 of 17 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state 2 3 5 6 11 10 14 13 1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1 1S SELECTOR 15 OE 3-STATE MULTIPLEXER OUTPUTS 1Y 4 2Y 7 3Y 9 4Y 12 mgr280 Fig 3. Functional diagram 1I0 1Y 1I1 2I0 2Y 2I1 3I0 3Y 3I1 4I0 4Y 4I1 OE S 001aad468 Fig 4. Logic diagram 74HC_HCT257_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 13 January 2010 3 of 17 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state 5. Pinning information 5.1 Pinning 74HC257 74HCT257 S 1I0 1I1 1Y 2I0 2I1 2Y GND 1 2 3 4 5 6 7 8 001aad499 16 VCC 15 OE 14 4I0 13 4I1 12 4Y 11 3I0 10 3I1 9 3Y Fig 5. Pin configuration DIP16, SO16, SSOP16 and TSSOP16 5.2 Pin description Table 2. Symbol S 1I0 to 4I0 1I1 to 4I1 1Y to 4Y GND OE VCC Pin description Pin 1 2, 5, 11, 14 3, 6, 10, 13 4, 7, 9, 12 8 15 16 Description common data select input data input from source 0 data input from source 1 3-state multiplexer output ground (0 V) 3-state output enable input (active LOW) supply voltage 6. Functional description 6.1 Function table Table 3. Control OE H L L L L [1] Function table[1] Input S X H H L L nl0 X X X L H nl1 X L H X X Output nY Z L H L H H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 74HC_HCT257_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 13 January 2010 4 of 17 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK IOK IO ICC IGND Tstg Ptot Parameter supply voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation DIP16 package SO16 package SSOP16 package TSSOP16 package [1] [2] [3] For DIP16 packages: above 70 °C, Ptot derates linearly with 12 mW/K. For SO16 packages: above 70 °C, Ptot derates linearly with 8 mW/K. For SSOP16 and TSSOP16 packages: above 60 °C, Ptot derates linearly with 5.5 mW/K. [1] [2] [3] [3] Conditions VI < −0.5 V or VI > VCC + 0.5 V VO < −0.5 V or VO > VCC + 0.5 V VO = −0.5 V to VCC + 0.5 V Min −0.5 −65 - Max +7 ±20 ±20 ±35 +70 −70 +150 750 500 500 500 Unit V mA mA mA mA mA °C mW mW mW mW 8. Recommended operating conditions Table 5. Symbol Type 74HC257 VCC VI VO Δt/ΔV supply voltage input voltage output voltage input transition rise and fall rates VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V Tamb VCC VI VO Δt/ΔV Tamb ambient temperature supply voltage input voltage output voltage input transition rise and fall rates ambient temperature VCC = 4.5 V Type 74HCT257 4.5 0 0 −40 5.0 1.67 5.5 VCC VCC 139 +125 V V V ns °C 2.0 0 0 −40 5.0 1.67 6.0 VCC VCC 625 139 83 +125 V V V ns ns ns °C Recommended operating conditions Parameter Conditions Min Typ Max Unit 74HC_HCT257_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 13 January 2010 5 of 17 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min 74HC257 VIH HIGH-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 μA; VCC = 2.0 V IO = −20 μA; VCC = 4.5 V IO = −20 μA; VCC = 6.0 V IO = −6.0 mA; VCC = 4.5 V IO = −7.8 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 μA; VCC = 2.0 V IO = 20 μA; VCC = 4.5 V IO = 20 μA; VCC = 6.0 V IO = 6.0 mA; VCC = 4.5 V IO = 7.8 mA; VCC = 6.0 V II IOZ input leakage current VI = VCC or GND; VCC = 6.0 V OFF-state output current supply current input capacitance HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL; VCC = 4.5 V IO = −20 μA IO = −6 mA VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 μA IO = 6.0 mA II 74HC_HCT257_5 25 °C Typ 1.2 2.4 3.2 0.8 2.1 2.8 2.0 4.5 6.0 4.32 5.81 0 0 0 0.15 0.16 Max 0.5 1.35 1.8 0.1 0.1 0.1 0.26 0.26 ±0.1 ±0.5 −40 °C to +85 °C Min 1.5 3.15 4.2 1.9 4.4 5.9 3.84 5.34 Max 0.5 1.35 1.8 0.1 0.1 0.1 0.33 0.33 ±1.0 −40 °C to +125 °C Min 1.5 3.15 4.2 1.9 4.4 5.9 3.7 5.2 ±1.0 Max 0.5 1.8 0.1 0.1 0.1 0.4 0.4 Unit 1.5 3.15 4.2 1.9 4.4 5.9 3.98 5.48 - V V V V V V V V V V V V V V V 1.35 V ±1.0 μA VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V VI = VCC or GND; IO = 0 A; VCC = 6.0 V ±5.0 ±10.0 ±10.0 μA ICC Ci VIH VIL VOH 2.0 - 3.5 1.6 1.2 8.0 0.8 - 80 160 160 μA pF 74HCT257 2.0 0.8 2.0 0.8 V V 4.4 3.98 - 4.5 4.32 0 0.15 - 0.1 0.26 ±0.1 4.4 3.84 - 0.1 0.33 ±1.0 ±5.0 4.4 3.7 - 0.1 0.4 ±10 V V V μA 6 of 17 ±1.0 V input leakage current VI = VCC or GND; VCC = 5.5 V © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 13 January 2010 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min IOZ OFF-state output current VI = VIH or VIL; VCC = 5.5 V; VO = VCC or GND per input pin; other inputs at VCC or GND; IO = 0 A VI = VCC or GND; IO = 0 A; VCC = 5.5 V VI = VCC − 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A per input pin; nI0, nI1 inputs per input pin; OE input per input pin; S input CI input capacitance 40 135 70 3.5 144 486 252 180 608 315 196 662 343 μA μA μA pF 25 °C Typ Max ±0.5 −40 °C to +85 °C Min Max 80 −40 °C to +125 °C Min Max 160 μA Unit ICC ΔICC supply current additional supply current - - 8.0 μA 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); For test circuit see Figure 8. Symbol Parameter Conditions 25 °C Typ 74HC257 tpd propagation delay nl0 to nY or nl1 to nY; see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V S to nY; see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V ten enable time OE to nY; see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tdis disable time OE to nY; see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 74HC_HCT257_5 −40 °C to +85 °C Max −40 °C to Unit +125 °C Max Max [1] 36 13 11 10 47 17 14 14 [2] 110 22 19 150 30 26 150 30 26 150 30 26 140 28 24 190 38 33 190 38 33 190 38 33 165 33 28 225 45 38 225 45 38 225 45 38 ns ns ns ns ns ns ns ns ns ns ns ns ns ns 33 12 10 [3] 41 15 12 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 13 January 2010 7 of 17 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); For test circuit see Figure 8. Symbol Parameter Conditions 25 °C Typ tt transition time see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V CPD power dissipation capacitance propagation delay per multiplexer; VI = GND to VCC nl0 to nY or nl1 to nY; see Figure 6 VCC = 4.5 V VCC = 5.0 V; CL = 15 pF S to nY; see Figure 6 VCC = 4.5 V VCC = 5.0 V; CL = 15 pF ten tdis tt CPD enable time disable time transition time power dissipation capacitance tpd is the same as tPHL, tPLH. ten is the same as tPZH, tPZL. tdis is the same as tPHZ, tPLZ. tt is the same as tTHL, tTLH. CPD is used to determine the dynamic power dissipation (PD in μW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs. [5] [4] −40 °C to +85 °C Max 75 15 13 −40 °C to Unit +125 °C Max 90 18 15 ns ns ns pF Max 60 12 10 - 14 5 4 45 74HCT257 tpd [1] 16 13 20 17 [2] 30 35 30 30 12 - 38 44 38 38 15 45 ns ns 53 45 45 18 ns ns ns ns ns pF OE to nY; VCC = 4.5 V; see Figure 7 OE to nY; VCC = 4.5 V; see Figure 7 VCC = 4.5 V; see Figure 6 per multiplexer; VI = GND to VCC 15 16 5 45 [3] [4] [5] [1] [2] [3] [4] [5] 74HC_HCT257_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 13 January 2010 8 of 17 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state 11. Waveforms VI input S, nI0, nI1 GND t PHL VOH output nY VOL t THL VM VM 10 % t TLH 001aad477 VM VM t PLH 90 % Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Propagation delays input (S, nI0, nI1) to output (nY) and output (nY) transition times tr VI OE input GND VCC 10 % tPLZ output LOW-to-OFF OFF-to-LOW VOL tPHZ output HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled VOH 90 % 90 % VM tf tPZL VM 10 % tPZH VM outputs enabled 001aac479 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 7. Table 8. Type 74HC257 3-state output enable and disable times Measurement points Input VM 0.5VCC 1.3 V Output VM 0.5VCC 1.3 V 74HCT257 74HC_HCT257_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 13 January 2010 9 of 17 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state VI negative pulse 0V tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW VM VM VI positive pulse 0V VCC VCC G VI VO RL S1 DUT RT CL open 001aad983 Measurement points are given in Table 8 and test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistor. Fig 8. Table 9. Type 74HC257 Test circuit for switching times Test data Input VI VCC 3V tr, tf 6 ns 6 ns Load CL 50 pF 50 pF RL 1 kΩ 1 kΩ Switch position tPHL, tPLH open open tPZH, tPHZ GND GND tPZL, tPLZ VCC VCC 74HCT257 74HC_HCT257_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 13 January 2010 10 of 17 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state 12. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 D seating plane ME A2 A L A1 c Z e b1 b 16 9 b2 MH wM (e 1) pin 1 index E 1 8 0 5 scale 10 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.02 A2 max. 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 b2 1.25 0.85 0.049 0.033 c 0.36 0.23 0.014 0.009 D (1) 19.50 18.55 0.77 0.73 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.1 e1 7.62 0.3 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 0.76 0.03 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT38-4 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 95-01-14 03-02-13 Fig 9. Package outline SOT38-4 (DIP16) © NXP B.V. 2010. All rights reserved. 74HC_HCT257_5 Product data sheet Rev. 05 — 13 January 2010 11 of 17 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE vMA Z 16 9 Q A2 pin 1 index θ Lp 1 8 A1 (A 3) A L wM detail X e bp 0 2.5 scale 5 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3 θ o 0.010 0.057 0.069 0.004 0.049 0.019 0.0100 0.39 0.014 0.0075 0.38 0.244 0.041 0.228 0.028 0.004 0.012 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07 JEDEC MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 10. Package outline SOT109-1 (SO16) 74HC_HCT257_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 13 January 2010 12 of 17 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 D E A X c y HE vM A Z 16 9 Q A2 A1 pin 1 index θ Lp L 1 8 (A 3) A detail X wM e bp 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC MO-150 JEITA EUROPEAN PROJECTION A max. 2 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 6.4 6.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.00 0.55 θ 8 o 0 o ISSUE DATE 99-12-27 03-02-19 Fig 11. Package outline SOT338-1 (SSOP16) 74HC_HCT257_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 13 January 2010 13 of 17 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 D E A X c y HE vMA Z 16 9 Q A2 pin 1 index A1 θ Lp L (A 3) A 1 e bp 8 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.40 0.06 θ 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 Fig 12. Package outline SOT403-1 (TSSOP16) 74HC_HCT257_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 13 January 2010 14 of 17 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state 13. Revision history Table 10. Revision history Release date 20100113 Data sheet status Product data sheet Product data sheet Product data sheet Product specification Change notice Supersedes 74HC_HCT257_4 74HC_HCT257_3 74HC_HCT257_CNV_2 Document ID 74HC_HCT257_5 Modifications: 74HC_HCT257_4 74HC_HCT257_3 74HC_HCT257_CNV_2 • Table 7 “Dynamic characteristics”: changed 3OE to OE 20090608 20050920 19980930 74HC_HCT257_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 13 January 2010 15 of 17 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state 14. Legal information 14.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 14.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 14.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental 14.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 15. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74HC_HCT257_5 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 13 January 2010 16 of 17 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state 16. Contents 1 2 3 4 5 5.1 5.2 6 6.1 7 8 9 10 11 12 13 14 14.1 14.2 14.3 14.4 15 16 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information. . . . . . . . . . . . . . . . . . . . . 16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 13 January 2010 Document identifier: 74HC_HCT257_5