74HC257N,652

74HC257; 74HCT257 Quad 2-input multiplexer; 3-state Rev. 6 — 26 January 2015 Product data sheet 1. General description The 74HC257; 74HCT257 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC257 and 74HCT257 have four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (S). The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data inputs from source 1 (1I1 to 4I1) are selected when S is HIGH. Data appears at the outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs. The 74HC257 and 74HCT257 are the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The outputs are forced to a high-impedance OFF-state when OE is HIGH. The logic equations for the outputs are: 1Y = OE   1I1  S  1I0  S  2Y = OE   2I1  S  2I0  S  3Y = OE   3I1  S  3I0  S  4Y = OE   4I1  S  4I0  S  Except for their non-inverting (true) outputs the 74HC257; 74HCT257 are identical to the 74HC258. 2. Features and benefits     Non-inverting data path 3-state outputs interface directly with system bus Complies with JEDEC standard no. 7A ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V  Multiple package options  Specified from 40 C to +85 C and from 40 C to +125 C 74HC257; 74HCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 3. Ordering information Table 1. Ordering information Type number 74HC257N Package Temperature range Name Description Version 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74HCT257N 74HC257D 74HCT257D 74HC257DB 74HCT257DB 74HC257PW 74HCT257PW 4. Functional diagram     ,  ,  ,  ,  ,  ,  ,  ,  2( 6  < <   * (1  Logic symbol 74HC_HCT257 Product data sheet       <     <     PJD Fig 1. 08; DDG Fig 2. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 2 of 18 74HC257; 74HCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state   , ,  6  2( Fig 3.   , ,   , ,   , , 6(/(&725 67$7(08/7,3/(;(52873876 < < < <     PJU Functional diagram , < , , < , , < , , < , 2( 6 Fig 4. DDG Logic diagram 74HC_HCT257 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 3 of 18 74HC257; 74HCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 5. Pinning information 5.1 Pinning +& +&7 6   9&& ,   2( ,   , <   , ,   < ,   , <   , *1'   < DDG Fig 5. Pin configuration DIP16, SO16, SSOP16 and TSSOP16 5.2 Pin description Table 2. Pin description Symbol Pin Description S 1 common data select input 1I0 to 4I0 2, 5, 11, 14 data input from source 0 1I1 to 4I1 3, 6, 10, 13 data input from source 1 1Y to 4Y 4, 7, 9, 12 3-state multiplexer output GND 8 ground (0 V) OE 15 3-state output enable input (active LOW) VCC 16 supply voltage 6. Functional description 6.1 Function table Table 3. Function table[1] Control Input Output OE S nl0 nl1 nY H X X X Z L H X L L L H X H H L L L X L L L H X H [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 74HC_HCT257 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 4 of 18 74HC257; 74HCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input clamping current IOK Conditions Min Max Unit 0.5 +7 V VI < 0.5 V or VI > VCC + 0.5 V - 20 mA output clamping current VO < 0.5 V or VO > VCC + 0.5 V - 20 mA VO = 0.5 V to VCC + 0.5 V IO output current - 35 mA ICC supply current - +70 mA IGND ground current - 70 mA Tstg storage temperature 65 +150 C Ptot total power dissipation DIP16 package [1] - 750 mW SO16 package [2] - 500 mW SSOP16 package [3] - 500 mW TSSOP16 package [3] - 500 mW [1] For DIP16 packages: above 70 C, Ptot derates linearly with 12 mW/K. [2] For SO16 packages: above 70 C, Ptot derates linearly with 8 mW/K. [3] For SSOP16 and TSSOP16 packages: above 60 C, Ptot derates linearly with 5.5 mW/K. 8. Recommended operating conditions Table 5. Symbol Recommended operating conditions Parameter Conditions Min Typ Max Unit 74HC257 VCC supply voltage 2.0 5.0 6.0 V VI input voltage 0 - VCC V VO output voltage t/V input transition rise and fall rates 0 - VCC V VCC = 2.0 V - - 625 ns VCC = 4.5 V - 1.67 139 ns VCC = 6.0 V - - 83 ns ambient temperature 40 - +125 C VCC supply voltage 4.5 5.0 5.5 V VI input voltage 0 - VCC V 0 - VCC V - 1.67 139 ns 40 - +125 C Tamb 74HCT257 VO output voltage t/V input transition rise and fall rates Tamb ambient temperature 74HC_HCT257 Product data sheet VCC = 4.5 V All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 5 of 18 74HC257; 74HCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 6.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 7.8 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V 1.0 74HC257 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 - 1.0 IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - 0.5 - 5.0 10.0 10.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 - Ci input capacitance - 3.5 - 80 160 1.0 A 160 A pF 74HCT257 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V IO = 6 mA 3.98 4.32 - 3.84 - 3.7 - V - 0.1 - 0.1 VOL II LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A - 0 0.1 - 0.33 - 0.4 IO = 6.0 mA - 0.15 0.26 - 1.0 - 1.0 V - - 0.1 - 5.0 - 10 input leakage current VI = VCC or GND; VCC = 5.5 V 74HC_HCT257 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 V A © NXP Semiconductors N.V. 2015. All rights reserved. 6 of 18 74HC257; 74HCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Min Typ Max Min Max Min Max - 80 - 160 Unit IOZ OFF-state output current VI = VIH or VIL; VCC = 5.5 V; VO = VCC or GND per input pin; other inputs at VCC or GND; IO = 0 A - - 0.5 ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 8.0 ICC additional supply current VI = VCC  2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A per input pin; nI0, nI1 inputs - 40 144 - 180 - 196 A per input pin; OE input - 135 486 - 608 - 662 A per input pin; S input - 70 252 - 315 - 343 A - 3.5 - CI input capacitance A A pF 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); For test circuit see Figure 8. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to Unit +125 C Typ Max Max Max VCC = 2.0 V 36 110 140 165 ns VCC = 4.5 V 13 22 28 33 ns VCC = 5.0 V; CL = 15 pF 11 - - - ns VCC = 6.0 V 10 19 24 28 ns 74HC257 tpd propagation delay nl0 to nY or nl1 to nY; see Figure 6 [1] S to nY; see Figure 6 VCC = 2.0 V 47 150 190 225 ns VCC = 4.5 V 17 30 38 45 ns VCC = 5.0 V; CL = 15 pF 14 - - - ns 14 26 33 38 ns VCC = 2.0 V 33 150 190 225 ns VCC = 4.5 V 12 30 38 45 ns 10 26 33 38 ns VCC = 2.0 V 41 150 190 225 ns VCC = 4.5 V 15 30 38 45 ns VCC = 6.0 V 12 26 33 38 ns VCC = 6.0 V ten enable time OE to nY; see Figure 7 [2] VCC = 6.0 V tdis disable time 74HC_HCT257 Product data sheet OE to nY; see Figure 7 [3] All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 7 of 18 74HC257; 74HCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); For test circuit see Figure 8. Symbol Parameter tt transition time 25 C Conditions power dissipation capacitance 40 C to Unit +125 C Typ Max Max Max VCC = 2.0 V 14 60 75 90 ns VCC = 4.5 V 5 12 15 18 ns 4 10 13 15 ns 45 - VCC = 4.5 V 16 30 38 VCC = 5.0 V; CL = 15 pF 13 - - VCC = 4.5 V 20 35 44 VCC = 5.0 V; CL = 15 pF 17 - 15 30 38 45 ns [4] see Figure 6 VCC = 6.0 V CPD 40 C to +85 C per multiplexer; VI = GND to VCC [5] nl0 to nY or nl1 to nY; see Figure 6 [1] pF 74HCT257 propagation delay tpd 45 ns ns S to nY; see Figure 6 53 ns ns ten enable time OE to nY; VCC = 4.5 V; see Figure 7 [2] tdis disable time OE to nY; VCC = 4.5 V; see Figure 7 [3] 16 30 38 45 ns tt transition time VCC = 4.5 V; see Figure 6 [4] 5 12 15 18 ns per multiplexer; VI = GND to VCC  1.5 V [5] 45 - power dissipation capacitance CPD [1] tpd is the same as tPHL, tPLH. [2] ten is the same as tPZH, tPZL. [3] tdis is the same as tPHZ, tPLZ. [4] tt is the same as tTHL, tTLH. [5] pF CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of outputs. 74HC_HCT257 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 8 of 18 74HC257; 74HCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 11. Waveforms 9, LQSXW 6Q,Q, 90 90 *1' W 3+/ W 3/+ 92+  RXWSXW Q< 90 90  92/ W 7+/ W 7/+ DDG Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Propagation delays input (S, nI0, nI1) to output (nY) and output (nY) transition times WU 9, WI  2(LQSXW 90 *1'  W3/= RXWSXW W3=/ 9&& /2:WR2)) 2))WR/2: 90  92/ W3+= RXWSXW 92+ W3=+  +,*+WR2)) 2))WR+,*+ *1' 90 RXWSXWV HQDEOHG RXWSXWV HQDEOHG RXWSXWV GLVDEOHG DDF Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 7. 3-state output enable and disable times Table 8. Measurement points Type Input Output VM VM 74HC257 0.5VCC 0.5VCC 74HCT257 1.3 V 1.3 V 74HC_HCT257 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 9 of 18 74HC257; 74HCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 9, W:  QHJDWLYH SXOVH 90 9 WI WU WU WI 9,  SRVLWLYH SXOVH 9 90  90 90  W: 9&& 9&& * 9, 92 5/ 6 RSHQ '87 &/ 57 DDG Measurement points are given in Table 8 and test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistor. Fig 8. Test circuit for measuring switching times Table 9. Type Test data Input Load Switch position VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 74HC257 VCC 6 ns 50 pF 1 k open GND VCC 74HCT257 3V 6 ns 50 pF 1 k open GND VCC 74HC_HCT257 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 10 of 18 74HC257; 74HCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 12. Package outline ',3SODVWLFGXDOLQOLQHSDFNDJHOHDGVPLO 627 0( VHDWLQJSODQH ' $ $ $ / F H = Z 0 E E  H  E  0+ SLQLQGH[ (     PP VFDOH ',0(16,216LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV 81,7 $ PD[ $  PLQ $  PD[ E E E F ' ( H H / 0( 0+ Z = PD[ PP                          LQFKHV                          1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPLQFKPD[LPXPSHUVLGHDUHQRWLQFOXGHG Fig 9. 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& 627   -(,7$ (8523($1 352-(&7,21 ,668('$7(   Package outline SOT38-4 (DIP16) 74HC_HCT257 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 11 of 18 74HC257; 74HCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627 ' ( $ ; F \ +( Y 0 $ =   4 $ $ $  $ SLQLQGH[ ș /S  /  H Z 0 ES   GHWDLO; PP VFDOH ',0(16,216LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP                                                 LQFKHV         ș R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPLQFKPD[LPXPSHUVLGHDUHQRWLQFOXGHG 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& 627 ( 06 -(,7$ (8523($1 352-(&7,21 ,668('$7(   Fig 10. Package outline SOT109-1 (SO16) 74HC_HCT257 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 12 of 18 74HC257; 74HCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 6623SODVWLFVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ =   4 $ $ $  $ SLQLQGH[ ș /S /   GHWDLO; Z 0 ES H   PP VFDOH ',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = ș PP                            R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7(   02 Fig 11. Package outline SOT338-1 (SSOP16) 74HC_HCT257 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 13 of 18 74HC257; 74HCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ =   4 $ SLQLQGH[ $  $ $ ș /S /   H GHWDLO; Z 0 ES   PP VFDOH ',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = ș PP                            R R 1RWHV 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 3ODVWLFLQWHUOHDGSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7(   02 Fig 12. Package outline SOT403-1 (TSSOP16) 74HC_HCT257 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 14 of 18 74HC257; 74HCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state 13. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT257 v.6 20150126 Product data sheet - Modifications: 74HC_HCT257 v.5 Modifications: • 20100113 • 74HC_HCT257 v.5 Table 7: Power dissipation capacitance condition for 74HCT257 is corrected. Product data sheet - 74HC_HCT257 v.4 Table 7: changed 3OE to OE 74HC_HCT257 v.4 20090608 Product data sheet - 74HC_HCT257 v.3 74HC_HCT257 v.3 20050920 Product data sheet - 74HC_HCT257_CNV v.2 74HC_HCT257_CNV v.2 19980930 Product specification - - 74HC_HCT257 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 © NXP Semiconductors N.V. 2015. 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Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 16 of 18 74HC257; 74HCT257 NXP Semiconductors Quad 2-input multiplexer; 3-state Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74HC_HCT257 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 26 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 17 of 18 NXP Semiconductors 74HC257; 74HCT257 Quad 2-input multiplexer; 3-state 17. Contents 1 2 3 4 5 5.1 5.2 6 6.1 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Contact information. . . . . . . . . . . . . . . . . . . . . 17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP Semiconductors N.V. 2015. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 26 January 2015 Document identifier: 74HC_HCT257