74HC365N,652

74HC365; 74HCT365 Hex buffer/line driver; 3-state Rev. 3 — 5 September 2012 Product data sheet 1. General description The 74HC365; 74HC365 is a hex buffer/line driver with 3-state outputs controlled by the output enable inputs (OEn). A HIGH on OEn causes the outputs to assume a high impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. The 74HC365; 74HCT365 is functionally identical to: • 74HC366; 74HCT366, but has non-inverting outputs 2. Features and benefits  Inverting outputs  Input levels:  For 74HC365: CMOS level  For 74HC365: TTL level  Complies with JEDEC standard no. 7A  ESD protection:  HBM EIA/JESD22-A114-F exceeds 2000 V  MM EIA/JESD22-A115-A exceeds 200 V  Specified from 40 C to +85 C and from 40 C to +125 C  Multiple package options 74HC365; 74HCT365 NXP Semiconductors Hex buffer/line driver; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC365 74HC365D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HCT365DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 74HC365N 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 74HC365PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74HCT365D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HCT365DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 74HCT365N 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74HCT365 74HCT365PW 40 C to +125 C 4. Functional diagram         $ < $ < $ < $ < $ < $ <       < $ < $ < $ < $ < $   < 2( 2( 2( 2( DDD Fig 1. $ Functional diagram 74HC_HCT365 Product data sheet Fig 2. (1            DDD Logic symbol All information provided in this document is subject to legal disclaimers. Rev. 3 — 5 September 2012  DDD Fig 3. IEC logic symbol © NXP B.V. 2012. All rights reserved. 2 of 21 74HC365; 74HCT365 NXP Semiconductors Hex buffer/line driver; 3-state EXIIHUOLQHGULYHU 9&& $ < 2( 2( *1' $ $ $ $ $ EXIIHUOLQHGULYHU < EXIIHUOLQHGULYHU < EXIIHUOLQHGULYHU < EXIIHUOLQHGULYHU < EXIIHUOLQHGULYHU < DDD Fig 4. Logic diagram 5. Pinning information 5.1 Pinning +& +&7 2(   9&& $   2( <   $ $   < <   $ $   < <   $ *1'   < DDD Fig 5. Pin configuration 74HC_HCT365 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 5 September 2012 © NXP B.V. 2012. All rights reserved. 3 of 21 74HC365; 74HCT365 NXP Semiconductors Hex buffer/line driver; 3-state 5.2 Pin description Table 2. Pin description Symbol Pin Description OE1 1 output enable input 1 (active LOW) 1A 2 data input 1 1Y 3 data output 1 2A 4 data input 2 2Y 5 data output 2 3A 6 data input 3 3Y 7 data output 3 GND 8 ground (0 V) 4Y 9 data output 4 4A 10 data input 4 5Y 11 data output 5 5A 12 data input 5 6Y 13 data output 6 6A 14 data input 6 OE2 15 output enable input 2 (active LOW) VCC 16 supply voltage 6. Functional description Table 3. Function table[1] Control Input Output OE1 OE2 nA nY L L L L L L H H X H X Z H X X Z [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 74HC_HCT365 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 5 September 2012 © NXP B.V. 2012. All rights reserved. 4 of 21 74HC365; 74HCT365 NXP Semiconductors Hex buffer/line driver; 3-state 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7 V IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V - 20 mA IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V - 20 mA IO output current VO = 0.5 V to (VCC + 0.5 V) - 35 mA ICC supply current - 70 mA IGND ground current - 70 mA Tstg storage temperature 65 +150 C Ptot total power dissipation DIP16 package [1] - 750 mW SO16 package [2] - 500 mW SSOP16 package [3] - 500 mW TSSOP16 package [3] - 500 mW [1] For DIP16 packages: Ptot derates linearly with 12 mW/K above 70 C. [2] For SO16 packages: Ptot derates linearly with 8 mW/K above 70 C. [3] For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C. 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC365 Min Typ 74HCT365 Max Min Typ Unit Max VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C t/V input transition rise and fall rate 74HC_HCT365 Product data sheet VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V All information provided in this document is subject to legal disclaimers. Rev. 3 — 5 September 2012 © NXP B.V. 2012. All rights reserved. 5 of 21 74HC365; 74HCT365 NXP Semiconductors Hex buffer/line driver; 3-state 9. Static characteristics Table 6. Static characteristics 74HC365 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit Tamb = 25 C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage VCC = 2.0 V 1.5 1.2 - V VCC = 4.5 V 3.15 2.4 - V VCC = 6.0 V 4.2 3.2 - V VCC = 2.0 V - 0.8 0.5 V VCC = 4.5 V - 2.1 1.35 V VCC = 6.0 V - 2.8 1.8 V - - - IO = 20 A; VCC = 2.0 V 1.9 2.0 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - V IO = 6.0 mA; VCC = 4.5 V 3.98 4.32 - V IO = 7.8 mA; VCC = 6.0 V 5.48 5.81 - V IO = 20 A; VCC = 2.0 V - 0 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 V IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 V IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 V HIGH-level output voltage VI = VIH or VIL LOW-level output voltage VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 A IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - 0.5 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V CI input capacitance - - 8.0 A - 3.5 - pF VCC = 2.0 V 1.5 - - V Tamb = 40 C to +85 C VIH VIL VOH HIGH-level input voltage LOW-level input voltage VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V IO = 20 A; VCC = 2.0 V 1.9 - - V IO = 20 A; VCC = 4.5 V 4.4 - - V HIGH-level output voltage VI = VIH or VIL 74HC_HCT365 Product data sheet IO = 20 A; VCC = 6.0 V 5.9 - - V IO = 6.0 mA; VCC = 4.5 V 3.84 - - V IO = 7.8 mA; VCC = 6.0 V 5.34 - - V All information provided in this document is subject to legal disclaimers. Rev. 3 — 5 September 2012 © NXP B.V. 2012. All rights reserved. 6 of 21 74HC365; 74HCT365 NXP Semiconductors Hex buffer/line driver; 3-state Table 6. Static characteristics 74HC365 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOL Conditions Min Typ Max Unit IO = 20 A; VCC = 2.0 V - - 0.1 V IO = 20 A; VCC = 4.5 V - - 0.1 V IO = 20 A; VCC = 6.0 V - - 0.1 V IO = 6.0 mA; VCC = 4.5 V - - 0.33 V IO = 7.8 mA; VCC = 6.0 V - - 0.33 V LOW-level output voltage VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 6.0 V; - - 1.0 A IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - 5.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 80 A Tamb = 40 C to +125 C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V IO = 20 A; VCC = 2.0 V 1.9 - - V IO = 20 A; VCC = 4.5 V 4.4 - - V IO = 20 A; VCC = 6.0 V 5.9 - - V IO = 6.0 mA; VCC = 4.5 V 3.7 - - V IO = 7.8 mA; VCC = 6.0 V 5.2 - - V IO = 20 A; VCC = 2.0 V - - 0.1 V IO = 20 A; VCC = 4.5 V - - 0.1 V IO = 20 A; VCC = 6.0 V - - 0.1 V IO = 6.0 mA; VCC = 4.5 V - - 0.4 V IO = 7.8 mA; VCC = 6.0 V - - 0.4 V A HIGH-level output voltage VI = VIH or VIL LOW-level output voltage VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 6.0 V - - 1.0 IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - 10.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 160 Min Typ Max Unit A Table 7. Static characteristics 74HCT365 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Tamb = 25 C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V 74HC_HCT365 Product data sheet IO = 20 A 4.4 4.5 - V IO = 6.0 mA 3.98 4.32 - V All information provided in this document is subject to legal disclaimers. Rev. 3 — 5 September 2012 © NXP B.V. 2012. All rights reserved. 7 of 21 74HC365; 74HCT365 NXP Semiconductors Hex buffer/line driver; 3-state Table 7. Static characteristics 74HCT365 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A - 0 0.1 V II input leakage current VI = VCC or GND; VCC = 5.5 V IO = 6.0 mA - 0.16 0.26 V - - 0.1 A IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other inputs at GND or VCC; IO = 0 A; VCC = 5.5 V - - 0.5 A ICC supply current - - 8.0 A ICC additional supply current VI = VCC  2.1 V; other inputs at VCC or GND; IO = 0 A pins nA - 100 360 A pin OE1 - 100 360 A VI = VCC or GND; IO = 0 A; VCC = 5.5 V pin OE2 CI input capacitance - 90 324 A - 3.5 - pF Tamb = 40 C to +85 C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A 4.4 - - V IO = 6.0 mA 3.84 - - V IO = 20 A - - 0.1 V IO = 6.0 mA - - 0.33 V - - 1.0 A 5.0 A VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V II input leakage current VI = VCC or GND; VCC = 5.5 V IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other inputs at GND or VCC; IO = 0 A; VCC = 5.5 V ICC supply current ICC additional supply current VI = VCC  2.1 V; other inputs at VCC or GND; IO = 0 A VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 80 A pins nA - - 450 A pin OE1 - - 450 A pin OE2 - - 405 A Tamb = 40 C to +125 C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A 4.4 - - V IO = 6.0 mA 3.7 - - V LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A - - 0.1 V IO = 6.0 mA - - 0.4 V VOL II input leakage current IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other inputs at GND or VCC; IO = 0 A; VCC = 5.5 V 74HC_HCT365 Product data sheet VI = VCC or GND; VCC = 5.5 V All information provided in this document is subject to legal disclaimers. Rev. 3 — 5 September 2012 - - 1.0 A - - 10.0 A © NXP B.V. 2012. All rights reserved. 8 of 21 74HC365; 74HCT365 NXP Semiconductors Hex buffer/line driver; 3-state Table 7. Static characteristics 74HCT365 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 160 A ICC additional supply current VI = VCC  2.1 V; other inputs at VCC or GND; IO = 0 A pins nA - - 490 A pin OE1 - - 490 A pin OE2 - - 441 A 10. Dynamic characteristics Table 8. Dynamic characteristics 74HC365 Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter Conditions Min Typ Max Unit VCC = 2.0 V - 30 95 ns VCC = 4.5 V - 11 19 ns VCC = 5 V; CL = 15 pF - 9 - ns VCC = 6.0 V - 9 16 ns VCC = 2.0 V - 47 150 ns VCC = 4.5 V - 17 30 ns VCC = 6.0 V - 14 26 ns VCC = 2.0 V - 61 150 ns VCC = 4.5 V - 22 30 ns VCC = 6.0 V - 18 26 ns VCC = 2.0 V - 14 60 ns VCC = 4.5 V - 5 12 ns VCC = 6.0 V - 4 10 ns - 40 - pF VCC = 2.0 V - - 120 ns VCC = 4.5 V - - 24 ns - - 20 ns VCC = 2.0 V - - 190 ns VCC = 4.5 V - - 38 ns VCC = 6.0 V - - 33 ns Tamb = 25 C tpd ten tdis tt CPD propagation delay enable time disable time transition time power dissipation capacitance nA to nY; see Figure 6 OEn to nY; see Figure 7 OEn to nY; see Figure 7 see Figure 6 [1] [2] [3] [4] per buffer; VI = GND to VCC [5] nA to nY; see Figure 6 [1] Tamb = 40 C to +85 C tpd propagation delay VCC = 6.0 V ten enable time 74HC_HCT365 Product data sheet OEn to nY; see Figure 7 All information provided in this document is subject to legal disclaimers. Rev. 3 — 5 September 2012 [2] © NXP B.V. 2012. All rights reserved. 9 of 21 74HC365; 74HCT365 NXP Semiconductors Hex buffer/line driver; 3-state Table 8. Dynamic characteristics 74HC365 …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter tdis disable time transition time tt Conditions Min Typ Max Unit VCC = 2.0 V - - 190 ns VCC = 4.5 V - - 38 ns VCC = 6.0 V - - 33 ns VCC = 2.0 V - - 75 ns VCC = 4.5 V - - 15 ns VCC = 6.0 V - - 13 ns OEn to nY; see Figure 7 see Figure 6 [3] [4] Tamb = 40 C to +125 C propagation delay tpd nA to nY; see Figure 6 [1] VCC = 2.0 V - - 145 ns VCC = 4.5 V - - 29 ns - - 25 ns VCC = 6.0 V enable time ten OEn to nY; see Figure 7 [2] VCC = 2.0 V - - 225 ns VCC = 4.5 V - - 45 ns - - 38 ns VCC = 6.0 V disable time tdis OEn to nY; see Figure 7 [3] VCC = 2.0 V - - 225 ns VCC = 4.5 V - - 45 ns - - 38 ns VCC = 2.0 V - - 90 ns VCC = 4.5 V - - 18 ns VCC = 6.0 V - - 15 ns VCC = 6.0 V transition time tt [1] see Figure 6 [4] tpd is the same as tPHL and tPLH. [2] ten is the same as tPZH and tPZL. [3] tdis is the same as tPHZ and tPLZ. [4] tt is the same as tTHL and tTLH. [5] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of outputs. 74HC_HCT365 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 5 September 2012 © NXP B.V. 2012. All rights reserved. 10 of 21 74HC365; 74HCT365 NXP Semiconductors Hex buffer/line driver; 3-state Table 9. Dynamic characteristics 74HCT365 Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter Conditions Min Typ Max Unit - 14 25 ns Tamb = 25 C propagation delay tpd nA to nY; see Figure 6 [1] VCC = 4.5 V VCC = 5 V; CL = 15 pF - 11 - ns ten enable time OEn to nY; VCC = 4.5 V; see Figure 7 [2] - 18 35 ns tdis disable time OEn to nY; VCC = 4.5 V; see Figure 7 [3] - 23 35 ns transition time VCC = 4.5 V; see Figure 6 [4] - 5 12 ns power dissipation capacitance per buffer; VI = GND to (VCC  1.5 V) [5] - 40 - pF nA to nY; VCC = 4.5 V; see Figure 6 [1] - - 31 ns OEn to nY; VCC = 4.5 V; see Figure 7 [2] - - 44 ns tt CPD Tamb = 40 C to +85 C propagation delay tpd enable time ten tdis disable time OEn to nY; VCC = 4.5 V; see Figure 7 [3] - - 44 ns tt transition time VCC = 4.5 V; see Figure 6 [4] - - 15 ns nA to nY; VCC = 4.5 V; see Figure 6 [1] - - 38 ns Tamb = 40 C to +125 C propagation delay tpd ten enable time OEn to nY; VCC = 4.5 V; see Figure 7 [2] - - 53 ns tdis disable time OEn to nY; VCC = 4.5 V; see Figure 7 [3] - - 53 ns VCC = 4.5 V; see Figure 6 [4] - - 18 ns tt [1] transition time tpd is the same as tPHL and tPLH. [2] ten is the same as tPZH and tPZL. [3] tdis is the same as tPHZ and tPLZ. [4] tt is the same as tTHL and tTLH. [5] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of outputs. 74HC_HCT365 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 5 September 2012 © NXP B.V. 2012. All rights reserved. 11 of 21 74HC365; 74HCT365 NXP Semiconductors Hex buffer/line driver; 3-state 11. Waveforms 9, Q$LQSXW 90 90 *1' W3+/ W3+/ 92+ Q