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74HC4351N,652

74HC4351N,652

  • 厂商:

    NXP(恩智浦)

  • 封装:

    DIP20

  • 描述:

    NOW NEXPERIA 74HC4351N - SINGLE-

  • 数据手册
  • 价格&库存
74HC4351N,652 数据手册
Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use http://www.nexperia.com Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: - © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT4351 8-channel analog multiplexer/demultiplexer with latch Product specification File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch 74HC/HCT4351 The 74HC/HCT4351 are 8-channel analog multiplexers/demultiplexers with three select inputs (S0 to S2), two enable inputs (E1 and E2), a latch enable input (LE), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). FEATURES • Wide analog input voltage range: ±5V • Low “ON” resistance: 80 Ω (typ.) at VCC − VEE = 4.5 V 70 Ω (typ.) at VCC − VEE = 6.0 V 60 Ω (typ.) at VCC − VEE = 9.0 V With E1 LOW and E2 is HIGH, one of the eight switches is selected (low impedance ON-state) by S0 to S2. The data at the select inputs may be latched by using the active LOW latch enable input (LE). When LE is HIGH the latch is transparent. When either of the two enable inputs, E1 (active LOW) and E2 (active HIGH), is inactive, all 8 analog switches are turned off. • Logic level translation: to enable 5 V logic to communicate with ± 5 V analog signals • Typical “break before make” built in • Address latches provided VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, LE, E1 and E2). The VCC to GND ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The analog inputs/outputs (Y0 to Y7, and Z) can swing between VCC as a positive limit and VEE as a negative limit. • Output capability: non-standard • ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT4351 are high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no. 7A. VCC − VEE may not exceed 10.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground). QUICK REFERENCE DATA VEE = GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL PARAMETER tPZH / tPZL turn “ON” time E1, E2 or Sn to Vos CONDITIONS CL = 15 pF; RL = 1 kΩ; VCC = 5 V UNIT HC HCT 27 35 ns tPHZ / tPLZ turn “OFF” time E1, E2 or Sn to Vos 21 23 ns CI input capacitance 3.5 3.5 pF CPD power dissipation capacitance per switch 25 25 pF CS max. switch capacitance independent (Y) 5 5 pF common (Z) 25 25 pF notes 1 and 2 Notes 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi +∑ {(CL+ CS) × VCC2 × fo} where: ORDERING INFORMATION fi = input frequency in MHz See “74HC/HCT/HCU/HCMOS Logic Package Information”. fo = output frequency in MHz CL = output load capacitance in pF CS = max. switch capacitance in pF ∑ {(CL+ CS) × VCC2 × fo} = sum of outputs VCC = supply voltage in V December 1990 2 Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch 74HC/HCT4351 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 4 Z common 3, 14 n.c. not connected 7 E1 enable input (active LOW) 8 E2 enable input (active HIGH) 9 VEE negative supply voltage 10 GND ground (0 V) 11 LE latch enable input (active LOW) 15, 13, 12 S0 to S2 select inputs 17, 18, 19, 16, 1, 6, 2, 5 Y0 to Y7 independent inputs/outputs 20 VCC positive supply voltage Fig.1 Pin configuration. December 1990 Fig.2 3 Fig.3 IEC logic symbol. Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch 74HC/HCT4351 FUNCTION TABLE INPUTS E1 E2 LE S2 S1 S0 CHANNEL ON H X X L X X X X X X X X none none L L L L H H H H H H H H L L L L L L H H L H L H Y0 Y1 Y2 Y3 L L L L H H H H H H H H H H H H L L H H L H L H Y4 Y5 Y6 Y7 L X H X L ↓ X X X X X X (1) (2) Notes 1. Last selected channel “ON”. 2. Selected channels latched. 3. H = HIGH voltage level L = LOW voltage level X = don’t care ↓ = HIGH-to-LOW LE transition APPLICATIONS • Analog multiplexing and demultiplexing • Digital multiplexing and demultiplexing • Signal gating Fig.4 Functional diagram. Fig.5 Schematic diagram (one switch). December 1990 4 Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch 74HC/HCT4351 RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Voltages are referenced to VEE = GND (ground = 0 V) SYMBOL PARAMETER MIN. MAX. UNIT VCC DC supply voltage −0.5 +11.0 V ±IIK DC digital input diode current 20 mA for VI < −0.5 V or VI > VCC + 0.5 V ±ISK DC switch diode current 20 mA for VS < −0.5 V or VS > VCC + 0.5 V ±IS DC switch current 25 mA for −0.5 V < VS < VCC + 0.5 V ±IEE DC VEE current 20 mA ±ICC; ±IGND DC VCC or GND current 50 mA Tstg storage temperature range +150 °C Ptot power dissipation per package PS −65 CONDITIONS for temperature range: −40 to +125 °C 74HC/HCT plastic DIL 750 mW above +70 °C: derate linearly with 12 mW/K plastic mini-pack (SO) 500 mW above +70 °C: derate linearly with 8 mW/K power dissipation per switch 100 mW Note to ratings 1. To avoid drawing VCC current out of terminal Z, when switch current flows in terminals Yn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminals Yn. In this case there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or VEE. RECOMMENDED OPERATING CONDITIONS 74HC 74HCT SYMBOL PARAMETER UNIT CONDITIONS min. typ. max. min. typ. max. VCC DC supply voltage VCC−GND 2.0 5.0 10.0 4.5 5.0 5.5 V see Figs 6 and 7 VCC DC supply voltage VCC−VEE 2.0 5.0 10.0 2.0 5.0 10.0 V see Figs 6 and 7 VI DC input voltage range GND VCC GND VCC V VS DC switch voltage range VEE VCC VEE VCC V Tamb operating ambient temperature range −40 +85 −40 +85 °C Tamb operating ambient temperature range −40 +125 −40 tr, tf input rise and fall times 1000 500 400 250 6.0 December 1990 5 +125 °C 6.0 500 ns see DC and AC CHARACTERISTICS VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VCC = 10.0 V Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch 74HC/HCT4351 MBA334 10 handbook, halfpage VCC - GND (V) 8 operating area 6 4 2 0 Fig.6 0 2 4 6 8 10 VCC - V EE (V) Guaranteed operating area as a function of the supply voltages for 74HC4351. Fig.7 Guaranteed operating area as a function of the supply voltages for 74HCT4351. DC CHARACTERISTICS FOR 74HC/HCT For 74HC: VCC − GND or VCC − VEE = 2.0, 4.5, 6.0 and 9.0 V For 74HCT: VCC − GND = 4.5 and 5.5 V; VCC − VEE = 2.0, 4.5, 6.0 and 9.0 V Tamb (°C) TEST CONDITIONS 74HC/HCT SYMBOL PARAMETER −40 to +85 +25 −40 to +125 UNIT VCC (V) VEE (V) IS (µA) Vis VI min. typ. max. min. max. min. max. RON ON resistance (rail) − 100 90 70 − 180 160 130 − 225 200 165 − 270 240 195 Ω Ω Ω Ω 2.0 4.5 6.0 4.5 0 0 0 −4.5 100 1000 1000 1000 VCC to VEE VIN or VIL RON ON resistance (rail) 150 80 70 60 − 140 120 105 − 175 150 130 − 210 180 160 Ω Ω Ω Ω 2.0 4.5 6.0 4.5 0 0 0 −4.5 100 1000 1000 1000 VEE VIH or VIL RON ON resistance (rail) 150 90 80 65 − 160 140 120 − 200 175 150 − 240 210 180 Ω Ω Ω Ω 2.0 4.5 6.0 4.5 0 0 0 −4.5 100 1000 1000 1000 VCC VIH or VIL ∆RON maximum ∆ ON resistance between any two channels − 9 8 6 Ω Ω Ω Ω 2.0 4.5 6.0 4.5 0 0 0 −4.5 VCC to VEE VIH or VIL Notes to DC characteristics 1. At supply voltages (VCC − VEE) approaching 2.0 V, the analog switch ON-resistance becomes extremely non-linear. There it is recommended that these devices be used to transmit digital signals only, when using these supply voltages. 2. For test circuit measuring RON see Fig.8. December 1990 6 Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch 74HC/HCT4351 DC CHARACTERISTICS FOR 74HC Voltages are referenced to GND (ground = 0 V) Tamb (°C) TEST CONDITIONS 74HC SYMBOL PARAMETER −40 to +85 +25 −40 to +125 UNIT V CC (V) VEE (V) VI OTHER min. typ. max. min. max. min. max. VIH HIGH level input voltage VIL LOW level input voltage ±II 1.5 3.15 4.2 6.3 1.2 2.4 3.2 4.7 1.5 3.15 4.2 6.3 V 2.0 4.5 6.0 9.0 0.5 1.35 1.8 2.7 0.5 1.35 1.8 2.7 0.5 1.35 1.8 2.7 V 2.0 4.5 6.0 9.0 input leakage current 0.1 0.2 1.0 2.0 1.0 2.0 µA 6.0 0 10.0 0 VCC or GND ±IS analog switch OFF-state current per channel 0.1 1.0 1.0 µA 10.0 0 VIH or VIL VS = VCC − VEE (see Fig.10) ±IS analog switch OFF-state current all channels 0.4 4.0 4.0 µA 10.0 0 VIH or VIL VS = VCC − VEE (see Fig.10) ±IS analog switch ON-state current 0.4 4.0 4.0 µA 10.0 0 VIH or VIL VS = VCC − VEE (see Fig.11) ICC quiescent supply current 8.0 16.0 80.0 160.0 160.0 µA 320.0 6.0 0 10.0 0 VCC Vis = VEE or or VCC; GND Vos = VCC or VEE December 1990 0.8 2.1 2.8 4.3 1.5 3.15 4.2 6.3 7 Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch 74HC/HCT4351 AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) TEST CONDITIONS 74HC SYMBOL PARAMETER min. +25 −40 to +85 −40 to +125 typ. max. min. max. min. max. UNIT V CC (V) VEE (V) OTHER tPHL/ tPLH propagation delay Vis to Vos 14 5 4 4 60 12 10 8 75 15 13 10 90 18 15 12 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = ∞; CL = 50 pF (see Fig.17) tPZH/ tPZL turn “ON” time E1 to Vos 85 31 25 28 300 60 51 55 375 75 64 69 450 90 77 83 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = 1 kΩ; CL = 50 pF (see Fig.18) tPZH/ tPZL turn “ON” time E2 to Vos 85 31 25 25 300 60 51 55 375 75 64 69 450 90 77 83 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = 1 kΩ; CL = 50 pF (see Fig.18) tPZH/ tPZL turn “ON” time LE to Vos 91 33 26 27 300 60 51 55 375 75 64 69 450 90 77 83 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = 1 kΩ; CL = 50 pF (see Fig.18) tPZH/ tPZL turn “ON” time Sn to Vos 88 32 26 25 300 60 51 50 375 75 64 63 450 90 77 75 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = 1 kΩ; CL = 50 pF (see Fig.18) tPHZ/ tPLZ turn “OFF” time E1 to Vos 69 25 20 20 250 50 43 40 315 63 54 50 375 75 64 60 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = 1 kΩ; CL = 50 pF (see Fig.18) tPHZ/ tPLZ turn “OFF” time E2 to Vos 72 26 21 19 250 50 43 40 315 63 54 50 375 75 64 60 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = 1 kΩ; CL = 50 pF (see Fig.18) tPHZ/ tPLZ turn “OFF” time LE to Vos 83 30 24 26 275 55 47 45 345 69 59 56 415 83 71 68 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = 1 kΩ; CL = 50 pF (see Fig.18) tPHZ/ tPLZ turn “OFF” time Sn to Vos 80 29 23 24 275 55 47 48 345 69 59 60 415 83 71 72 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = 1 kΩ; CL = 50 pF (see Fig.18) December 1990 8 Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch 74HC/HCT4351 Tamb (°C) TEST CONDITIONS 74HC SYMBOL PARAMETER +25 −40 to +85 −40 to +125 min. typ. max. min. max. min. UNIT V CC (V) VEE (V) OTHER max. tsu set-up time Sn to LE 60 12 10 18 17 6 5 9 75 15 13 23 90 18 15 27 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = 1 kΩ; CL = 50 pF (see Fig.19) th hold time Sn to LE 5 5 5 5 −8 −3 −2 −4 5 5 5 5 5 5 5 5 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = 1 kΩ; CL = 50 pF (see Fig.19) tW LE minimum pulse width HIGH 100 20 17 25 11 1 3 7 125 25 21 31 150 30 26 38 ns 2.0 4.5 6.0 4.5 0 0 0 −4.5 RL = 1 kΩ; CL = 50 pF (see Fig.19) December 1990 9 Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch 74HC/HCT4351 DC CHARACTERISTICS FOR 74HCT Voltages are referenced to GND (ground = 0) Tamb (°C) TEST CONDITIONS 74HCT SYMBOL PARAMETER −40 to +85 +25 min. typ. max. min. VIH HIGH level input voltage VIL LOW level input voltage ±II 2.0 1.6 1.2 max. 2.0 −40 to +125 UNIT V CC (V) VEE (V) VI OTHER min. max. 2.0 V 4.5 to 5.5 0.8 0.8 0.8 V 4.5 to 5.5 input leakage current 0.1 1.0 1.0 µA 5.5 ±IS analog switch OFF-state current per channel 0.1 1.0 1.0 µA 10.0 0 VIH or VIL VS = VCC − VEE (see Fig.10) ±IS analog switch OFF-state current all channels 0.4 4.0 4.0 µA 10.0 0 VIH or VIL VS = VCC − VEE (see Fig.10) ±IS analog switch ON-state current 0.4 4.0 4.0 µA 10.0 0 VIH or VIL VS = VCC − VEE (see Fig.11) ICC quiescent supply current 8.0 16.0 80.0 160.0 160.0 320.0 µA 5.5 5.0 0 VCC −5.0 or GND Vis = VEE or VCC; Vos = VCC or VEE ∆ICC additional quiescent supply current per input pin for unit load coefficient is 1 (note 1) 360 450 490 µA 4.5 to 5.5 0 other inputs at VCC or GND 100 0 VCC or GND VCC −2.1 V Note to HCT types 1. The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given here. To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT UNIT LOAD COEFFICIENT E1, E2 Sn LE 0.50 0.50 1.5 December 1990 10 Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch 74HC/HCT4351 AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) TEST CONDITIONS 74HCT SYMBOL PARAMETER −40 to +85 +25 −40 to +125 UNIT V CC (V) VEE (V) OTHER min. typ. max. min. max. min. max. tPHL/ tPLH propagation delay Vis to Vos 6 4 12 8 15 10 18 12 ns 4.5 4.5 0 RL = ∞; −4.5 CL = 50 pF (see Fig.17) tPZH/ tPZL turn “ON” time E1 to Vos 40 31 75 60 94 75 113 90 ns 4.5 4.5 0 RL = 1 kΩ; −4.5 CL = 50 pF (see Fig.18) tPZH/ tPZL turn “ON” time E2 to Vos 35 26 70 50 88 63 105 75 ns 4.5 4.5 0 RL = 1 kΩ; −4.5 CL = 50 pF (see Fig.18) tPZH/ tPZL turn “ON” time LE to Vos 42 37 75 60 94 75 113 90 ns 4.5 4.5 0 RL = 1 kΩ; −4.5 CL = 50 pF (see Fig.18) tPZH/ tPZL turn “ON” time Sn to Vos 39 30 75 60 94 75 113 90 ns 4.5 4.5 0 RL = 1 kΩ; −4.5 CL = 50 pF (see Fig.18) tPHZ/ tPLZ turn “OFF” time E1 to Vos 27 20 55 40 69 50 83 60 ns 4.5 4.5 0 RL = 1 kΩ; −4.5 CL = 50 pF (see Fig.18) tPHZ/ tPLZ turn “OFF” time E2 to Vos 32 26 60 50 75 63 90 75 ns 4.5 4.5 0 RL = 1 kΩ; −4.5 CL = 50 pF (see Fig.18) tPHZ/ tPLZ turn “OFF” time LE to Vos 33 30 60 55 75 69 90 83 ns 4.5 4.5 0 RL = 1 kΩ; −4.5 CL = 50 pF (see Fig.18) tPHZ/ tPLZ turn “OFF” time Sn to Vos 33 29 65 55 81 69 98 83 ns 4.5 4.5 0 RL = 1 kΩ; −4.5 CL = 50 pF (see Fig.18) tsu set-up time Sn to LE 12 14 6 7 15 18 18 21 ns 4.5 4.5 0 RL = 1 kΩ; −4.5 CL = 50 pF (see Fig.19) th hold time Sn to LE 5 5 −1 −2 5 5 5 5 ns 4.5 4.5 0 RL = 1 kΩ; −4.5 CL = 50 pF (see Fig.19) tW LE minimum pulse width HIGH 25 25 13 13 31 31 38 38 ns 4.5 4.5 0 RL = 1 kΩ; −4.5 CL = 50 pF (see Fig.19) December 1990 11 Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch Fig.8 Test circuit for measuring RON. Fig.9 74HC/HCT4351 Typical RON as a function of input voltage Vis for Vis = 0 to VCC − VEE. Fig.10 Test circuit for measuring OFF-state current. Fig.11 Test circuit for measuring ON-state current. December 1990 12 Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch 74HC/HCT4351 ADDITIONAL AC CHARACTERISTICS FOR 74HC/HCT Recommended conditions and typical values GND = 0 V; Tamb = 25 °C SYMBOL PARAMETER typ. UNIT VCC (V) VEE (V) Vis(p−p) (V) CONDITIONS sine-wave distortion f = 1 kHz 0.04 0.02 % % 2.25 4.5 −2.25 −4.5 4.0 8.0 RL = 10 kΩ; CL = 50 pF (see Fig.14) sine-wave distortion f = 10 kHz 0.12 0.06 % % 2.25 4.5 −2.25 −4.5 4.0 8.0 RL = 10 kΩ; CL = 50 pF (see Fig.14) switch “OFF” signal feed-through −50 −50 dB dB 2.25 4.5 −2.25 −4.5 note 1 RL = 600 Ω; CL = 50 pF (see Figs 12 and 15) V(p−p) crosstalk voltage between control and any switch (peak-to-peak value) 120 220 mV mV 4.5 4.5 0 −4.5 fmax minimum frequency response (−3dB) 160 170 MHz MHz 2.25 4.5 −2.25 −4.5 CS maximum switch capacitance independent (Y) common (Z) 5 25 pF pF RL = 600 Ω; CL = 50 pF; f = 1 MHz (E1, E2 or Sn, square-wave between VCC and GND, tr = tf = 6 ns) (see Fig.16) note 2 RL = 50 Ω; CL = 10 pF (see Figs 13 and 14) Notes to AC characteristics 1. Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 Ω). 2. Adjust input voltage Vis to 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 Ω). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Test conditions: VCC = 4.5 V; GND = 0 V; VEE = −4.5 V; RL = 50 Ω; Rsource = 1 kΩ. Fig.12 Typical switch “OFF” signal feed-through as a function of frequency. December 1990 13 Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch 74HC/HCT4351 Test conditions: VCC = 4.5 V; GND = 0 V; VEE = −4.5 V; RL = 50 Ω; Rsource = 1 kΩ. Fig.13 Typical frequency response. Fig.14 Test circuit for measuring sine-wave distortion and minimum frequency response. Fig.15 Test circuit for measuring switch “OFF” signal feed-through. The crosstalk is defined as follows (oscilloscope output): Fig.16 Test circuit for measuring crosstalk between control and any switch. December 1990 14 Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch 74HC/HCT4351 AC WAVEFORMS HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.18 Waveforms showing the turn-ON and turn-OFF times. Fig.17 Waveforms showing the input (Vis) to output (Vos) propagation delays. HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.19 Waveforms showing the set-up and hold times from Sn inputs to LE input, and minimum pulse width of LE. December 1990 15 Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch 74HC/HCT4351 TEST CIRCUIT AND WAVEFORMS Conditions TEST SWITCH Vis tr; tf tPZH VEE VCC tPZL VCC VEE tPHZ VEE VCC tPLZ VCC VEE 74HC VCC others open pulse 74HCT 3.0 V FAMILY AMPLITUDE VM fmax; PULSE WIDTH OTHER 50% < 2 ns 6 ns 1.3 V < 2 ns 6 ns CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values). RT = termination resistance should be equal to the output impedance ZO of the pulse generator. tr = tf = 6 ns; when measuring fmax, there is no constraint on tr, tf with 50% duty factor. Fig.20 Test circuit for measuring AC performance. Conditions TEST SWITCH Vis tPZH VEE VCC tPZL VCC VEE tPHZ VEE VCC tPLZ VCC VEE others open pulse tr; tf FAMILY AMPLITUDE 74HC VCC 74HCT 3.0 V VM fmax; PULSE WIDTH OTHER 50% < 2 ns 6 ns 1.3 V < 2 ns 6 ns CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values). RT = termination resistance should be equal to the output impedance ZO of the pulse generator. tr = tf = 6 ns; when measuring fmax, there is no constraint on tr, tf with 50% duty factor. Fig.21 Input pulse definitions. December 1990 16 Philips Semiconductors Product specification 8-channel analog multiplexer/demultiplexer with latch PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines”. December 1990 17 74HC/HCT4351
74HC4351N,652 价格&库存

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