74HC4520N,652

74HC4520; 74HCT4520 Dual 4-bit synchronous binary counter Rev. 3 — 4 December 2014 Product data sheet 1. General description The 74HC4520; 74HCT4520 are dual 4-bit internally synchronous binary counters with two clock inputs (nCP0 and nCP1). They have buffered outputs from all 4 bit positions (nQ0 to nQ3) and an asynchronous master reset input (nMR). The counter advances on the LOW-to-HIGH transition of nCP0 when nCP1 is HIGH. It also advances on the HIGH-to-LOW transition of nCP1 when nCP0 is LOW. Either nCP0 or nCP1 may be used as the clock input to the counter. The other clock input may be used as a clock enable input. A HIGH on nMR, resets the counter (nQ0 to nQ3 = LOW) independent of nCP0 and nCP1. Inputs include clamp diodes. It enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits  Complies with JEDEC standard no. 7A  Input levels:  For 74HC4520: CMOS level  For 74HCT4520: TTL level  ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V  Multiple package options  Specified from 40 C to +85 C and 40 C to +125 C 3. Applications  Multistage synchronous counting  Multistage asynchronous counting  Frequency dividers 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter 4. Ordering information Table 1. Ordering information Type number 74HC4520N Package Temperature range Name Description Version 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74HCT4520N 74HC4520D 74HCT4520D 74HC4520DB 74HCT4520DB 74HC4520PW 5. Functional diagram 1Q0 3 1 1CP0 1Q1 4 2 1CP1 1Q2 5 1Q3 6 7 1MR 2Q0 11 9 2CP0 2Q1 12 10 2CP1 2Q2 13 2Q3 14 15 2MR 001aae698 Fig 1. Functional diagram 74HC_HCT4520 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 2 of 19 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 nCP0 nCP1 nMR 3 4 nQ0 nQ1 nQ2 nQ3 001aae707 Fig 2. Timing diagram Q4 Q4 4 Q&3 Q&3 Q4 4 )) &3 )) &3 5' 4 5' 4 Q4 4 )) &3 5' 4 4 )) &3 5' 4 Q05 DDD Fig 3. Logic diagram for one counter 74HC_HCT4520 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 3 of 19 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter 6. Pinning information 6.1 Pinning +& +&7 +& +&7 &3   9&& &3   9&& &3   05 &3   05 4   4 4   4 4   4 4   4 4   4 4   4 4   4 4   4 05  *1'   &3  &3 05   &3 *1'   &3 Pin configuration DIP16 &3   9&& &3   05 4   4 4   4 4   4 4   4 05   &3 *1'   &3 DDD DDD Fig 4. +& +&7 Fig 5. Pin configuration SO16 DDD Fig 6. Pin configuration TSSOP16 and SSOP16 6.2 Pin description Table 2. Pin description Symbol Pin Description 1CP0, 2CP0 1, 9 clock input (LOW-to-HIGH edge-triggered) 1CP1, 2CP1 2, 10 clock input (HIGH-to-LOW edge-triggered) 1Q0 to 1Q3 3, 4, 5, 6 output 1MR, 2MR 7, 15 asynchronous master reset input (active HIGH) GND 8 ground (0 V) 2Q0 to 2Q3 11, 12, 13, 14 output VCC 16 supply voltage 74HC_HCT4520 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 4 of 19 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter 7. Functional description Table 3. Function table[1] nCP0 nCP1 nMR Mode  H L counter advances L  L counter advances  X L no change X  L no change  L L no change H  L no change X X H nQ0 to nQ3 = LOW [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care;  = positive-going transition;  = negative-going transition. 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input clamping current Conditions Min Max Unit 0.5 +7.0 V VI < 0.5 V or VI > VCC + 0.5 V - 20 mA IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V - 20 mA IO output current VO = 0.5 V to VCC + 0.5 V - 25 mA ICC supply current - 50 mA IGND ground current 50 - mA Tstg storage temperature Ptot total power dissipation [1] 65 +150 C DIP16 package [1] - 750 mW SO16 package [1] - 500 mW (T)SSOP16 package [1] - 500 mW For DIP16 packages: above 70 C the value of Ptot derates linearly at 12 mW/K. For SO16 packages: above 70 C the value of Ptot derates linearly at 8 mW/K. For (T)SSOP16 packages: above 60 C the value of Ptot derates linearly at 5.5 mW/K. 74HC_HCT4520 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 5 of 19 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter 9. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC4520 Min Typ 74HCT4520 Max Min Typ Unit Max VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V 10. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V HIGH-level VI = VIH or VIL output voltage IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 4.0; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 5.2; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V LOW-level VI = VIH or VIL output voltage IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V VI = VCC or GND; VCC = 6.0 V - - 0.1 - 1.0 - 1.0 A - - 8.0 - 80.0 - 160.0 A 74HC4520 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V 74HC_HCT4520 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 6 of 19 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter CI 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max - 3.5 - - - - - pF input capacitance 74HCT4520 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V 3.98 4.32 - 3.84 - 3.7 - V - 0 0.1 - 0.1 - 0.1 V - 0.15 0.26 - 0.33 - 0.4 V - - 0.1 - 1.0 - 1.0 A - - 8.0 - 80.0 - IO = 4.0 mA VOL LOW-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 20 A IO = 4.0 mA II input leakage current VI = VCC or GND; VCC = 5.5 V ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V 160.0 A ICC additional per input pin; VI = VCC  2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A supply current pin nCP0, nCP1 80 288 360 392 A pin nMR CI input capacitance - 150 540 - 675 - 735 A - 3.5 - - - - - pF 11. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 8. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max 74HC4520 tpd propagation delay nCP0 to nQn; see Figure 7 [1] VCC = 2.0 V - 77 240 - 300 - 360 ns VCC = 4.5 V - 28 48 - 60 - 72 ns VCC = 5.0 V; CL = 15 pF - 24 - - - - - ns - 22 41 - 51 - 61 ns VCC = 2.0 V - 77 240 - 300 - 360 ns VCC = 4.5 V - 28 48 - 60 - 72 ns VCC = 5.0 V; CL = 15 pF - 24 - - - - - ns VCC = 6.0 V - 22 41 - 51 - 61 ns VCC = 6.0 V nCP1 to nQn; see Figure 7 74HC_HCT4520 Product data sheet [1] All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 7 of 19 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 8. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max tPHL tW Max Min Max HIGH to LOW nMR to nQn; see Figure 7 propagation VCC = 2.0 V delay VCC = 4.5 V - 44 150 - 190 - 225 ns - 16 30 - 38 - 45 ns VCC = 5.0 V; CL = 15 pF - 13 - - - - - ns - 13 26 - 33 - 38 ns VCC = 2.0 V - 19 75 - 95 - 110 ns VCC = 4.5 V - 7 15 - 19 - 22 ns VCC = 6.0 V - 6 13 - 16 - 19 ns VCC = 6.0 V tt Min transition time pulse width [2] nQn; see Figure 7 nCP0, nCP1 HIGH or LOW; see Figure 7 VCC = 2.0 V 80 22 - 100 - 120 - ns VCC = 4.5 V 16 8 - 20 - 24 - ns VCC = 6.0 V 14 6 - 17 - 20 - ns VCC = 2.0 V 120 39 - 150 - 180 - ns VCC = 4.5 V 24 14 - 30 - 36 - ns VCC = 6.0 V 20 11 - 26 - 31 - ns VCC = 2.0 V 0 28 - 0 - 0 - ns VCC = 4.5 V 0 10 - 0 - 0 - ns VCC = 6.0 V 0 8 - 0 - 0 - ns nMR HIGH; see Figure 7 trec tsu fmax recovery time nMR to nCP0, nCP1; see Figure 7 set-up time maximum frequency nCP0 to nCP1; nCP1 to nCP0; see Figure 7 VCC = 2.0 V 80 14 - 100 - 120 - ns VCC = 4.5 V 16 5 - 20 - 24 - ns VCC = 6.0 V 14 4 - 17 - 20 - ns VCC = 2.0 V 6 19 - 4.8 - 4 - MHz VCC = 4.5 V 30 58 - 24 - 20 - MHz - 68 - - - - - MHz 35 69 - 28 - 24 - MHz - 29 - - - - - pF - 28 53 - 66 - 80 ns - 24 - - - - - ns VCC = 4.5 V - 25 53 - 66 - 80 ns VCC = 5.0 V; CL = 15 pF - 24 - - - - - ns nCP0, nCP1; see Figure 7 VCC = 5.0 V; CL = 15 pF VCC = 6.0 V CPD power dissipation capacitance VI = GND to VCC; VCC = 5 V; fi = 1 MHz [3] nCP0 to nQn; see Figure 7 [1] 74HCT4520 tpd propagation delay VCC = 4.5 V VCC = 5.0 V; CL = 15 pF nCP1 to nQn; see Figure 7 74HC_HCT4520 Product data sheet [1] All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 8 of 19 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 8. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max tPHL HIGH to LOW nMR to nQn; see Figure 7 propagation VCC = 4.5 V delay VCC = 5.0 V; CL = 15 pF tt tW Min Max Min Max - 16 35 - 44 - 53 ns - 13 - - - - - ns - 7 15 - 19 - 22 ns 20 10 - 25 - 30 - ns 20 12 - 25 - 30 - ns 0 8 - 0 - 0 - ns [2] transition time nQn; see Figure 7 pulse width nCP0, nCP1 HIGH or LOW; see Figure 7 VCC = 4.5 V VCC = 4.5 V nMR HIGH; see Figure 7 VCC = 4.5 V recovery time nMR to nCP0, nCP1; see Figure 7 trec VCC = 4.5 V set-up time tsu nCP0 to nCP1; nCP1 to nCP0; see Figure 7 VCC = 4.5 V maximum frequency fmax power dissipation capacitance [1] 6 - 20 - 24 - ns 30 58 - 24 - 20 - MHz - 64 - - - - - MHz - 24 - - - - - pF nCP0, nCP1; see Figure 7 VCC = 4.5 V VCC = 5.0 V; CL = 15 pF CPD 16 VI = GND to VCC  1.5 V; VCC = 5 V; fi = 1 MHz [3] tpd is the same as tPHL and tPLH. [2] tt is the same as tTHL and tTLH. [3] CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of outputs. 74HC_HCT4520 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 9 of 19 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter 12. Waveforms VI VM nCP0 input 0V VI nCP1 input VM 0V 0V tsu tsu VI nMR input VM 0V tPHL nQn output tPHL tPLH VOH 90 % VM 10 % VOL tt tt 001aae702 a. nCP0 and nCP1 set-up times, propagation delays and output transition times 1/fmax VI nCP1 input (nCP0 = LOW) VM 0V tW VI nCP0 input (nCP1 = HIGH) VM 0V tW VI nMR input VM 0V tW trec 001aae701 b. nMR recovery time, minimum nCP0, nCP1, nMR pulse widths and maximum frequency Measurement points are given in Table 8. The logic levels VOH and VOL are typical output voltage levels that occur with the output load. Fig 7. Waveforms showing measurements for switching times 74HC_HCT4520 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 10 of 19 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter Table 8. Measurement points Type Input Output VM VI VM 74HC4520 0.5  VCC GND to VCC 0.5  VCC 74HCT4520 1.3 V GND to 3 V 1.3 V 9, W:  QHJDWLYH SXOVH 90 9 9, WI WU WU WI  SRVLWLYH SXOVH 9 90  90 90  W: 9&& 9&& * 9, 92 5/ 6 RSHQ '87 &/ 57 DDG Test data is given in Table 9. Test circuit definitions: RT = Termination resistance should be equal to output impedance Zo of the pulse generator CL = Load capacitance including jig and probe capacitance RL = Load resistance. S1 = Test selection switch Fig 8. Test circuit for measuring switching times Table 9. Test data Type Input Load S1 position VI tr, tf CL RL tPHL, tPLH 74HC4520 VCC 6 ns 15 pF, 50 pF 1 k open 74HCT4520 3V 6 ns 15 pF, 50 pF 1 k open 74HC_HCT4520 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 11 of 19 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter 13. 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All rights reserved. 13 of 19 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter 6623SODVWLFVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ =   4 $ $ $  $ SLQLQGH[ ș /S /   GHWDLO; Z 0 ES H   PP VFDOH ',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = ș PP                            R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7(   02 Fig 11. Package outline SOT338-1 (SSOP16) 74HC_HCT4520 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 14 of 19 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter 76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ =   4 $ SLQLQGH[ $  $ $ ș /S /   H GHWDLO; Z 0 ES   PP VFDOH ',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = ș PP                            R R 1RWHV 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 3ODVWLFLQWHUOHDGSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7(   02 Fig 12. Package outline SOT403-1 (TSSOP16) 74HC_HCT4520 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 15 of 19 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter 14. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT4520 v.3 20141204 Product data sheet - 74HC_HCT4520_CNV v.2 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. 74HC_HCT4520_CNV v.2 19930927 74HC_HCT4520 Product data sheet Product specification - All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 December 2014 - © NXP Semiconductors N.V. 2014. All rights reserved. 16 of 19 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter 16. 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In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 74HC_HCT4520 Product data sheet Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 17 of 19 74HC4520; 74HCT4520 NXP Semiconductors Dual 4-bit synchronous binary counter Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74HC_HCT4520 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 4 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 18 of 19 NXP Semiconductors 74HC4520; 74HCT4520 Dual 4-bit synchronous binary counter 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information. . . . . . . . . . . . . . . . . . . . . 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP Semiconductors N.V. 2014. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 4 December 2014 Document identifier: 74HC_HCT4520