74HC594N

74HC594; 74HCT594 8-bit shift register with output register Rev. 03 — 20 December 2006 Product data sheet 1. General description The 74HC594; 74HCT594 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). The 74HC594; 74HCT594 is an 8-bit, non-inverting, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks (SHCP and STCP) and direct overriding clears (SHR and STR) are provided on both the shift and storage registers. A serial output (Q7S) is provided for cascading purposes. Both the shift and storage register clocks are positive-edge triggered. If the user wishes to connect both clocks together, the shift register will always be one count pulse ahead of the storage register. 2. Features I I I I I I I I Synchronous serial input and output Complies with JEDEC standard No.7A 8-bit parallel output Shift and storage registers have independent direct clear and clocks Independent clocks for shift and storage registers 100 MHz (typical) Multiple package options Specified from −40 °C to +85 °C and from −40 °C to +125 °C 3. Applications I Serial-to parallel data conversion I Remote control holding register NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register 4. Ordering information Table 1. Ordering information Package Temperature range 74HC594D 74HC594DB 74HC594N 74HCT594D 74HCT594DB 74HCT594N −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C Name SO16 SSOP16 DIP16 SO16 SSOP16 DIP16 Description plastic small outline package; 16 leads; body width 3.9 mm plastic shrink small outline package; 16 leads; body width 5.3 mm plastic dual in-line package; 16 leads (300 mil) plastic small outline package; 16 leads; body width 3.9 mm plastic shrink small outline package; 16 leads; body width 5.3 mm plastic dual in-line package; 16 leads (300 mil) Version SOT109-1 SOT338-1 SOT38-4 SOT109-1 SOT338-1 SOT38-4 Type number 5. Functional diagram DS SHCP SHR 14 11 10 9 12 13 8-BIT STORAGE REGISTER Q7S 8-STAGE SHIFT REGISTER STCP STR 15 1 2 3 4 5 6 7 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 mbc320 Fig 1. Functional diagram 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 2 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register SHCP STCP STR 11 12 9 15 1 2 DS 14 3 4 5 6 7 10 SHR 13 STR mbc319 mbc322 13 12 10 11 14 R1 SRG8 C1/ 1D R2 C2 STCP Q7S Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 DS SHR SHCP 2D 15 1 2 3 4 5 6 7 9 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q7S Fig 2. Logic symbol Fig 3. IEC logic symbol STAGE 0 DS D Q D STAGES 1 TO 6 Q STAGE 7 D Q Q7S FFSH0 CP R SHCP FFSH7 CP R SHR D Q D CP Q FFST0 CP R STCP FFST7 R STR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 mbc321 Fig 4. Logic diagram 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 3 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register SHCP DS STCP SHR STR Q0 Q1 Q6 Q7 Q7S mbc323 Fig 5. Timing diagram 6. Pinning information 6.1 Pinning 74HC594 74HCT594 Q1 Q2 Q3 Q4 Q5 Q6 Q7 GND 1 2 3 4 5 6 7 8 001aaf611 16 VCC 15 Q0 14 DS 13 STR 12 STCP 11 SHCP 10 SHR 9 Q7S Fig 6. Pin configuration SO16 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 4 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register 74HC594 74HCT594 Q1 1 2 3 4 5 6 7 8 001aaf614 16 VCC 15 Q0 14 DS 13 STR 12 STCP 11 SHCP 10 SHR 9 Q7S 74HC594 74HCT594 Q1 Q2 Q3 Q4 Q5 Q6 Q7 GND 1 2 3 4 5 6 7 8 001aaf613 Q2 Q3 16 VCC 15 Q0 14 DS 13 STR 12 STCP 11 SHCP 10 SHR 9 Q7S GND Q6 Q7 Q4 Q5 Fig 7. Pin configuration SSOP16 Fig 8. Pin configuration DIP16 6.2 Pin description Table 2. Symbol Q1 Q2 Q3 Q4 Q5 Q6 Q7 GND Q7S SHR SHCP STCP STR DS Q0 VCC Pin description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Description parallel data output 1 parallel data output 2 parallel data output 3 parallel data output 4 parallel data output 5 parallel data output 6 parallel data output 7 ground (0 V) serial data output shift register reset (active LOW) shift register clock input storage register clock input storage register reset (active LOW) serial data input parallel data output 0 supply voltage 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 5 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register 7. Functional description Table 3. Function Clear shift register Clear storage register Load DS into shift register stage 0, advance previous stage data to the next stage Transfer shift register data to storage register and outputs Qn Shift register one count pulse ahead of storage register [1] H = HIGH voltage level; L = LOW voltage level; ↑ = LOW-to-HIGH transition; X = don’t care. Function table[1] Input SHR L X H X H STR X L X H H SHCP STCP X X ↑ X ↑ X X X ↑ ↑ DS X X H or L X X 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK IOK IO Parameter supply voltage input clamping current output clamping current output current VI < −0.5 V or VI > VCC + 0.5 V VO < −0.5 V or VO > VCC + 0.5 V VO = −0.5 V to VCC + 0.5 V Serial data output Q7S Parallel data output ICC IGND Tstg Ptot [1] [2] [1] [1] Conditions Min −0.5 −65 [2] Max +7.0 ±20 ±20 ±25 ±35 50 70 −50 −70 +150 500 Unit V mA mA mA mA mA mA mA mA °C mW supply current ground current storage temperature total power dissipation Serial data output Q7S Parallel data output Serial data output Q7S Parallel data output Tamb = −40 °C to +125 °C - The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For DIP16 packages: above 70 °C the value of Ptot derates linearly with 12 mW/K. For SO16 packages: above 70 °C the value of Ptot derates linearly with 8 mW/K. For SSOP16 packages: above 60 °C the value of Ptot derates linearly with 5.5 mW/K. 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 6 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register 9. Recommended operating conditions Table 5. Symbol VCC VI VO Tamb tr Recommended operating conditions Parameter supply voltage input voltage output voltage ambient temperature rise time VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tf fall time VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V Type 74HCT594 VCC VI VO Tamb tr tf supply voltage input voltage output voltage ambient temperature rise time fall time VCC = 4.5 V VCC = 4.5 V 4.5 0 0 −40 5.0 +25 6.0 6.0 5.5 VCC VCC +125 500 500 V V V °C ns ns Conditions Min 2.0 0 0 −40 Typ 5.0 +25 6.0 6.0 Max 6.0 VCC VCC +125 1000 500 400 1000 500 400 Unit V V V °C ns ns ns ns ns ns Type 74HC594 10. Static characteristics Table 6. Static characteristics type 74HC594 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIH Parameter HIGH-level input voltage Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL Serial data output Q7S IO = −4.0 mA; VCC = 4.5 V IO = −5.2 mA; VCC = 6.0 V Parallel data outputs IO = −6.0 mA; VCC = 4.5 V IO = −7.8 mA; VCC = 6.0 V 3.98 5.48 4.32 5.81 V V 3.98 5.48 4.32 5.81 V V Min 1.5 3.15 4.2 Typ 1.2 2.4 3.2 0.8 2.1 2.8 Max 0.5 1.35 1.8 Unit V V V V V V Tamb = 25 °C 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 7 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register Table 6. Static characteristics type 74HC594 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VOL Parameter LOW-level output voltage Conditions VI = VIH or VIL Serial data output Q7S IO = 4.0 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V Parallel data outputs IO = 6.0 mA; VCC = 4.5 V IO = 7.8 mA; VCC = 6.0 V II ICC Ci VIH input leakage current supply current input capacitance HIGH-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL Serial data output Q7S IO = −4.0 mA; VCC = 4.5 V IO = −5.2 mA; VCC = 6.0 V Parallel data outputs IO = −6.0 mA; VCC = 4.5 V IO = −7.8 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL Serial data output Q7S IO = 4.0 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V Parallel data outputs IO = 6.0 mA; VCC = 4.5 V IO = 7.8 mA; VCC = 6.0 V II ICC input leakage current supply current VI = VCC or GND; VCC = 6.0 V VI = VCC or GND; IO = 0 A; VCC = 6.0 V VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 0.33 0.33 ±1.0 80 V V µA µA 0.33 0.33 V V 3.84 5.34 V V 3.84 5.34 V V VI = VCC or GND; VCC = 6.0 V VI = VCC or GND; IO = 0 A; VCC = 6.0 V 1.5 3.15 4.2 0.15 0.16 3.5 0.26 0.26 ±0.1 8.0 0.5 1.35 1.8 V V µA µA pF V V V V V V 0.15 0.16 0.26 0.26 V V Min Typ Max Unit Tamb = −40 °C to +85 °C Tamb = −40 °C to +125 °C VIH HIGH-level input voltage 1.5 3.15 4.2 V V V 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 8 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register Table 6. Static characteristics type 74HC594 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIL Parameter LOW-level input voltage Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL Serial data output Q7S IO = −4.0 mA; VCC = 4.5 V IO = −5.2 mA; VCC = 6.0 V Parallel data outputs IO = −6.0 mA; VCC = 4.5 V IO = −7.8 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL Serial data output Q7S IO = 4.0 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V Parallel data outputs IO = 6.0 mA; VCC = 4.5 V IO = 7.8 mA; VCC = 6.0 V II ICC input leakage current supply current VI = VCC or GND; VCC = 6.0 V VI = VCC or GND; IO = 0 A; VCC = 6.0 V 0.4 0.4 ±1.0 160 V V µA µA 0.4 0.4 V V 3.7 5.2 V V 3.7 5.2 V V Min Typ Max 0.5 1.35 1.8 Unit V V V 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 9 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register Table 7. Static characteristics type 74HCT594 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIH VIL VOH Parameter HIGH-level input voltage LOW-level input voltage HIGH-level output voltage Conditions VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL Serial data output Q7S IO = −4.0 mA; VCC = 4.5 V Parallel data outputs IO = −6.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL Serial data output Q7S IO = 4.0 mA; VCC = 4.5 V Parallel data outputs IO = 6.0 mA; VCC = 4.5 V II ICC ∆ICC input leakage current supply current additional supply current VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V per input pin; VI = VCC − 2.1 V and other inputs at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V pins SHR, SHCP, STCP, STR pin DS Ci VIH VIL VOH input capacitance HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL Serial data output Q7S IO = −4.0 mA; VCC = 4.5 V Parallel data outputs IO = −6.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL Serial data output IO = 4.0 mA; VCC = 4.5 V Parallel data outputs IO = 6.0 mA; VCC = 4.5 V II ICC input leakage current supply current VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V 0.33 ±1.0 80 V µA µA 0.33 V 3.84 V 3.84 V Tamb = −40 °C to +85 °C 2.0 0.8 V V 150 25 3.5 540 90 µA µA pF 0.16 0.26 ±0.1 8.0 V µA µA 0.15 0.26 V 3.98 4.32 V 3.98 4.32 V Min 2.0 Typ 1.6 1.2 Max 0.8 Unit V V Tamb = 25 °C 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 10 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register Table 7. Static characteristics type 74HCT594 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol ∆ICC Parameter additional supply current Conditions per input pin; VI = VCC − 2.1 V and other inputs at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V pins SHR, SHCP, STCP, STR pin DS Tamb = −40 °C to +125 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL Serial data output Q7S IO = −4.0 mA; VCC = 4.5 V Parallel data outputs IO = −6.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL Serial data output Q7S IO = 4.0 mA; VCC = 4.5 V Parallel data outputs IO = 6.0 mA; VCC = 4.5 V II ICC ∆ICC input leakage current supply current additional supply current VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V per input pin; VI = VCC − 2.1 V and other inputs at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V pins SHR, SHCP, STCP, STR pin DS 735 122.5 µA µA 0.4 ±1.0 160 V µA µA 0.4 V 3.7 V 3.7 V 2.0 0.8 V V 675 112.5 µA µA Min Typ Max Unit 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 11 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register 11. Dynamic characteristics Table 8. Dynamic characteristics type 74HC594 GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15. Symbol tpd Parameter propagation delay Conditions Min SHCP to Q7S; see Figure 9 VCC = 2.0 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V STCP to Qn; see Figure 10 VCC = 2.0 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V tPHL HIGH to LOW propagation delay SHR to Q7S; see Figure 13 VCC = 2.0 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V STR to Qn; see Figure 14 VCC = 2.0 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V tTHL HIGH to LOW output transition time see Figure 9 Serial data output Q7S VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V Parallel data outputs VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 14 5 4 60 12 10 75 15 13 90 18 15 ns ns ns 19 7 6 75 15 13 95 19 16 110 22 19 ns ns ns 39 14 11 12 125 25 21 155 31 26 185 37 31 ns ns ns ns 39 14 11 12 150 30 26 185 37 31 225 45 38 ns ns ns ns 44 16 13 14 150 30 26 185 37 31 225 45 38 ns ns ns ns [1] 25 °C Typ Max −40 °C to +85 °C Min Max −40 °C to +125 °C Unit Min Max - 44 16 13 14 150 30 26 - 185 37 31 - 225 45 38 ns ns ns ns 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 12 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register Table 8. Dynamic characteristics type 74HC594 …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15. Symbol tTLH Parameter Conditions Min see Figure 9 LOW to HIGH output Serial data output Q7S transition VCC = 2.0 V time VCC = 4.5 V VCC = 6.0 V Parallel data outputs VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tW pulse width SHCP (HIGH or LOW); see Figure 9 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V STCP (HIGH or LOW); see Figure 10 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V SHR and STR (HIGH or LOW); see Figure 13 and Figure 14 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 80 16 14 14 5 4 100 20 17 120 24 20 ns ns ns 80 16 14 10 4 3 100 20 17 120 24 20 ns ns ns 80 16 14 10 4 3 100 20 17 120 24 20 ns ns ns 14 5 4 60 12 10 75 15 13 90 18 15 ns ns ns 25 °C Typ Max −40 °C to +85 °C Min Max −40 °C to +125 °C Unit Min Max 19 7 6 75 15 13 - 95 19 16 - 110 22 19 ns ns ns 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 13 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register Table 8. Dynamic characteristics type 74HC594 …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15. Symbol tsu Parameter set-up time Conditions Min DS to SHCP; see Figure 11 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V SHR to STCP; see Figure 12 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V SHCP to STCP; see Figure 10 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V th hold time DS to SHCP; see Figure 11 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V trec recovery time SHR to SHCP and STR to STCP; see Figure 13 and Figure 14 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V fmax maximum frequency SHCP or STCP; see Figure 9 and Figure 10 VCC = 2.0 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V 6.0 30 35 30 92 100 109 4.8 24 28 4.0 20 24 MHz MHz MHz MHz 50 10 9 −14 −5 −4 65 13 11 75 15 13 ns ns ns 25 5 4 −8 −3 −2 30 6 5 35 7 6 ns ns ns 100 20 17 17 6 5 125 25 21 150 30 26 ns ns ns 100 20 17 14 5 4 125 25 21 150 30 26 ns ns ns 100 20 17 10 4 3 125 25 21 150 30 26 ns ns ns 25 °C Typ Max −40 °C to +85 °C Min Max −40 °C to +125 °C Unit Min Max 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 14 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register Table 8. Dynamic characteristics type 74HC594 …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15. Symbol CPD Parameter power dissipation capacitance Conditions Min VI = GND to VCC; VCC = 5 V; fi = 1 MHz [2] 25 °C Typ 84 Max - −40 °C to +85 °C Min Max - −40 °C to +125 °C Unit Min Max pF [1] [2] tpd is the same as tPHL and tPLH. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs. Table 9. Dynamic characteristics type 74HCT594 GND = 0 V; VCC = 4.5 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15. Symbol tpd Parameter propagation delay Conditions Min SHCP to Q7S; see Figure 9 VCC = 5.0 V; CL = 15 pF STCP to Qn; see Figure 10 VCC = 5.0 V; CL = 15 pF tPHL HIGH to LOW propagation delay SHR to Q7S; see Figure 13 VCC = 5.0 V; CL = 15 pF STR to Qn; see Figure 14 VCC = 5.0 V; CL = 15 pF tTHL HIGH to LOW output transition time see Figure 9 Serial data output Q7S VCC = 4.5 V Parallel data outputs VCC = 4.5 V tTLH 5 12 15 18 ns see Figure 9 LOW to HIGH output Serial data output Q7S transition VCC = 4.5 V time Parallel data outputs VCC = 4.5 V 74HC_HCT594_3 25 °C Typ 18 15 18 15 17 14 17 14 Max 32 32 30 30 [1] −40 °C to +85 °C Min Max 40 40 38 38 - −40 °C to +125 °C Min Max 48 48 45 45 - Unit ns ns ns ns ns ns ns ns - - 7 15 - 19 - 22 ns 7 5 15 12 - 19 15 - 22 18 ns ns - © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 15 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register Table 9. Dynamic characteristics type 74HCT594 …continued GND = 0 V; VCC = 4.5 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15. Symbol tW Parameter pulse width Conditions Min SHCP (HIGH or LOW); see Figure 9 STCP (HIGH or LOW); see Figure 10 SHR and STR (HIGH or LOW); see Figure 13 and Figure 14 tsu set-up time DS to SHCP; see Figure 11 SHR to STCP; see Figure 12 SHCP to STCP; see Figure 10 th trec hold time recovery time DS to SHCP; see Figure 11 SHR to SHCP and STR to STCP; see Figure 13 and Figure 14 SHCP or STCP; see Figure 9 and Figure 10 VCC = 5.0 V; CL = 15 pF CPD power dissipation capacitance VI = GND to VCC − 1.5 V; VCC = 5 V; fi = 1 MHz [2] 25 °C Typ 4 Max 16 −40 °C to +85 °C Min 20 Max - −40 °C to +125 °C Min 24 Max - Unit ns 16 4 - 20 - 24 - ns 16 6 - 20 - 24 - ns 20 20 20 5 10 4 6 7 −3 −5 - 25 25 25 6 13 - 30 30 30 7 15 - ns ns ns ns ns fmax maximum frequency 30 92 - 24 - 20 - MHz - 100 89 - - - - - MHz pF [1] [2] tpd is the same as tPHL and tPLH. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs. 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 16 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register 12. Waveforms 1/fmax SHCP input VM tW tPLH Q7S output tPHL VM tTLH tTHL 001aae341 Measurement points are given in Table 10. tPLH and tPHL are the same as tpd. tTLH = LOW to HIGH output transition time; tTHL = HIGH to LOW output transition time. Fig 9. The shift clock (SHCP) to output (Q7S) propagation delays, the shift clock pulse width, the maximum shift clock frequency, and output transition times SHCP input VM tsu 1/ fmax STCP input VM tW tPLH tPHL VM mla512 Qn outputs Measurement points are given in Table 10. tPLH and tPHL are the same as tpd. Fig 10. The storage clock (STCP) to output (Qn), propagation delays, the storage clock pulse width, the maximum storage clock pulse frequency and the shift clock to storage clock set-up time 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 17 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register SHCP input VM t su th t su th DS input VM Q7 output VM 001aae342 Measurement points are given in Table 10. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig 11. The data set-up time and hold times for DS input to SHCP SHR input VM tsu STCP input VM Qn outputs VM mbc326 Measurement points are given in Table 10. Fig 12. The set-up time shift reset (SHR) to storage clock (STCP) 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 18 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register SHR input VM tW trec SHCP input VM tPHL Q7S output VM mbc324 Measurement points are given in Table 10. tPLH and tPHL are the same as tpd. Fig 13. The shift reset (SHR) pulse width, the shift reset to output (Q7S) propagation delay and the shift reset to shift clock (SHCP) recovery time STR input VM tW trec STCP input VM tPHL Qn outputs VM mbc325 Measurement points are given in Table 10. tPLH and tPHL are the same as tpd. Fig 14. The storage reset (STR) pulse width, the storage reset to output (Qn) propagation delay and the storage reset to storage clock (STCP) recovery time Table 10. Type 74HC594 74HCT594 Measurement points Input VM 0.5 × VCC 1.3 V Output VM 0.5 × VCC 1.3 V 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 19 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register VI negative pulse 0V tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW VM VM VI positive pulse 0V VCC VCC PULSE GENERATOR VI VO RL S1 DUT RT CL open 001aad983 Test data is given in Table 11. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator CL = Load capacitance including jig and probe capacitance RL = Load resistor S1 = Test selection switch Fig 15. Load circuitry for measuring switching times Table 11. Type 74HC594 74HCT594 Test data Input VI VCC 3V tr, tf 6 ns 6 ns Load CL 15 pF, 50 pF 15 pF, 50 pF RL 1 kΩ 1 kΩ S1 position tPHL, tPLH open open tPZH, tPHZ GND GND tPZL, tPLZ VCC VCC 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 20 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register 13. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE vMA Z 16 9 Q A2 pin 1 index θ Lp 1 e bp 8 wM L detail X A1 (A 3) A 0 2.5 scale 5 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07 JEDEC MS-012 JEITA EUROPEAN PROJECTION A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3 θ 0.010 0.057 0.069 0.004 0.049 0.019 0.0100 0.39 0.014 0.0075 0.38 0.244 0.041 0.228 0.028 0.004 0.012 8 o 0 o ISSUE DATE 99-12-27 03-02-19 Fig 16. Package outline SOT109-1 (SO16) 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 21 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 D E A X c y HE vM A Z 16 9 Q A2 A1 pin 1 index Lp L 1 bp 8 wM detail X (A 3) θ A e 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 6.4 6.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.00 0.55 θ 8 o 0 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC MO-150 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 17. Package outline SOT338-1 (SSOP16) 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 22 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 D seating plane ME A2 A L A1 c Z e b1 b 16 9 b2 MH wM (e 1) pin 1 index E 1 8 0 5 scale 10 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.02 A2 max. 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 b2 1.25 0.85 0.049 0.033 c 0.36 0.23 0.014 0.009 D (1) 19.50 18.55 0.77 0.73 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.1 e1 7.62 0.3 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 0.76 0.03 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT38-4 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 95-01-14 03-02-13 Fig 18. Package outline SOT38-4 (DIP16) 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 23 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register 14. Abbreviations Table 12. Acronym CMOS DUT ESD HBM LSTTL MM TTL Abbreviations Description Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Low-Power Schottky Transistor-Transistor Logic Machine Model Transistor-Transistor Logic 15. Revision history Table 13. Revision history Release date 20061220 Data sheet status Product data sheet Change notice Supersedes 74HC_HCT594_CNV_2 Document ID 74HC_HCT594_3 Modifications: • • • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Table 1 “Ordering information” updated. Product specification 74HC_HCT594_CNV_1 74HC_HCT594_CNV_2 19970908 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 24 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register 16. Legal information 16.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 16.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com 74HC_HCT594_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 25 of 26 NXP Semiconductors 74HC594; 74HCT594 8-bit shift register with output register 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional description . . . . . . . . . . . . . . . . . . . 6 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 Recommended operating conditions. . . . . . . . 7 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7 Dynamic characteristics . . . . . . . . . . . . . . . . . 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 21 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 24 Legal information. . . . . . . . . . . . . . . . . . . . . . . 25 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 25 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Contact information. . . . . . . . . . . . . . . . . . . . . 25 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2006. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 20 December 2006 Document identifier: 74HC_HCT594_3