74HC153; 74HCT153
Dual 4-input multiplexer
Rev. 5 — 23 January 2014
Product data sheet
1. General description
The 74HC153; 74HCT153 is a dual 4-input multiplexer. The device features independent
enable inputs (nE) and common data select inputs (S0 and S1). For each multiplexer, the
select inputs select one of the four binary inputs and routes it to the multiplexer output
(nY). A HIGH on E forces the corresponding multiplexer outputs LOW. Inputs include
clamp diodes. This enables the use of current limiting resistors to interface inputs to
voltages in excess of VCC.
2. Features and benefits
Input levels:
For 74HC153: CMOS level
For 74HCT153: TTL level
Non-inverting outputs
Separate enable input for each output
Common select inputs
Complies with JEDEC standard no. 7A
Permits multiplexing from n lines to 1 line
Enable line provided for cascading (n lines to 1 line)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C.
74HC153; 74HCT153
NXP Semiconductors
Dual 4-input multiplexer
3. Ordering information
Table 1.
Ordering information
Type number
74HC153N
Package
Temperature range
Name
Description
Version
40 C to +125 C
DIP16
plastic dual in-line package; 16 leads (300 mil)
SOT38-4
40 C to +125 C
SO16
plastic small outline package; 16 leads; body width
3.9 mm
SOT109-1
40 C to +125 C
SSOP16
plastic shrink small outline package; 16 leads; body
width 5.3 mm
SOT338-1
40 C to +125 C
TSSOP16
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74HCT153N
74HC153D
74HCT153D
74HC153DB
74HCT153DB
74HC153PW
74HCT153PW
4. Functional diagram
1
6
5
4
3
6
5
4
3
10
11
12
14
13
2
14
Fig 1.
1I0 1I1 1I2 1I3 2I0 2I1 2I2 2I3
S0
10
2
S1
11
1
1E
12
15
2E
13
Logic symbol
74HC_HCT153
Product data sheet
1Y
2Y
7
9
2E
1I0
1I1
1I2
1Y
MUX
7
1I3
S0
S1
2I0
2I1
2I2
2Y
MUX
9
2I3
2E
15
001aal843
Fig 2.
001aal844
Functional diagram
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 23 January 2014
© NXP B.V. 2014. All rights reserved.
2 of 17
74HC153; 74HCT153
NXP Semiconductors
Dual 4-input multiplexer
1E
1I3
1I2
1I1
1I0
S0
S1
2I3
2I2
1Y
Fig 3.
2I1
2Y
2I0
2E
001aal845
Logic diagram
5. Pinning information
5.1 Pinning
+&
+&7
(
9&&
6
(
,
6
(
9&&
,
6
(
O
6
,
+&
+&7
,
,
O
O
,
,
O
O
O
O
<
O
*1'
<
<
,
*1'
<
DDD
Fig 4.
DDD
Pin configuration DIP16, SO16
74HC_HCT153
Product data sheet
Fig 5.
Pin configuration (T)SSOP16
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 23 January 2014
© NXP B.V. 2014. All rights reserved.
3 of 17
74HC153; 74HCT153
NXP Semiconductors
Dual 4-input multiplexer
5.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
1E, 2E
1, 15
output enable inputs (active LOW)
S0, S1
14, 2
data select inputs
1I0, 1I1, 1I2, 1I3
6, 5, 4, 3
data inputs source 1
1Y
7
multiplexer output source 1
GND
8
ground (0 V)
2Y
9
multiplexer output source 2
2I0, 2I1, 2I2, 2I3
10, 11, 12, 13
data inputs source 2
VCC
16
supply voltage
6. Functional description
Table 3.
Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
select Inputs
data inputs
output enable
output
S0
S1
nI0
nI1
nI2
nI3
nE
nY
X
X
X
X
X
X
H
L
L
L
L
X
X
X
L
L
L
L
H
X
X
X
L
H
H
L
X
L
X
X
L
L
H
L
X
H
X
X
L
H
L
H
X
X
L
X
L
L
L
H
X
X
H
X
L
H
H
H
X
X
X
L
L
L
H
H
X
X
X
H
L
H
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
Min
Max
Unit
0.5
+7
V
-
20
mA
-
20
mA
-
25
mA
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
[1]
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
[1]
IO
output current
0.5 V < VO < VCC + 0.5 V
ICC
supply current
-
50
mA
IGND
ground current
50
-
mA
Tstg
storage temperature
65
+150
C
IIK
74HC_HCT153
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 23 January 2014
© NXP B.V. 2014. All rights reserved.
4 of 17
74HC153; 74HCT153
NXP Semiconductors
Dual 4-input multiplexer
Table 4.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Ptot
[1]
[2]
Parameter
Conditions
Min
Max
Unit
DIP16 package
-
750
mW
SO16 and (T)SSOP16
packages
-
500
mW
[2]
total power dissipation
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For DIP16 package: Ptot derates linearly with 12 mW/K above 70 C.
For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.
For (T)SSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
VCC
supply voltage
VI
input voltage
VO
output voltage
Tamb
ambient temperature
t/V
input transition rise and fall rate
74HC153
74HCT153
Unit
Min
Typ
Max
Min
Typ
Max
2.0
5.0
6.0
4.5
5.0
5.5
V
0
-
VCC
0
-
VCC
V
0
-
VCC
0
-
VCC
V
40
+25
+125
40
+25
+125
C
VCC = 2.0 V
-
-
625
-
-
-
ns/V
VCC = 4.5 V
-
1.67
139
-
1.67
139
ns/V
VCC = 6.0 V
-
-
83
-
-
-
ns/V
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
25 C
Conditions
Min
Typ
40 C to +85 C 40 C to +125 C Unit
Max
Min
Max
Min
Max
74HC153
VIH
VIL
HIGH-level
input voltage
LOW-level
input voltage
74HC_HCT153
Product data sheet
VCC = 2.0 V
1.5
1.2
-
1.5
-
1.5
-
V
VCC = 4.5 V
3.15
2.4
-
3.15
-
3.15
-
V
VCC = 6.0 V
4.2
3.2
-
4.2
-
4.2
-
V
VCC = 2.0 V
-
0.8
0.5
-
0.5
-
0.5
V
VCC = 4.5 V
-
2.1
1.35
-
1.35
-
1.35
V
VCC = 6.0 V
-
2.8
1.8
-
1.8
-
1.8
V
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 23 January 2014
© NXP B.V. 2014. All rights reserved.
5 of 17
74HC153; 74HCT153
NXP Semiconductors
Dual 4-input multiplexer
Table 6.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VOH
VOL
HIGH-level
output voltage
LOW-level
output voltage
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
1.9
2.0
-
1.9
-
1.9
-
V
IO = 20 A; VCC = 4.5 V
4.4
4.5
-
4.4
-
4.4
-
V
IO = 20 A; VCC = 6.0 V
5.9
6.0
-
5.9
-
5.9
-
V
IO = 4.0 mA; VCC = 4.5 V
3.98
4.32
-
3.84
-
3.7
-
V
IO = 5.2 mA; VCC = 6.0 V
5.48
5.81
-
5.34
-
5.2
-
V
IO = 20 A; VCC = 2.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 20 A; VCC = 4.5 V
-
0
0.1
-
0.1
-
0.1
V
VI = VIH or VIL
IO = 20 A; VCC = 6.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 4.0 mA; VCC = 4.5 V
-
0.15
0.26
-
0.33
-
0.4
V
IO = 5.2 mA; VCC = 6.0 V
-
0.16
0.26
-
0.33
-
0.4
V
II
input leakage
current
VI = VCC or GND;
VCC = 6.0 V
-
-
0.1
-
1
-
1
A
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
8.0
-
80
-
160
A
CI
input
capacitance
-
3.5
-
-
-
-
-
pF
74HCT153
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
2.0
1.6
-
2.0
-
2.0
-
V
VIL
LOW-level
input voltage
VCC = 4.5 V to 5.5 V
-
1.2
0.8
-
0.8
-
0.8
V
VOH
HIGH-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
4.4
4.5
-
4.4
-
4.4
-
V
IO = 4.0 mA
3.98
4.32
-
3.84
-
3.7
-
V
LOW-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A; VCC = 4.5 V
-
0
0.1
-
0.1
-
0.1
V
IO = 5.2 mA; VCC = 6.0 V
-
0.15
0.26
-
0.33
-
0.4
V
VOL
II
input leakage
current
VI = VCC or GND;
VCC = 5.5 V
-
-
0.1
-
1
-
1
A
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
8
-
80
-
160
A
ICC
additional
supply current
per input pin;
VI = VCC 2.1 V; IO = 0 A;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V
1In, 2In
-
45
162
-
203
-
221
A
nE
-
60
216
-
270
-
294
A
Sn
-
135
486
-
608
-
662
A
-
3.5
-
-
-
-
-
pF
CI
input
capacitance
74HC_HCT153
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 23 January 2014
© NXP B.V. 2014. All rights reserved.
6 of 17
74HC153; 74HCT153
NXP Semiconductors
Dual 4-input multiplexer
10. Dynamic characteristics
Table 7.
Dynamic characteristics
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; for test circuit, see Figure 8; unless otherwise specified
Symbol Parameter
25 C
Conditions
Min
40 C to +85 C
Typ Max
40 C to +125 C Unit
Min
Max
Min
Max
74HC153
tpd
propagation
delay
1In to nY, 2In to nY; see
Figure 6
[1]
VCC = 2.0 V
-
47
145
-
180
-
220
ns
VCC = 4.5 V
-
17
29
-
36
-
44
ns
VCC = 5.0 V; CL = 15 pF
-
14
-
-
-
-
-
ns
VCC = 6.0 V
-
14
25
-
31
-
38
ns
VCC = 2.0 V
-
50
150
-
190
-
225
ns
VCC = 4.5 V
-
18
30
-
38
-
45
ns
VCC = 5.0 V; CL = 15 pF
-
15
-
-
-
-
-
ns
VCC = 6.0 V
-
14
26
-
33
-
38
ns
VCC = 2.0 V
-
33
100
-
125
-
150
ns
VCC = 4.5 V
-
12
20
-
25
-
30
ns
VCC = 5.0 V; CL = 15 pF
-
10
-
-
-
-
-
ns
-
10
17
-
21
-
26
ns
VCC = 2.0 V
-
19
75
-
95
-
110
ns
VCC = 4.5 V
-
7
15
-
19
-
22
ns
Sn to nY; see Figure 7
nE to nY; see Figure 7
VCC = 6.0 V
tt
transition time
[2]
see Figure 6
VCC = 6.0 V
CPD
-
6
13
-
16
-
19
ns
-
30
-
-
-
-
-
pF
-
19
34
-
43
-
51
ns
-
16
-
-
-
-
-
ns
VCC = 4.5 V
-
13
24
-
30
-
36
ns
VCC = 5.0 V; CL = 15 pF
-
16
-
-
-
-
-
ns
per package;
VI = GND to VCC
[3]
HIGH to LOW
propagation
delay
1In to nY, 2In to nY; see
Figure 6
[1]
LOW to HIGH
propagation
delay
1In to nY, 2In to nY; see
Figure 6
power
dissipation
capacitance
74HCT153
tPHL
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
tPLH
74HC_HCT153
Product data sheet
[1]
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 23 January 2014
© NXP B.V. 2014. All rights reserved.
7 of 17
74HC153; 74HCT153
NXP Semiconductors
Dual 4-input multiplexer
Table 7.
Dynamic characteristics …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; for test circuit, see Figure 8; unless otherwise specified
Symbol Parameter
25 C
Conditions
Min
tpd
propagation
delay
Sn to nY; see Figure 7
[1]
Min
Max
-
20
34
-
43
-
51
ns
-
17
-
-
-
-
-
ns
-
14
27
-
34
-
41
ns
-
11
-
-
-
-
-
ns
-
7
15
-
19
-
22
ns
-
30
-
-
-
-
-
pF
[1]
[2]
see Figure 6
VCC = 4.5 V
power
dissipation
capacitance
Max
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
CPD
Min
VCC = 5.0 V; CL = 15 pF
VCC = 4.5 V
transition time
Typ Max
40 C to +125 C Unit
[1]
nE to nY; see Figure 7
tt
40 C to +85 C
[3]
per package;
VI = GND to VCC 1.5 V
tpd is the same as tPHL and tPLH.
[2]
tt is the same as tTHL and tTLH.
[3]
CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
9,
90
,QOQLQSXW
90
*1'
W3+/
92+
W3/+
9<
90
Q
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