74HCT164N,652

74HC164; 74HCT164 8-bit serial-in, parallel-out shift register Rev. 7 — 13 June 2013 Product data sheet 1. General description The 74HC164; 74HCT164 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the other input. Data is shifted on the LOW-to-HIGH transitions of the clock (CP) input. A LOW on the master reset input (MR) clears the register and forces all outputs LOW, independently of other inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits  Input levels:  For 74HC164: CMOS level  For 74HCT164: TTL level  Gated serial data inputs  Asynchronous master reset  Complies with JEDEC standard no. 7A  ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V.  Multiple package options  Specified from 40 C to +85 C and 40 C to +125 C. 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register 3. Ordering information Table 1. Ordering information Type number 74HC164N Package Temperature range Name Description Version 40 C to +125 C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1 thin quad flat package; no leads; 14 terminals; body 2.5  3  0.85 mm 74HCT164N 74HC164D 74HCT164D 74HC164DB 74HCT164DB 74HC164PW 74HCT164PW 74HC164BQ 74HCT164BQ 4. Functional diagram SRG8 8 9 1 2 C1/ R & 1D 3 4 DSA DSB 1 2 CP MR 8 9 5 3 Q0 4 Q1 6 5 Q2 10 6 Q3 10 Q4 11 Q5 12 Q6 13 Q7 11 12 13 001aac424 001aac423 Fig 1. Logic symbol Fig 2. DSA DSB CP MR IEC logic symbol 1 2 8 8-BIT SERIAL−IN/PARALLEL−OUT SHIFT REGISTER 9 3 4 5 6 10 11 12 13 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 001aac425 Fig 3. Logic diagram 74HC_HCT164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 2 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register DSA D Q D CP FF1 RD DSB Q D CP FF2 RD Q D CP FF3 RD Q D CP FF4 RD Q D CP FF5 RD Q D CP FF6 RD Q D CP FF7 RD Q CP FF8 RD CP MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 001aac616 Fig 4. Functional diagram 5. Pinning information 5.1 Pinning terminal 1 index area 1 74HC164 74HCT164 14 VCC DSA 74HC164 74HCT164 DSB 2 13 Q7 12 Q6 3 Q1 4 Q0 3 12 Q6 Q2 5 Q1 4 11 Q5 Q2 5 10 Q4 Q3 6 Q3 6 9 MR GND 7 8 CP 11 Q5 GND(1) 10 Q4 9 8 Q0 13 Q7 CP 14 VCC 2 7 1 DSB GND DSA MR 001aal391 Transparent top view 001aal390 (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 5. Pin configuration DIP14, SO14, (T)SSOP14 74HC_HCT164 Product data sheet Fig 6. Pin configuration DHVQFN14 All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 3 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register 5.2 Pin description Table 2. Pin description Symbol Pin Description DSA 1 data input DSB 2 data input Q0 to Q7 3, 4, 5, 6, 10, 11, 12, 13 output GND 7 ground (0 V) CP 8 clock input (LOW-to-HIGH, edge-triggered) MR 9 master reset input (active LOW) VCC 14 positive supply voltage 6. Functional description Table 3. Function table[1] Operating modes Input MR CP DSA DSB Q0 Q1 to Q7 Reset (clear) L X X X L L to L Shift H  l l L q0 to q6 H  l h L q0 to q6 H  h l L q0 to q6 H  h h H q0 to q6 [1] Output H = HIGH voltage level h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition L = LOW voltage level I = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition q = lower case letters indicate the state of the referenced input one set-up time prior to the LOW-to-HIGH clock transition  = LOW-to-HIGH clock transition 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Max Unit VCC supply voltage IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V [1] 0.5 +7 V - 20 IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] mA - 20 mA IO output current 0.5 V < VO < VCC + 0.5 V - 25 mA ICC IGND supply current - 50 mA ground current 50 - mA Tstg storage temperature 65 +150 C 74HC_HCT164 Product data sheet Conditions All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 Min © NXP B.V. 2013. All rights reserved. 4 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register Table 4. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Ptot [1] [2] Parameter Conditions Min Max Unit DIP14 package - 750 mW SO14, (T)SSOP14 and DHVQFN14 packages - 500 mW [2] total power dissipation The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For DIP14 package: Ptot derates linearly with 12 mW/K above 70 C. For SO14 package: Ptot derates linearly with 8 mW/K above 70 C. For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C. For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C. 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC164 74HCT164 Unit Min Typ Max Min Typ Max VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions Min Typ 40 C to +85 C 40 C to +125 C Unit Max Min Max Min Max 74HC164 VIH VIL HIGH-level input voltage LOW-level input voltage 74HC_HCT164 Product data sheet VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 5 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOH VOL HIGH-level output voltage LOW-level output voltage 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VI = VIH or VIL IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V VI = VIH or VIL IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 - 1 - 1 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 - 80 - 160 A CI input capacitance - 3.5 - - - - - pF 74HCT164 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V IO = 4.0 mA 3.98 4.32 - 3.84 - 3.7 - V LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 5.2 mA; VCC = 6.0 V - 0.15 0.26 - 0.33 - 0.4 V VOL II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 - 1 - 1 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8 - 80 - 160 A ICC additional supply current per input pin; VI = VCC  2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V - 100 360 - 450 - 490 A CI input capacitance - 3.5 - - - - - pF 74HC_HCT164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 6 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; tr = tf = 6 ns; CL = 50 pF; test circuit see Figure 10; unless otherwise specified Symbol Parameter 25 C Conditions Min 40 C to +85 C Typ Max 40 C to +125 C Unit Min Max Min Max 74HC164 tpd tPHL propagation delay HIGH to LOW propagation delay [1] CP to Qn; see Figure 7 VCC = 2.0 V - 41 170 - 215 - 255 ns VCC = 4.5 V - 15 34 - 43 - 51 ns VCC = 5.0 V; CL = 15 pF - 12 - - - - - ns VCC = 6.0 V - 12 29 - 37 - 43 ns VCC = 2.0 V - 39 140 - 175 - 210 ns VCC = 4.5 V - 14 28 - 35 - 42 ns VCC = 5.0 V; CL = 15 pF - 11 - - - - - ns - 11 24 - 30 - 36 ns MR to Qn; see Figure 8 VCC = 6.0 V tt tW transition time pulse width [2] see Figure 7 VCC = 2.0 V - 19 75 - 95 - 110 ns VCC = 4.5 V - 7 15 - 19 - 22 ns VCC = 6.0 V - 6 13 - 16 - 19 ns VCC = 2.0 V 80 14 - 100 - 120 - ns VCC = 4.5 V 16 5 - 20 - 24 - ns VCC = 6.0 V 14 4 - 17 - 20 - ns VCC = 2.0 V 60 17 - 75 - 90 - ns VCC = 4.5 V 12 6 - 15 - 18 - ns VCC = 6.0 V 10 5 - 13 - 15 - ns VCC = 2.0 V 60 17 - 75 - 90 - ns VCC = 4.5 V 12 6 - 15 - 18 - ns VCC = 6.0 V 10 5 - 13 - 15 - ns VCC = 2.0 V 60 8 - 75 - 90 - ns VCC = 4.5 V 12 3 - 15 - 18 - ns VCC = 6.0 V 10 2 - 13 - 15 - ns VCC = 2.0 V +4 6 - 4 - 4 - ns VCC = 4.5 V +4 2 - 4 - 4 - ns VCC = 6.0 V +4 2 - 4 - 4 - ns CP HIGH or LOW; see Figure 7 MR LOW; see Figure 8 trec tsu th recovery time set-up time hold time 74HC_HCT164 Product data sheet MR to CP; see Figure 8 DSA, and DSB to CP; see Figure 9 DSA, and DSB to CP; see Figure 9 All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 7 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register Table 7. Dynamic characteristics …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; test circuit see Figure 10; unless otherwise specified Symbol Parameter 25 C Conditions Min fmax maximum frequency Min Max Min Max VCC = 2.0 V 6 23 - 5 - 4 - MHz VCC = 4.5 V 30 71 - 24 - 20 - MHz - 78 - - - - - MHz 35 85 - 28 - 24 - MHz - 40 - - - - - pF VCC = 4.5 V - 17 36 - 45 - 54 ns VCC = 5.0 V; CL = 15 pF - 14 - - - - - ns VCC = 4.5 V - 19 38 - 48 - 57 ns VCC = 5.0 V; CL = 15 pF - 16 - - - - - ns - 7 15 - 19 - 22 ns 18 7 - 23 - 27 - ns 18 10 - 23 - 27 - ns 16 7 - 20 - 24 - ns 12 6 - 15 - 18 - ns +4 2 - 4 - 4 - ns 27 55 - 22 - 18 - MHz - 61 - - - - - MHz VCC = 6.0 V power dissipation capacitance Typ Max 40 C to +125 C Unit for Cp, see Figure 7 VCC = 5.0 V; CL = 15 pF CPD 40 C to +85 C per package; VI = GND to VCC [3] CP to Qn; see Figure 7 [1] 74HCT164 tpd tPHL tt propagation delay HIGH to LOW propagation delay transition time MR to Qn; see Figure 8 [2] see Figure 7 VCC = 4.5 V tW pulse width CP HIGH or LOW; see Figure 7 VCC = 4.5 V MR LOW; see Figure 8 VCC = 4.5 V trec recovery time MR to CP; see Figure 8 VCC = 4.5 V tsu set-up time DSA, and DSB to CP; see Figure 9 VCC = 4.5 V th hold time DSA, and DSB to CP; see Figure 9 fmax maximum frequency for Cp, see Figure 7 VCC = 4.5 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF 74HC_HCT164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 8 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register Table 7. Dynamic characteristics …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; test circuit see Figure 10; unless otherwise specified Symbol Parameter 25 C Conditions Min CPD [1] power dissipation capacitance [3] per package; VI = GND to VCC  1.5 V - 40 C to +85 C Typ Max 40 - 40 C to +125 C Unit Min Max Min Max - - - - pF tpd is the same as tPHL and tPLH. [2] tt is the same as tTHL and tTLH. [3] CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD  VCC2  fi  N +  (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching;  (CL  VCC2  fo) = sum of outputs. 1/fmax VI CP input VM GND tW tPHL VOH tPLH VY VM VX Qn output VOL tTHL tTLH 001aal392 (1) Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 7. Waveforms showing the clock (CP) to output (Qn) propagation delays, the clock pulse width, the output transition times and the maximum clock frequency Table 8. Measurement points Type Input Output VM VM VX VY 74HC164 0.5VCC 0.5VCC 0.1VCC 0.9VCC 74HCT164 1.3 V 1.3 V 0.1VCC 0.9VCC 74HC_HCT164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 9 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register VI VM MR input GND tW frec VI CP input VM GND tPHL VOH VM Qn output VOL 001aac427 (1) Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 8. Waveforms showing the master reset (MR) pulse width, the master reset to output (Qn) propagation delays and the master reset to clock (CP) removal time VI VM CP input GND t su t su th th VI VM Dn input GND VOH VM Qn output VOL 001aac428 (1) Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig 9. Waveforms showing the data set-up and hold times for Dn inputs 74HC_HCT164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 10 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register VI negative pulse tW 90 % VM VM 10 % GND tr tf tr tf VI 90 % positive pulse GND VM VM 10 % tW VCC G VI VO DUT RT CL 001aah768 Test data is given in Table 9. Definitions test circuit: RT = termination resistance should be equal to output impedance Zo of the pulse generator. CL = load capacitance including jig and probe capacitance. Fig 10. Test circuit for measuring switching times Table 9. Test data Type Input Load Test VI tr, tf CL 74HC164 VCC 6.0 ns 15 pF, 50 pF tPLH, tPHL 74HCT164 3.0 V 6.0 ns 15 pF, 50 pF tPLH, tPHL 74HC_HCT164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 11 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register 11. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b MH 8 14 pin 1 index E 1 7 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.13 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 2.2 inches 0.17 0.02 0.13 0.068 0.044 0.021 0.015 0.014 0.009 0.77 0.73 0.26 0.24 0.1 0.3 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT27-1 050G04 MO-001 SC-501-14 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-13 Fig 11. Package outline SOT27-1 (DIP14) 74HC_HCT164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 12 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.35 0.014 0.0075 0.34 0.16 0.15 0.010 0.057 inches 0.069 0.004 0.049 0.05 0.244 0.039 0.041 0.228 0.016 0.028 0.024 0.01 0.01 0.028 0.004 0.012 θ 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT108-1 076E06 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 12. Package outline SOT108-1 (SO14) 74HC_HCT164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 13 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm D SOT337-1 E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp L 7 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.4 0.9 8o o 0 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT337-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Fig 13. Package outline SOT337-1 (SSOP14) 74HC_HCT164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 14 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.72 0.38 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig 14. Package outline SOT402-1 (TSSOP14) 74HC_HCT164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 15 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 6 y y1 C v M C A B w M C b L 1 7 Eh e 14 8 13 9 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.30 0.18 c D (1) Dh E (1) Eh 0.2 3.1 2.9 1.65 1.35 2.6 2.4 1.15 0.85 e 0.5 e1 L v w y y1 2 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT762-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 15. Package outline SOT762-1 (DHVQFN14) 74HC_HCT164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 16 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register 12. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model TTL Transistor-Transistor Logic 13. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT164 v.7 20130613 Product data sheet - 74HC_HCT164 v.6 - 74HC_HCT164 v.5 Modifications: 74HC_HCT164 v.6 Modifications: • General description updated. 20111212 • Product data sheet Legal pages updated. 74HC_HCT164 v.5 20101125 Product data sheet - 74HC_HCT164 v.4 74HC_HCT164 v.4 20100202 Product data sheet - 74HC_HCT164 v.3 74HC_HCT164 v.3 20050404 Product data sheet - 74HC_HCT164_ CNV v.2 74HC_HCT164_CNV v.2 19901201 Product specification - - 74HC_HCT164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 17 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register 14. Legal information 14.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 14.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 14.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 74HC_HCT164 Product data sheet Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 18 of 20 74HC164; 74HCT164 NXP Semiconductors 8-bit serial-in, parallel-out shift register Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 14.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 15. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74HC_HCT164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 13 June 2013 © NXP B.V. 2013. All rights reserved. 19 of 20 NXP Semiconductors 74HC164; 74HCT164 8-bit serial-in, parallel-out shift register 16. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 14.1 14.2 14.3 14.4 15 16 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Contact information. . . . . . . . . . . . . . . . . . . . . 19 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2013. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 13 June 2013 Document identifier: 74HC_HCT164