74HCT251DB,112

74HC251; 74HCT251 8-input multiplexer; 3-state Rev. 4 — 1 February 2016 Product data sheet 1. General description The 74HC251; 74HCT251 is an 8-bit multiplexer with eight binary inputs (I0 to I7), three select inputs (S0 to S2) and an output enable input (OE). The select inputs select one of the eight binary inputs and route it to the complementary outputs (Y and Y). A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits  Input levels:  For 74HC251: CMOS level  For 74HCT251: TTL level  Low-power dissipation  Non-inverting data path  Specified in compliance with JEDEC standard no. 7A  ESD protection:  HBM JESD22-A114F exceeds 2 000 V  MM JESD22-A115-A exceeds 200 V  Multiple package options  Specified from 40 C to +85 C and from 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number 74HC251D Package Temperature range Name Description Version 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm 74HCT251D 74HC251DB 74HCT251DB 74HC251PW 74HCT251PW SOT338-1 SOT403-1 74HC251; 74HCT251 NXP Semiconductors 8-input multiplexer; 3-state 4. Functional diagram   ,  Fig 1.       , , , , , , , ,  <   ,  ,   , , , 08/7,3/(;(5 6  < , 6   ,  6    2(  2( 6 6 6    < DDD Logic symbol <  Fig 2.  DDD Functional diagram , , , , < , , < , , 6 Fig 3. 6 6 2( DDD Logic diagram 74HC_HCT251 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 2 of 18 74HC251; 74HCT251 NXP Semiconductors 8-input multiplexer; 3-state 5. Pinning information 5.1 Pinning +& +&7 ,   9&& ,   , ,   , ,   , <   , <   6 2(  +& +&7 ,   6 *1'     , ,   , ,   , <   , <   6   6 2( 6  9&& , *1'   Fig 4. 6 DDD DDD Pin configuration SO16 Fig 5. Pin configuration SSOP16 and TSSOP16 5.2 Pin description Table 2. Pin description Symbol Pin Description I0 to I7 4, 3, 2, 1, 15, 14, 13, 12 data inputs Y 5 multiplexer output Y 6 complementary multiplexer output OE 7 output enable input (active LOW) GND 8 ground (0 V) S0, S1, S2 11, 10, 9 common data select inputs VCC 16 supply voltage 74HC_HCT251 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 3 of 18 74HC251; 74HCT251 NXP Semiconductors 8-input multiplexer; 3-state 6. Functional description Function table[1] Table 3. Input Output OE S2 H X X X X X X X X X X X Z Z L L L L L X X X X X X X H L L L L L H X X X X X X X L H L L L H X L X X X X X X H L L L L H X H X X X X X X L H L L H L X X L X X X X X H L L L H L X X H X X X X X L H L L H H X X X L X X X X H L L L H H X X X H X X X X L H L H L L X X X X L X X X H L L H L L X X X X H X X X L H L H L H X X X X X L X X H L L H L H X X X X X H X X L H L H H L X X X X X X L X H L L H H L X X X X X X H X L H L H H H X X X X X X X L H L L H H H X X X X X X X H L H [1] S1 S0 I0 I1 I2 I3 I4 I5 I6 I7 Y Y H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VCC supply voltage IIK input clamping current IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V - 20 mA IO output current VO = 0.5 V to (VCC + 0.5 V) - 25 mA ICC supply current - +50 mA IGND ground current 50 - mA Tstg storage temperature 65 +150 C Ptot total power dissipation VI < 0.5 V or VI > VCC + 0.5 V Unit 0.5 +7 V - 20 mA SO16 package [1] - 500 mW (T)SSOP16 package [2] - 500 mW For SO16 package: Ptot derates linearly with 8 mW/K above 70 C. [2] For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C. Product data sheet Max Tamb = 40 C to +125 C [1] 74HC_HCT251 Min All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 4 of 18 74HC251; 74HCT251 NXP Semiconductors 8-input multiplexer; 3-state 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC251 74HCT251 Unit Min Typ Max Min Typ Max 2.0 5.0 6.0 4.5 5.0 5.5 V input voltage 0 - VCC 0 - VCC V output voltage 0 - VCC 0 - VCC V VCC supply voltage VI VO Tamb ambient temperature t/V input transition rise and fall rate 40 +25 +125 40 +25 +125 VCC = 2.0 V - - 625 - - - ns/V C VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 C Conditions Min Typ Tamb = 40 C to +85 C Max Min Max Tamb = 40 C to Unit +125 C Min Max 74HC251 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V VI = VIH or VIL VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 - 1.0 - 1.0 A IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - 0.5 - 5.0 - 10.0 A 74HC_HCT251 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 5 of 18 74HC251; 74HCT251 NXP Semiconductors 8-input multiplexer; 3-state Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Tamb = 25 C Symbol Parameter Conditions ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V CI input capacitance Min Tamb = 40 C to +85 C Tamb = 40 C to Unit +125 C Typ Max Min Max Min Max - - 8.0 - 80 - 160 - 3.5 - A pF 74HCT251 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V IO = 4 mA 3.98 4.32 - 3.84 - 3.7 - V LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA - 0.15 0.26 - 0.33 - 0.4 V VOL II input leakage current VI = VCC or GND; VCC = 5.5 V - - 0.1 - 1.0 - 1.0 A IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - - 0.5 - 5.0 - 10 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 8.0 - 80 - 160 A ICC additional supply current VI = VCC  2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A - 100 360 - 450 - 490 A per input pin; In inputs CI input capacitance 74HC_HCT251 Product data sheet per input pin; OE input - 150 540 - 675 - 735 A per input pin; Sn input - 150 540 - 675 - 735 A - 3.5 - All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 February 2016 pF © NXP Semiconductors N.V. 2016. All rights reserved. 6 of 18 74HC251; 74HCT251 NXP Semiconductors 8-input multiplexer; 3-state 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 9. Symbol Parameter Tamb = 25 C Conditions Tamb = 40 C to +85 C Tamb = 40 C to +125 C Min Typ Max Min Max Min Max Unit 74HC251 tpd propagation delay In to Y; see Figure 6 [1] VCC = 2.0 V - 50 170 - 215 - 255 ns VCC = 4.5 V - 18 34 - 43 - 51 ns VCC = 5 V; CL = 15 pF - 15 - - - - - ns - 14 29 - 37 - 43 ns VCC = 2.0 V - 55 175 - 220 - 265 ns VCC = 4.5 V - 20 35 - 44 - 53 ns VCC = 5 V; CL = 15 pF - 17 - - - - - ns - 16 30 - 37 - 45 ns VCC = 2.0 V - 66 205 - 255 - 310 ns VCC = 4.5 V - 24 41 - 51 - 62 ns VCC = 6.0 V In to Y; see Figure 6 [1] VCC = 6.0 V Sn to Y; see Figure 7 [1] VCC = 5 V; CL = 15 pF - 20 - - - - - ns VCC = 6.0 V - 19 35 - 43 - 53 ns VCC = 2.0 V - 69 205 - 255 - 310 ns VCC = 4.5 V - 25 41 - 51 - 62 ns VCC = 5 V; CL = 15 pF - 21 - - - - - ns - 20 35 - 43 - 53 ns VCC = 2.0 V - 36 140 - 175 - 210 ns VCC = 4.5 V - 13 28 - 35 - 42 ns - 10 24 - 30 - 36 ns VCC = 2.0 V - 39 140 - 170 - 210 ns VCC = 4.5 V - 14 28 - 35 - 42 ns - 11 24 - 30 - 36 ns VCC = 2.0 V - 19 75 - 95 - 110 ns VCC = 4.5 V - 7 15 - 19 - 22 ns - 6 13 - 16 - 19 ns - 44 - - - - - pF Sn to Y; see Figure 7 [1] VCC = 6.0 V ten enable time OE to Y, Y; see Figure 7 [2] VCC = 6.0 V tdis disable time OE to Y, Y; see Figure 7 [3] VCC = 6.0 V tt transition time [4] Y, Y; see Figure 6 VCC = 6.0 V CPD power dissipation capacitance 74HC_HCT251 Product data sheet CL = 50 pF; f = 1 MHz; VI = GND to VCC [5] All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 7 of 18 74HC251; 74HCT251 NXP Semiconductors 8-input multiplexer; 3-state Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 9. Symbol Parameter Tamb = 25 C Conditions Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit Min Typ Max Min Max Min Max - 22 35 - 44 - 53 ns - 19 - - - - - ns - 22 35 - 44 - 53 ns - 19 - - - - - ns - 24 44 - 55 - 66 ns - 20 - - - - - ns VCC = 4.5 V - 25 44 - 55 - 66 ns VCC = 5 V; CL = 15 pF - 21 - - - - - ns - 13 28 - 35 - 42 ns - 13 - - - - - ns - 14 28 - 35 - 42 ns - 18 - - - - - ns - 7 15 - 19 - 22 ns - 46 - - - - - pF 74HCT251 propagation delay tpd [1] In to Y; see Figure 6 VCC = 4.5 V VCC = 5 V; CL = 15 pF [1] In to Y; see Figure 6 VCC = 4.5 V VCC = 5 V; CL = 15 pF [1] Sn to Y; see Figure 7 VCC = 4.5 V VCC = 5 V; CL = 15 pF [1] Sn to Y; see Figure 7 enable time ten [2] OE to Y, Y; see Figure 7 VCC = 4.5 V VCC = 5 V; CL = 15 pF [3] disable time OE to Y, Y; see Figure 7 tdis VCC = 4.5 V VCC = 5 V; CL = 15 pF transition time tt power dissipation capacitance CPD [1] [4] Y, Y; see Figure 6 VCC = 4.5 V [5] CL = 50 pF; f = 1 MHz; VI = GND to VCC tpd is the same as tPLH and tPHL. [2] ten is the same as tPZH and tPZL. [3] tdis is the same as tPLZ and tPHZ. [4] tt is the same as tTHL and tTLH. [5] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of outputs. 74HC_HCT251 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 8 of 18 74HC251; 74HCT251 NXP Semiconductors 8-input multiplexer; 3-state 11. Waveforms 9, 90 ,QLQSXW 90 *1' W3+/ 92+ W3/+   90