74HCT2G04GV

74HC2G04; 74HCT2G04 Dual inverter Rev. 01 — 15 November 2006 Product data sheet 1. General description The 74HC2G04; 74HCT2G04 is a high-speed Si-gate CMOS device. The 74HC2G04; 74HCT2G04 provides two inverting buffers. 2. Features I I I I Wide supply voltage range from 2.0 V to 6.0 V Complies with JEDEC standard no. 7A High noise immunity ESD protection: N HBM JESD22-A114-D exceeds 2000 V N MM JESD22-A115-A exceeds 200 V Low power dissipation Balanced propagation delays Unlimited input rise and fall times Multiple package options Specified from −40 °C to +85 °C and −40 °C to +125 °C I I I I I 3. Ordering information Table 1. Ordering information Package Temperature range Name 74HC2G04GW 74HC2G04GV 74HCT2G04GW 74HCT2G04GV −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C SC-88 SC-74 SC-88 SC-74 Description plastic surface-mounted package; 6 leads plastic surface-mounted package (TSOP6); 6 leads plastic surface-mounted package; 6 leads plastic surface-mounted package (TSOP6); 6 leads Version SOT363 SOT457 SOT363 SOT457 Type number 4. Marking Table 2. Marking Marking code H4 H04 T4 T04 Type number 74HC2G04GW 74HC2G04GV 74HCT2G04GW 74HCT2G04GV NXP Semiconductors 74HC2G04; 74HCT2G04 Dual inverter 5. Functional diagram 1 1 1A 1Y 6 1 6 3 2A 2Y 4 3 1 4 mnb080 A Y mna110 mnb079 Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one gate) 6. Pinning information 6.1 Pinning 74HC2G04 74HCT2G04 1A GND 1 2 6 5 1Y VCC 2Y 2A 3 001aaf304 4 Fig 4. Pin configuration 6.2 Pin description Table 3. Symbol 1A GND 2A 2Y VCC 1Y Pin description Pin 1 2 3 4 5 6 Description data input ground (0 V) data input data output supply voltage data output 74HC_HCT2G04_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 15 November 2006 2 of 14 NXP Semiconductors 74HC2G04; 74HCT2G04 Dual inverter 7. Functional description Table 4. Input nA L H [1] H = HIGH voltage level; L = LOW voltage level. Function table[1] Output nY H L 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK IOK IO ICC IGND Tstg Ptot [1] [2] Parameter supply voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation Conditions VI < −0.5 V or VI > VCC + 0.5 V VO < −0.5 V or VO > VCC + 0.5 V VO = −0.5 V to VCC + 0.5 V [1] [1] [1] [1] [1] Min −0.5 −65 [2] Max +7.0 ±20 ±20 ±25 +50 −50 +150 250 Unit V mA mA mA mA mA °C mW - The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SC-88 and SC-74 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K. 9. Recommended operating conditions Table 6. Symbol VCC VI VO Tamb tr Recommended operating conditions Parameter supply voltage input voltage output voltage ambient temperature rise time except for Schmitt trigger inputs VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tf fall time except for Schmitt trigger inputs VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 74HC_HCT2G04_1 Conditions Min 2.0 0 0 −40 - Typ 5.0 +25 - Max 6.0 VCC VCC +125 1000 500 400 1000 500 400 Unit V V V °C ns ns ns ns ns ns Type 74HC2G04 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 15 November 2006 3 of 14 NXP Semiconductors 74HC2G04; 74HCT2G04 Dual inverter Table 6. Symbol VCC VI VO Tamb tr tf Recommended operating conditions …continued Parameter supply voltage input voltage output voltage ambient temperature rise time fall time except for Schmitt trigger inputs VCC = 4.5 V except for Schmitt trigger inputs VCC = 4.5 V 500 ns 500 ns Conditions Min 4.5 0 0 −40 Typ 5.0 +25 Max 5.5 VCC VCC +125 Unit V V V °C Type 74HCT2G04 10. Static characteristics Table 7. Static characteristics for 74HC2G04 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Tamb = 25 °C VIH HIGH-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 2.0 V IO = −20 µA; VCC = 4.5 V IO = −20 µA; VCC = 6.0 V IO = −4.0 mA; VCC = 4.5 V IO = −5.2 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 µA; VCC = 2.0 V IO = 20 µA; VCC = 4.5 V IO = 20 µA; VCC = 6.0 V IO = 4.0 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V Il ICC CI input leakage current supply current input capacitance VI = GND or VCC; VCC = 6.0 V VI = GND or VCC; IO = 0 A; VCC = 6.0 V 0 0 0 0.15 0.16 1.5 0.1 0.1 0.1 0.26 0.26 ±0.1 1.0 V V V V V µA µA pF 1.9 4.4 5.9 4.18 5.68 2.0 4.5 6.0 4.32 5.81 V V V V V 1.5 3.15 4.2 1.2 2.4 3.2 0.8 2.1 2.8 0.5 1.35 1.8 V V V V V V Parameter Conditions Min Typ Max Unit 74HC_HCT2G04_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 15 November 2006 4 of 14 NXP Semiconductors 74HC2G04; 74HCT2G04 Dual inverter Table 7. Static characteristics for 74HC2G04 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIH Parameter HIGH-level input voltage Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 2.0 V IO = −20 µA; VCC = 4.5 V IO = −20 µA; VCC = 6.0 V IO = −4.0 mA; VCC = 4.5 V IO = −5.2 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 µA; VCC = 2.0 V IO = 20 µA; VCC = 4.5 V IO = 20 µA; VCC = 6.0 V IO = 4.0 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V Il ICC input leakage current supply current VI = GND or VCC; VCC = 6.0 V VI = GND or VCC; IO = 0 A; VCC = 6.0 V VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 2.0 V IO = −20 µA; VCC = 4.5 V IO = −20 µA; VCC = 6.0 V IO = −4.0 mA; VCC = 4.5 V IO = −5.2 mA; VCC = 6.0 V 1.9 4.4 5.9 3.7 5.2 V V V V V 0.1 0.1 0.1 0.33 0.33 ±1.0 10.0 V V V V V µA µA 1.9 4.4 5.9 4.13 5.63 V V V V V Min 1.5 3.15 4.2 Typ Max 0.5 1.35 1.8 Unit V V V V V V Tamb = −40 °C to +85 °C Tamb = −40 °C to +125 °C VIH HIGH-level input voltage 1.5 3.15 4.2 0.5 1.35 1.8 V V V V V V 74HC_HCT2G04_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 15 November 2006 5 of 14 NXP Semiconductors 74HC2G04; 74HCT2G04 Dual inverter Table 7. Static characteristics for 74HC2G04 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VOL Parameter LOW-level output voltage Conditions VI = VIH or VIL IO = 20 µA; VCC = 2.0 V IO = 20 µA; VCC = 4.5 V IO = 20 µA; VCC = 6.0 V IO = 4.0 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V Il ICC input leakage current supply current VI = GND or VCC; VCC = 6.0 V VI = GND or VCC; IO = 0 A; VCC = 6.0 V 0.1 0.1 0.1 0.4 0.4 ±1.0 20.0 V V V V V µA µA Min Typ Max Unit Table 8. Static characteristics for 74HCT2G04 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Tamb = 25 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL IO = −20 µA; VCC = 4.5 V IO = −4.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 µA; VCC = 4.5 V IO = 4.0 mA; VCC = 4.5 V Il ICC ∆ICC CI VIH VIL VOH input leakage current supply current additional supply current input capacitance HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL IO = −20 µA; VCC = 4.5 V IO = −4.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 µA; VCC = 4.5 V IO = 4.0 mA; VCC = 4.5 V Il ICC ∆ICC input leakage current supply current additional supply current VI = GND or VCC; VCC = 5.5 V VI = GND or VCC; IO = 0 A; VCC = 5.5 V VI = VCC − 2.1 V; VCC = 4.5 V to 5.5 V; IO = 0 A 0.1 0.33 ±1.0 10.0 375 V V µA µA µA 4.4 4.13 V V VI = GND or VCC; VCC = 5.5 V VI = GND or VCC; IO = 0 A; VCC = 5.5 V VI = VCC − 2.1 V; VCC = 4.5 V to 5.5 V; IO = 0 A 2.0 0 0.15 1.5 0.1 0.26 ±0.1 1.0 300 0.8 V V µA µA µA pF V V 4.4 4.18 4.5 4.32 V V 2.0 1.6 1.2 0.8 V V Parameter Conditions Min Typ Max Unit Tamb = −40 °C to +85 °C 74HC_HCT2G04_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 15 November 2006 6 of 14 NXP Semiconductors 74HC2G04; 74HCT2G04 Dual inverter Table 8. Static characteristics for 74HCT2G04 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIH VIL VOH Parameter HIGH-level input voltage LOW-level input voltage HIGH-level output voltage Conditions VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL IO = −20 µA; VCC = 4.5 V IO = −4.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 µA; VCC = 4.5 V IO = 4.0 mA; VCC = 4.5 V Il ICC ∆ICC input leakage current supply current additional supply current VI = GND or VCC; VCC = 5.5 V VI = GND or VCC; IO = 0 A; VCC = 5.5 V VI = VCC − 2.1 V; VCC = 4.5 V to 5.5 V; IO = 0 A 0.1 0.4 ±1.0 20.0 410 V V µA µA µA 4.4 3.7 V V Min 2.0 Typ Max 0.8 Unit V V Tamb = −40 °C to +125 °C 11. Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6. Symbol Parameter Conditions Min 74HC2G04 tpd propagation delay nA to nY; see Figure 5 VCC = 2.0 V; CL = 50 pF VCC = 4.5 V; CL = 50 pF VCC = 6.0 V; CL = 50 pF tt transition time nY; see Figure 5 VCC = 2.0 V; CL = 50 pF VCC = 4.5 V; CL = 50 pF VCC = 6.0 V; CL = 50 pF CPD power dissipation capacitance VI = GND to VCC [3] [2] [1] 25 °C Typ Max −40 °C to +125 °C Min Max (85 °C) Max (125 °C) Unit - 22 8 6 18 6 5 9 75 15 13 75 15 13 - - 90 18 16 95 19 16 - 110 22 20 125 25 20 - ns ns ns ns ns ns pF 74HC_HCT2G04_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 15 November 2006 7 of 14 NXP Semiconductors 74HC2G04; 74HCT2G04 Dual inverter Table 9. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6. Symbol Parameter Conditions Min 74HCT2G04 tpd tt CPD propagation delay transition time power dissipation capacitance tpd is the same as tPLH and tPHL. tt is the same as tTLH and tTHL. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. 25 °C Typ Max −40 °C to +125 °C Min Max (85 °C) Max (125 °C) Unit nA to nY; see Figure 5 VCC = 4.5 V; CL = 50 pF nY; see Figure 5 VCC = 4.5 V; CL = 50 pF VI = GND to VCC − 1.5 V [1] [2] 10 6 9 18 15 - - 23 19 - 29 22 - ns ns pF [3] - [1] [2] [3] 12. Waveforms VI nA input GND t PHL VOH nY output VOL t THL VM VM 10% VM VM t PLH 90% t TLH mna722 Measurement points are given in Table 10. VOL and VOH are typical voltage output drop that occur with the output load. Fig 5. The data input (nA) to output (nY) propagation delays and output transition times Table 10. Type 74HC2G04 74HCT2G04 Measurement points Input VM 0.5VCC 1.3 V VI GND to VCC GND to 3.0 V tr = tf 6.0 ns 6.0 ns Output VM 0.5VCC 1.3 V 74HC_HCT2G04_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 15 November 2006 8 of 14 NXP Semiconductors 74HC2G04; 74HCT2G04 Dual inverter VCC VI D.U.T RT CL VO RL = 1 kΩ VCC PULSE GENERATOR open 50 pF mgk563 Test data is given in Table 11. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 6. Load circuitry for switching times Table 11. Type 74HC2G04 74HCT2G04 Test data Input VI GND to VCC GND to 3.0 V tr, tf 6 ns 6 ns Test tPHL, tPLH open open 74HC_HCT2G04_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 15 November 2006 9 of 14 NXP Semiconductors 74HC2G04; 74HCT2G04 Dual inverter 13. Package outline Plastic surface-mounted package; 6 leads SOT363 D B E A X y HE vMA 6 5 4 Q pin 1 index A A1 1 e1 e 2 bp 3 wM B detail X Lp c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT363 REFERENCES IEC JEDEC JEITA SC-88 EUROPEAN PROJECTION ISSUE DATE 04-11-08 06-03-16 Fig 7. Package outline SOT363 (SC-88) 74HC_HCT2G04_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 15 November 2006 10 of 14 NXP Semiconductors 74HC2G04; 74HCT2G04 Dual inverter Plastic surface-mounted package (TSOP6); 6 leads SOT457 D B E A X y HE vMA 6 5 4 Q pin 1 index A A1 c 1 2 3 Lp e bp wM B detail X 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 0.1 0.013 bp 0.40 0.25 c 0.26 0.10 D 3.1 2.7 E 1.7 1.3 e 0.95 HE 3.0 2.5 Lp 0.6 0.2 Q 0.33 0.23 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT457 REFERENCES IEC JEDEC JEITA SC-74 EUROPEAN PROJECTION ISSUE DATE 05-11-07 06-03-16 Fig 8. Package outline SOT457 (SC-74) 74HC_HCT2G04_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 15 November 2006 11 of 14 NXP Semiconductors 74HC2G04; 74HCT2G04 Dual inverter 14. Abbreviations Table 12. Acronym CMOS ESD HBM MM DUT Abbreviations Description Complementary Metal Oxide Semiconductor ElectroStatic Discharge Human Body Model Machine Model Device Under Test 15. Revision history Table 13. Revision history Release date 20061115 Data sheet status Product data sheet Change notice Supersedes Document ID 74HC_HCT2G04_1 74HC_HCT2G04_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 15 November 2006 12 of 14 NXP Semiconductors 74HC2G04; 74HCT2G04 Dual inverter 16. Legal information 16.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 16.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com 74HC_HCT2G04_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 15 November 2006 13 of 14 NXP Semiconductors 74HC2G04; 74HCT2G04 Dual inverter 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 3 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2006. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 15 November 2006 Document identifier: 74HC_HCT2G04_1