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74HCT366PW/C4118

74HCT366PW/C4118

  • 厂商:

    NXP(恩智浦)

  • 封装:

    TSSOP16

  • 描述:

    IC BUFFER INVERT 5.5V 16TSSOP

  • 数据手册
  • 价格&库存
74HCT366PW/C4118 数据手册
74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting Rev. 5 — 2 February 2016 Product data sheet 1. General description The 74HC366; 74HCT366 is a hex inverting buffer/line driver with 3-state outputs controlled by the output enable inputs (OEn). A HIGH on OEn causes the outputs to assume a high impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits  Inverting outputs  Input levels:  For 74HC366: CMOS level  For 74HC366: TTL level  Complies with JEDEC standard no. 7A  ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V  Specified from 40 C to +85 C and from 40 C to +125 C  Multiple package options 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC366D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HC366PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm 74HCT366D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HCT366DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74HC366 SOT403-1 74HCT366 74HCT366PW 40 C to +125 C 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting 4. Functional diagram       $ < $ < $ < $ < $ < < $  $ < $ < $ < $ <    $ <  < 2( 2( 2( 2( DDI Fig 1. Functional diagram (1  $     Fig 2.             DDI Logic symbol EXIIHUOLQHGULYHU DDI Fig 3. IEC logic symbol 9&& $ < 2( 2( *1' $ $ $ $ $ EXIIHUOLQHGULYHU < EXIIHUOLQHGULYHU < EXIIHUOLQHGULYHU < EXIIHUOLQHGULYHU < EXIIHUOLQHGULYHU < DDI Fig 4. Logic diagram 74HC_HCT366 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 2 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 2 of 20 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting 5. Pinning information 5.1 Pinning +& +&7 2(   9&& $   2( <   $ $   < <   $ $   < <   $ *1'   < DDI Fig 5. Pin configuration 5.2 Pin description Table 2. Pin description Symbol Pin Description OE1, OE2 1, 15 output enable input (active LOW) 1A, 2A, 3A, 4A, 5A, 6A 2, 4, 6, 10, 12, 14 data input 1Y, 2Y, 3Y, 4Y, 5Y, 6Y 3, 5, 7, 9, 11, 13 data output GND 8 ground (0 V) VCC 16 supply voltage 6. Functional description Table 3. Function table[1] Control Input Output OE1 OE2 nA nY L L L H L L H L X H X Z H X X Z [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 74HC_HCT366 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 2 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 3 of 20 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage 0.5 +7 V IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V - 20 mA IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V - 20 mA IO output current VO = 0.5 V to (VCC + 0.5 V) - 35 mA ICC supply current - 70 mA IGND ground current - 70 mA Tstg storage temperature total power dissipation Ptot 65 +150 C SO16 package [1] - 500 mW SSOP16 package [2] - 500 mW TSSOP16 package [2] - 500 mW [1] For SO16 packages: Ptot derates linearly with 8 mW/K above 70 C. [2] For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C. 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter VCC supply voltage VI input voltage VO output voltage Tamb ambient temperature t/V input transition rise and fall rate 74HC_HCT366 Product data sheet Conditions 74HC366 74HCT366 Unit Min Typ Max Min Typ Max 2.0 5.0 6.0 4.5 5.0 5.5 V 0 - VCC 0 - VCC V 0 - VCC 0 - VCC V 40 +25 +125 40 +25 +125 C VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V All information provided in this document is subject to legal disclaimers. Rev. 5 — 2 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 4 of 20 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting 9. Static characteristics Table 6. Static characteristics 74HC366 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VCC = 2.0 V 1.5 1.2 - V VCC = 4.5 V 3.15 2.4 - V VCC = 6.0 V 4.2 3.2 - V V Tamb = 25 C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage VCC = 2.0 V - 0.8 0.5 VCC = 4.5 V - 2.1 1.35 V VCC = 6.0 V - 2.8 1.8 - - - IO = 20 A; VCC = 2.0 V 1.9 2.0 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - V IO = 6.0 mA; VCC = 4.5 V 3.98 4.32 - V IO = 7.8 mA; VCC = 6.0 V 5.48 5.81 - V IO = 20 A; VCC = 2.0 V - 0 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 V 0.1 V HIGH-level output voltage VI = VIH or VIL V LOW-level output voltage VI = VIH or VIL II input leakage current IO = 20 A; VCC = 6.0 V - 0 IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 V IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 V VI = VCC or GND; VCC = 6.0 V - - 0.1 A IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - 0.5 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 A CI input capacitance - 3.5 - pF Tamb = 40 C to +85 C VIH VIL VOH HIGH-level input voltage LOW-level input voltage VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V IO = 20 A; VCC = 2.0 V 1.9 - - V IO = 20 A; VCC = 4.5 V 4.4 - - V IO = 20 A; VCC = 6.0 V 5.9 - - V IO = 6.0 mA; VCC = 4.5 V 3.84 - - V IO = 7.8 mA; VCC = 6.0 V 5.34 - - V HIGH-level output voltage VI = VIH or VIL 74HC_HCT366 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 2 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 5 of 20 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting Table 6. Static characteristics 74HC366 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOL Conditions Min Typ Max Unit IO = 20 A; VCC = 2.0 V - - 0.1 V IO = 20 A; VCC = 4.5 V - - 0.1 V IO = 20 A; VCC = 6.0 V - - 0.1 V IO = 6.0 mA; VCC = 4.5 V - - 0.33 V LOW-level output voltage VI = VIH or VIL IO = 7.8 mA; VCC = 6.0 V - - 0.33 V II input leakage current VI = VCC or GND; VCC = 6.0 V; - - 1.0 A IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - 5.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 80 A VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V V Tamb = 40 C to +125 C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage VCC = 2.0 V - - 0.5 VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V IO = 20 A; VCC = 2.0 V 1.9 - - V IO = 20 A; VCC = 4.5 V 4.4 - - V IO = 20 A; VCC = 6.0 V 5.9 - - V IO = 6.0 mA; VCC = 4.5 V 3.7 - - V IO = 7.8 mA; VCC = 6.0 V 5.2 - - V IO = 20 A; VCC = 2.0 V - - 0.1 V IO = 20 A; VCC = 4.5 V - - 0.1 V IO = 20 A; VCC = 6.0 V - - 0.1 V IO = 6.0 mA; VCC = 4.5 V - - 0.4 V IO = 7.8 mA; VCC = 6.0 V - - 0.4 V VI = VCC or GND; VCC = 6.0 V - - 1.0 A 10.0 A HIGH-level output voltage VI = VIH or VIL LOW-level output voltage VI = VIH or VIL II input leakage current IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 74HC_HCT366 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 2 February 2016 160 A © NXP Semiconductors N.V. 2016. All rights reserved. 6 of 20 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting Table 7. Static characteristics 74HCT366 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit 2.0 1.6 - V - 1.2 0.8 V IO = 20 A 4.4 4.5 - V IO = 6.0 mA 3.98 4.32 - V Tamb = 25 C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A - 0 0.1 V IO = 6.0 mA - 0.16 0.26 V - - 0.1 A II input leakage current VI = VCC or GND; VCC = 5.5 V IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - - 0.5 A ICC supply current - - 8.0 A ICC additional supply current VI = VCC  2.1 V; other inputs at VCC or GND; IO = 0 A pins nA - 100 360 A pin OE1 - 100 360 A VI = VCC or GND; IO = 0 A; VCC = 5.5 V - 90 320 A - 3.5 - pF 2.0 - - V - - 0.8 V IO = 20 A 4.4 - - V IO = 6.0 mA 3.84 - - V IO = 20 A - - 0.1 V IO = 6.0 mA - - 0.33 V - - 1.0 A 5.0 A - - 80 A pins nA - - 450 A pin OE1 - - 450 A pin OE2 - - 400 A pin OE2 CI input capacitance Tamb = 40 C to +85 C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V VOL LOW-level output voltage II input leakage current VI = VIH or VIL; VCC = 4.5 V VI = VCC or GND; VCC = 5.5 V IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V ICC supply current ICC additional supply current VI = VCC  2.1 V; other inputs at VCC or GND; IO = 0 A 74HC_HCT366 Product data sheet VI = VCC or GND; IO = 0 A; VCC = 5.5 V All information provided in this document is subject to legal disclaimers. Rev. 5 — 2 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 7 of 20 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting Table 7. Static characteristics 74HCT366 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit 2.0 - - V - - 0.8 V IO = 20 A 4.4 - - V IO = 6.0 mA 3.7 - - V IO = 20 A - - 0.1 V IO = 6.0 mA - - 0.4 V A Tamb = 40 C to +125 C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V VOL II input leakage current - - 1.0 IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - - 10.0 A ICC supply current - - ICC additional supply current VI = VCC  2.1 V; other inputs at VCC or GND; IO = 0 A VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V 160 A pins nA - - 490 A pin OE1 - - 490 A pin OE2 - - 441 A 10. Dynamic characteristics Table 8. Dynamic characteristics 74HC366 Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter Conditions Min Typ Max Unit VCC = 2.0 V - 33 100 ns VCC = 4.5 V - 12 20 ns Tamb = 25 C tpd ten tdis tt propagation delay enable time disable time transition time 74HC_HCT366 Product data sheet nA to nY; see Figure 6 [1] VCC = 5 V; CL = 15 pF - 10 - ns VCC = 6.0 V - 10 17 ns VCC = 2.0 V - 44 150 ns VCC = 4.5 V - 16 30 ns VCC = 6.0 V - 13 26 ns VCC = 2.0 V - 55 150 ns VCC = 4.5 V - 20 30 ns VCC = 6.0 V - 16 26 ns VCC = 2.0 V - 14 60 ns VCC = 4.5 V - 5 12 ns VCC = 6.0 V - 4 10 ns OEn to nY; see Figure 7 OEn to nY; see Figure 7 [2] [3] [4] see Figure 6 All information provided in this document is subject to legal disclaimers. Rev. 5 — 2 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 8 of 20 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting Table 8. Dynamic characteristics 74HC366 …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter CPD power dissipation capacitance Conditions Min Typ Max - 30 - pF VCC = 2.0 V - - 125 ns VCC = 4.5 V - - 25 ns VCC = 6.0 V - - 21 ns VCC = 2.0 V - - 190 ns VCC = 4.5 V - - 38 ns VCC = 6.0 V - - 33 ns VCC = 2.0 V - - 190 ns VCC = 4.5 V - - 38 ns VCC = 6.0 V - - 33 ns VCC = 2.0 V - - 75 ns VCC = 4.5 V - - 15 ns VCC = 6.0 V - - 13 ns per buffer; VI = GND to VCC [5] nA to nY; see Figure 6 [1] Unit Tamb = 40 C to +85 C tpd ten tdis tt propagation delay enable time disable time transition time OEn to nY; see Figure 7 OEn to nY; see Figure 7 [2] [3] [4] see Figure 6 Tamb = 40 C to +125 C tpd propagation delay nA to nY; see Figure 6 [1] VCC = 2.0 V - - 150 ns VCC = 4.5 V - - 30 ns - - 26 ns VCC = 6.0 V ten enable time OEn to nY; see Figure 7 [2] VCC = 2.0 V - - 225 ns VCC = 4.5 V - - 45 ns - - 38 ns VCC = 6.0 V tdis disable time 74HC_HCT366 Product data sheet OEn to nY; see Figure 7 [3] VCC = 2.0 V - - 225 ns VCC = 4.5 V - - 45 ns VCC = 6.0 V - - 38 ns All information provided in this document is subject to legal disclaimers. Rev. 5 — 2 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 9 of 20 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting Table 8. Dynamic characteristics 74HC366 …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter tt [1] transition time Conditions Min Typ Max Unit [4] see Figure 6 VCC = 2.0 V - - 90 ns VCC = 4.5 V - - 18 ns VCC = 6.0 V - - 15 ns tpd is the same as tPHL and tPLH. [2] ten is the same as tPZH and tPZL. [3] tdis is the same as tPHZ and tPLZ. [4] tt is the same as tTHL and tTLH. [5] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of outputs. Table 9. Dynamic characteristics 74HCT366 Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter Conditions Min Typ Max Unit - 13 24 ns Tamb = 25 C tpd propagation delay nA to nY; see Figure 6 [1] VCC = 4.5 V VCC = 5 V; CL = 15 pF - 11 - ns ten enable time OEn to nY; VCC = 4.5 V; see Figure 7 [2] - 16 35 ns tdis disable time OEn to nY; VCC = 4.5 V; see Figure 7 [3] - 20 35 ns transition time VCC = 4.5 V; see Figure 6 [4] - 5 12 ns power dissipation capacitance per buffer; VI = GND to (VCC  1.5 V) [5] - 30 - pF nA to nY; VCC = 4.5 V; see Figure 6 [1] - - 30 ns OEn to nY; VCC = 4.5 V; see Figure 7 [2] - - 44 ns - - 44 ns - - 15 ns tt CPD Tamb = 40 C to +85 C tpd ten propagation delay enable time tdis disable time OEn to nY; VCC = 4.5 V; see Figure 7 [3] tt transition time VCC = 4.5 V; see Figure 6 [4] 74HC_HCT366 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 2 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 10 of 20 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting Table 9. Dynamic characteristics 74HCT366 …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter Conditions Min Typ Max Unit Tamb = 40 C to +125 C tpd propagation delay nA to nY; VCC = 4.5 V; see Figure 6 [1] - - 36 ns ten enable time OEn to nY; VCC = 4.5 V; see Figure 7 [2] - - 53 ns OEn to nY; VCC = 4.5 V; see Figure 7 [3] - - 53 ns VCC = 4.5 V; see Figure 6 [4] - - 18 ns disable time tdis transition time tt [1] tpd is the same as tPHL and tPLH. [2] ten is the same as tPZH and tPZL. [3] tdis is the same as tPHZ and tPLZ. [4] tt is the same as tTHL and tTLH. [5] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of outputs. 11. Waveforms 9, Q$LQSXW 90 90 *1' W 3+/ W 3/+ 92+ Q
74HCT366PW/C4118 价格&库存

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